tty/serial/atmel_serial.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
25 #define	ATMEL_US_STTTO		BIT(11)	/* Start Time-out */
29 #define	ATMEL_US_RETTO		BIT(15)	/* Rearm Time-out */
40 #define ATMEL_US_MR		0x04	/* Mode Register */
41 #define	ATMEL_US_USMODE		GENMASK(3, 0)	/* Mode of the USART */
58 #define	ATMEL_US_SYNC		BIT(8)		/* Synchronous Mode Select */
70 #define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
76 #define	ATMEL_US_MODE9		BIT(17)	/* 9-bit Character Length */
78 #define	ATMEL_US_OVER		BIT(19)	/* Oversampling Mode */
94 #define	ATMEL_US_TIMEOUT	BIT(8)	/* Receiver Time-out */
121 #define ATMEL_US_RTOR		0x24	/* Receiver Time-out Register for USART */
122 #define ATMEL_UA_RTOR		0x28	/* Receiver Time-out Register for UART */
123 #define	ATMEL_US_TO		GENMASK(15, 0)	/* Time-out Value */
133 #define ATMEL_US_FMR		0xa0	/* FIFO Mode Register */
134 #define	ATMEL_US_TXRDYM(data)	(((data) & 0x3) << 0)	/* TX Ready Mode */
135 #define	ATMEL_US_RXRDYM(data)	(((data) & 0x3) << 4)	/* RX Ready Mode */
152 #define	ATMEL_US_TXFEF		BIT(0)	/* Transmit FIFO Empty Flag */
153 #define	ATMEL_US_TXFFF		BIT(1)	/* Transmit FIFO Full Flag */
154 #define	ATMEL_US_TXFTHF		BIT(2)	/* Transmit FIFO Threshold Flag */
155 #define	ATMEL_US_RXFEF		BIT(3)	/* Receive FIFO Empty Flag */
156 #define	ATMEL_US_RXFFF		BIT(4)	/* Receive FIFO Full Flag */
157 #define	ATMEL_US_RXFTHF		BIT(5)	/* Receive FIFO Threshold Flag */
158 #define	ATMEL_US_TXFPTEF	BIT(6)	/* Transmit FIFO Pointer Error Flag */
159 #define	ATMEL_US_RXFPTEF	BIT(7)	/* Receive FIFO Pointer Error Flag */
161 #define	ATMEL_US_RXFTHF2	BIT(9)	/* Receive FIFO Threshold Flag 2 */