Lines Matching +full:rs485 +full:- +full:rts +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0
3 * Probe module for 8250/16550-type PCI serial ports.
15 #include <linux/delay.h>
29 * > 0 - number of ports
30 * = 0 - use board->num_ports
31 * < 0 - error
74 dev_err(&dev->dev, in moan_device()
76 "Please send the output of lspci -vv, this\n" in moan_device()
79 "modem board to <linux-serial@vger.kernel.org>.\n", in moan_device()
80 pci_name(dev), str, dev->vendor, dev->device, in moan_device()
81 dev->subsystem_vendor, dev->subsystem_device); in moan_device()
88 struct pci_dev *dev = priv->dev; in setup_port()
91 return -EINVAL; in setup_port()
95 return -ENOMEM; in setup_port()
97 port->port.iotype = UPIO_MEM; in setup_port()
98 port->port.iobase = 0; in setup_port()
99 port->port.mapbase = pci_resource_start(dev, bar) + offset; in setup_port()
100 port->port.membase = pcim_iomap_table(dev)[bar] + offset; in setup_port()
101 port->port.regshift = regshift; in setup_port()
103 port->port.iotype = UPIO_PORT; in setup_port()
104 port->port.iobase = pci_resource_start(dev, bar) + offset; in setup_port()
105 port->port.mapbase = 0; in setup_port()
106 port->port.membase = NULL; in setup_port()
107 port->port.regshift = 0; in setup_port()
113 * ADDI-DATA GmbH communication cards <info@addi-data.com>
119 unsigned int bar = 0, offset = board->first_offset; in addidata_apci7800_setup()
120 bar = FL_GET_BASE(board->flags); in addidata_apci7800_setup()
123 offset += idx * board->uart_offset; in addidata_apci7800_setup()
126 offset += ((idx - 2) * board->uart_offset); in addidata_apci7800_setup()
129 offset += ((idx - 4) * board->uart_offset); in addidata_apci7800_setup()
132 offset += ((idx - 6) * board->uart_offset); in addidata_apci7800_setup()
135 return setup_port(priv, port, bar, offset, board->reg_shift); in addidata_apci7800_setup()
140 * Not that ugly ;) -- HW
146 unsigned int bar, offset = board->first_offset; in afavlab_setup()
148 bar = FL_GET_BASE(board->flags); in afavlab_setup()
153 offset += (idx - 4) * board->uart_offset; in afavlab_setup()
156 return setup_port(priv, port, bar, offset, board->reg_shift); in afavlab_setup()
161 * different versions. N-class, L2000 and A500 have two Diva chips, each
170 switch (dev->subsystem_device) { in pci_hp_diva_init()
201 unsigned int offset = board->first_offset; in pci_hp_diva_setup()
202 unsigned int bar = FL_GET_BASE(board->flags); in pci_hp_diva_setup()
204 switch (priv->dev->subsystem_device) { in pci_hp_diva_setup()
219 offset += idx * board->uart_offset; in pci_hp_diva_setup()
221 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_hp_diva_setup()
231 if (!(dev->subsystem_device & 0x1000)) in pci_inteli960ni_init()
232 return -ENODEV; in pci_inteli960ni_init()
237 dev_dbg(&dev->dev, "Local i960 firmware missing\n"); in pci_inteli960ni_init()
238 return -ENODEV; in pci_inteli960ni_init()
260 if (dev->vendor == PCI_VENDOR_ID_PANACOM || in pci_plx9050_init()
261 dev->subsystem_vendor == PCI_SUBVENDOR_ID_EXSYS) in pci_plx9050_init()
264 if ((dev->vendor == PCI_VENDOR_ID_PLX) && in pci_plx9050_init()
265 (dev->device == PCI_DEVICE_ID_PLX_ROMULUS)) in pci_plx9050_init()
280 return -ENOMEM; in pci_plx9050_init()
365 /* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */
370 unsigned int bar, offset = board->first_offset; in sbs_setup()
376 offset += idx * board->uart_offset; in sbs_setup()
379 offset += idx * board->uart_offset + 0xC00; in sbs_setup()
380 } else /* we have only 8 ports on PMC-OCTALPRO */ in sbs_setup()
383 return setup_port(priv, port, bar, offset, board->reg_shift); in sbs_setup()
393 /* global control register offset for SBS PMC-OctalPro */
403 return -ENOMEM; in sbs_init()
404 /* Set bit-4 Control Register (UART RESET) in to reset the uarts */ in sbs_init()
409 /* Set bit-2 (INTENABLE) of Control Register */ in sbs_init()
417 * Disables the global interrupt of PMC-OctalPro
446 * - 10x cards have control registers in IO and/or memory space;
447 * - 20x cards have control registers in standard PCI configuration space.
466 switch (dev->device & 0xfff8) { in pci_siig10x_init()
480 return -ENOMEM; in pci_siig10x_init()
500 if (((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S_20x) || in pci_siig20x_init()
501 ((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S1P_20x)) { in pci_siig20x_init()
510 unsigned int type = dev->device & 0xff00; in pci_siig_init()
518 return -ENODEV; in pci_siig_init()
525 unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0; in pci_siig_setup()
529 offset = (idx - 4) * 8; in pci_siig_setup()
584 * (0,2,3,5,6: serial only -- 7,8,9: serial + parallel) in pci_timedia_probe()
586 if ((dev->subsystem_device & 0x00f0) >= 0x70) { in pci_timedia_probe()
587 dev_info(&dev->dev, in pci_timedia_probe()
589 dev->subsystem_device); in pci_timedia_probe()
590 return -ENODEV; in pci_timedia_probe()
604 if (dev->subsystem_device == ids[j]) in pci_timedia_init()
612 * Ugh, this is ugly as all hell --- TYT
619 unsigned int bar = 0, offset = board->first_offset; in pci_timedia_setup()
626 offset = board->uart_offset; in pci_timedia_setup()
633 offset = board->uart_offset; in pci_timedia_setup()
639 bar = idx - 2; in pci_timedia_setup()
642 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_timedia_setup()
653 unsigned int bar, offset = board->first_offset; in titan_400l_800l_setup()
664 offset = (idx - 2) * board->uart_offset; in titan_400l_800l_setup()
667 return setup_port(priv, port, bar, offset, board->reg_shift); in titan_400l_800l_setup()
688 return -ENOMEM; in pci_ni8420_init()
719 return -ENOMEM; in pci_ni8430_init()
726 pcibios_resource_to_bus(dev->bus, ®ion, &dev->resource[bar]); in pci_ni8430_init()
754 struct pci_dev *dev = priv->dev; in pci_ni8430_setup()
756 unsigned int bar, offset = board->first_offset; in pci_ni8430_setup()
758 if (idx >= board->num_ports) in pci_ni8430_setup()
761 bar = FL_GET_BASE(board->flags); in pci_ni8430_setup()
762 offset += idx * board->uart_offset; in pci_ni8430_setup()
766 return -ENOMEM; in pci_ni8430_setup()
774 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_ni8430_setup()
783 if ((priv->dev->device != PCI_DEVICE_ID_NETMOS_9865) && in pci_netmos_9900_setup()
784 (priv->dev->subsystem_device & 0xff00) == 0x3000) { in pci_netmos_9900_setup()
790 return setup_port(priv, port, bar, 0, board->reg_shift); in pci_netmos_9900_setup()
799 * 9900 has varying capabilities and can cascade to sub-controllers
806 unsigned int c = dev->class; in pci_netmos_9900_numports()
815 if ((pi == 0) && (dev->device == PCI_DEVICE_ID_NETMOS_9900)) { in pci_netmos_9900_numports()
822 sub_serports = dev->subsystem_device & 0xf; in pci_netmos_9900_numports()
826 dev_err(&dev->dev, in pci_netmos_9900_numports()
838 unsigned int num_serial = dev->subsystem_device & 0xf; in pci_netmos_init()
840 if ((dev->device == PCI_DEVICE_ID_NETMOS_9901) || in pci_netmos_init()
841 (dev->device == PCI_DEVICE_ID_NETMOS_9865)) in pci_netmos_init()
844 if (dev->subsystem_vendor == PCI_VENDOR_ID_IBM && in pci_netmos_init()
845 dev->subsystem_device == 0x0299) in pci_netmos_init()
848 switch (dev->device) { /* FALLTHROUGH on all */ in pci_netmos_init()
862 return -ENODEV; in pci_netmos_init()
887 /* I/O space size (bits 26-24; 8 bytes = 011b) */
889 /* I/O space size (bits 26-24; 32 bytes = 101b) */
905 /* search for the base-ioport */ in pci_ite887x_init()
911 /* write POSIO0R - speed | size | ioport */ in pci_ite887x_init()
915 /* write INTCBAR - ioport */ in pci_ite887x_init()
923 release_region(iobase->start, ITE_887x_IOSIZE); in pci_ite887x_init()
930 dev_err(&dev->dev, "ite887x: could not find iobase\n"); in pci_ite887x_init()
931 return -ENODEV; in pci_ite887x_init()
935 type = inb(iobase->start + 0x18) & 0x0f; in pci_ite887x_init()
953 ret = -ENODEV; in pci_ite887x_init()
975 miscr &= ~(0xf << (12 - 4 * i)); in pci_ite887x_init()
977 miscr |= 1 << (23 - i); in pci_ite887x_init()
984 release_region(iobase->start, ITE_887x_IOSIZE); in pci_ite887x_init()
993 /* the ioport is bit 0-15 in POSIO0R */ in pci_ite887x_exit()
1013 if (dev->vendor == PCI_VENDOR_ID_ENDRUN && in pci_endrun_init()
1014 (dev->device & 0xf000) != 0xe000) in pci_endrun_init()
1019 return -ENOMEM; in pci_endrun_init()
1025 dev_dbg(&dev->dev, in pci_endrun_init()
1045 if (dev->vendor == PCI_VENDOR_ID_OXSEMI && in pci_oxsemi_tornado_init()
1046 (dev->device & 0xF000) != 0xC000) in pci_oxsemi_tornado_init()
1051 return -ENOMEM; in pci_oxsemi_tornado_init()
1057 dev_dbg(&dev->dev, in pci_oxsemi_tornado_init()
1069 port->bugs |= UART_BUG_PARITY; in pci_asix_setup()
1122 while (qf->devid) { in pci_quatech_amcc()
1123 if (qf->devid == devid) in pci_quatech_amcc()
1124 return qf->amcc; in pci_quatech_amcc()
1133 unsigned long base = port->port.iobase; in pci_quatech_rqopr()
1145 unsigned long base = port->port.iobase; in pci_quatech_wqopr()
1157 unsigned long base = port->port.iobase; in pci_quatech_rqmcr()
1173 unsigned long base = port->port.iobase; in pci_quatech_wqmcr()
1187 unsigned long base = port->port.iobase; in pci_quatech_has_qmcr()
1211 return -EINVAL; in pci_quatech_test()
1215 return -EINVAL; in pci_quatech_test()
1219 return -EINVAL; in pci_quatech_test()
1223 return -EINVAL; in pci_quatech_test()
1290 if (pci_quatech_amcc(dev->device)) { in pci_quatech_init()
1309 port->port.iobase = pci_resource_start(priv->dev, FL_GET_BASE(board->flags)); in pci_quatech_setup()
1311 port->port.uartclk = pci_quatech_clock(port); in pci_quatech_setup()
1326 unsigned int bar, offset = board->first_offset, maxnr; in pci_default_setup()
1328 bar = FL_GET_BASE(board->flags); in pci_default_setup()
1329 if (board->flags & FL_BASE_BARS) in pci_default_setup()
1332 offset += idx * board->uart_offset; in pci_default_setup()
1334 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_default_setup()
1335 (board->reg_shift + 3); in pci_default_setup()
1337 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_default_setup()
1340 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_default_setup()
1356 (baud > actual_baud - tolerance)) { in pericom_do_set_divisor()
1363 serial_port_out(port, 2, 16 - scr); in pericom_do_set_divisor()
1376 unsigned int bar, offset = board->first_offset, maxnr; in pci_pericom_setup()
1378 bar = FL_GET_BASE(board->flags); in pci_pericom_setup()
1379 if (board->flags & FL_BASE_BARS) in pci_pericom_setup()
1382 offset += idx * board->uart_offset; in pci_pericom_setup()
1385 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_pericom_setup()
1386 (board->reg_shift + 3); in pci_pericom_setup()
1388 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_pericom_setup()
1391 port->port.set_divisor = pericom_do_set_divisor; in pci_pericom_setup()
1393 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_pericom_setup()
1400 unsigned int bar, offset = board->first_offset, maxnr; in pci_pericom_setup_four_at_eight()
1402 bar = FL_GET_BASE(board->flags); in pci_pericom_setup_four_at_eight()
1403 if (board->flags & FL_BASE_BARS) in pci_pericom_setup_four_at_eight()
1406 offset += idx * board->uart_offset; in pci_pericom_setup_four_at_eight()
1411 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_pericom_setup_four_at_eight()
1412 (board->reg_shift + 3); in pci_pericom_setup_four_at_eight()
1414 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_pericom_setup_four_at_eight()
1417 port->port.set_divisor = pericom_do_set_divisor; in pci_pericom_setup_four_at_eight()
1419 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_pericom_setup_four_at_eight()
1429 ret = setup_port(priv, port, idx, 0, board->reg_shift); in ce4100_serial_setup()
1430 port->port.iotype = UPIO_MEM32; in ce4100_serial_setup()
1431 port->port.type = PORT_XSCALE; in ce4100_serial_setup()
1432 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); in ce4100_serial_setup()
1433 port->port.regshift = 2; in ce4100_serial_setup()
1453 port->port.type = PORT_BRCM_TRUMANAGE; in pci_brcm_trumanage_setup()
1454 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); in pci_brcm_trumanage_setup()
1458 /* RTS will control by MCR if this bit is 0 */
1463 /* We should do proper H/W transceiver setting before change to RS485 mode */
1465 struct serial_rs485 *rs485) in pci_fintek_rs485_config() argument
1467 struct pci_dev *pci_dev = to_pci_dev(port->dev); in pci_fintek_rs485_config()
1469 u8 *index = (u8 *) port->private_data; in pci_fintek_rs485_config()
1473 if (!rs485) in pci_fintek_rs485_config()
1474 rs485 = &port->rs485; in pci_fintek_rs485_config()
1475 else if (rs485->flags & SER_RS485_ENABLED) in pci_fintek_rs485_config()
1476 memset(rs485->padding, 0, sizeof(rs485->padding)); in pci_fintek_rs485_config()
1478 memset(rs485, 0, sizeof(*rs485)); in pci_fintek_rs485_config()
1480 /* F81504/508/512 not support RTS delay before or after send */ in pci_fintek_rs485_config()
1481 rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND; in pci_fintek_rs485_config()
1483 if (rs485->flags & SER_RS485_ENABLED) { in pci_fintek_rs485_config()
1484 /* Enable RTS H/W control mode */ in pci_fintek_rs485_config()
1487 if (rs485->flags & SER_RS485_RTS_ON_SEND) { in pci_fintek_rs485_config()
1488 /* RTS driving high on TX */ in pci_fintek_rs485_config()
1491 /* RTS driving low on TX */ in pci_fintek_rs485_config()
1495 rs485->delay_rts_after_send = 0; in pci_fintek_rs485_config()
1496 rs485->delay_rts_before_send = 0; in pci_fintek_rs485_config()
1498 /* Disable RTS H/W control mode */ in pci_fintek_rs485_config()
1504 if (rs485 != &port->rs485) in pci_fintek_rs485_config()
1505 port->rs485 = *rs485; in pci_fintek_rs485_config()
1514 struct pci_dev *pdev = priv->dev; in pci_fintek_setup()
1524 dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%x", __func__, idx, iobase); in pci_fintek_setup()
1526 port->port.iotype = UPIO_PORT; in pci_fintek_setup()
1527 port->port.iobase = iobase; in pci_fintek_setup()
1528 port->port.rs485_config = pci_fintek_rs485_config; in pci_fintek_setup()
1530 data = devm_kzalloc(&pdev->dev, sizeof(u8), GFP_KERNEL); in pci_fintek_setup()
1532 return -ENOMEM; in pci_fintek_setup()
1536 port->port.private_data = data; in pci_fintek_setup()
1553 return -ENODEV; in pci_fintek_init()
1555 switch (dev->device) { in pci_fintek_init()
1558 max_port = dev->device & 0xff; in pci_fintek_init()
1564 return -EINVAL; in pci_fintek_init()
1582 /* Select 128-byte FIFO and 8x FIFO threshold */ in pci_fintek_init()
1593 pci_write_config_byte(dev, config_base + 0x06, dev->irq); in pci_fintek_init()
1596 /* re-apply RS232/485 mode when in pci_fintek_init()
1599 port = serial8250_get_port(priv->line[i]); in pci_fintek_init()
1600 pci_fintek_rs485_config(&port->port, NULL); in pci_fintek_init()
1614 struct f815xxa_data *data = p->private_data; in f815xxa_mem_serial_out()
1617 spin_lock_irqsave(&data->lock, flags); in f815xxa_mem_serial_out()
1618 writeb(value, p->membase + offset); in f815xxa_mem_serial_out()
1619 readb(p->membase + UART_SCR); /* Dummy read for flush pcie tx queue */ in f815xxa_mem_serial_out()
1620 spin_unlock_irqrestore(&data->lock, flags); in f815xxa_mem_serial_out()
1627 struct pci_dev *pdev = priv->dev; in pci_fintek_f815xxa_setup()
1630 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); in pci_fintek_f815xxa_setup()
1632 return -ENOMEM; in pci_fintek_f815xxa_setup()
1634 data->idx = idx; in pci_fintek_f815xxa_setup()
1635 spin_lock_init(&data->lock); in pci_fintek_f815xxa_setup()
1637 port->port.private_data = data; in pci_fintek_f815xxa_setup()
1638 port->port.iotype = UPIO_MEM; in pci_fintek_f815xxa_setup()
1639 port->port.flags |= UPF_IOREMAP; in pci_fintek_f815xxa_setup()
1640 port->port.mapbase = pci_resource_start(pdev, 0) + 8 * idx; in pci_fintek_f815xxa_setup()
1641 port->port.serial_out = f815xxa_mem_serial_out; in pci_fintek_f815xxa_setup()
1652 return -ENODEV; in pci_fintek_f815xxa_init()
1654 switch (dev->device) { in pci_fintek_f815xxa_init()
1657 max_port = dev->device & 0xff; in pci_fintek_f815xxa_init()
1663 return -EINVAL; in pci_fintek_f815xxa_init()
1673 /* Select 128-byte FIFO and 8x FIFO threshold */ in pci_fintek_f815xxa_init()
1687 port->port.quirks |= UPQ_NO_TXEN_TEST; in skip_tx_en_setup()
1688 dev_dbg(&priv->dev->dev, in skip_tx_en_setup()
1690 priv->dev->vendor, priv->dev->device, in skip_tx_en_setup()
1691 priv->dev->subsystem_vendor, priv->dev->subsystem_device); in skip_tx_en_setup()
1719 * that instead. up->ier should be the same value as what is in kt_serial_in()
1722 val = inb(p->iobase + offset); in kt_serial_in()
1725 val = up->ier; in kt_serial_in()
1734 port->port.flags |= UPF_BUG_THRE; in kt_serial_setup()
1735 port->port.serial_in = kt_serial_in; in kt_serial_setup()
1736 port->port.handle_break = kt_handle_break; in kt_serial_setup()
1743 return -ENODEV; in pci_eg20t_init()
1754 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch353_setup()
1755 port->port.type = PORT_16550A; in pci_wch_ch353_setup()
1764 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch355_setup()
1765 port->port.type = PORT_16550A; in pci_wch_ch355_setup()
1774 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch38x_setup()
1775 port->port.type = PORT_16850; in pci_wch_ch38x_setup()
1789 switch (dev->device) { in pci_wch_ch38x_init()
1794 return -EINVAL; in pci_wch_ch38x_init()
1820 port->port.flags |= UPF_FIXED_TYPE; in pci_sunix_setup()
1821 port->port.type = PORT_SUNIX; in pci_sunix_setup()
1825 offset = idx * board->uart_offset; in pci_sunix_setup()
1828 idx -= 4; in pci_sunix_setup()
1830 offset = idx * 64 + offset * board->uart_offset; in pci_sunix_setup()
1841 unsigned int bar = FL_GET_BASE(board->flags); in pci_moxa_setup()
1844 if (board->num_ports == 4 && idx == 3) in pci_moxa_setup()
1845 offset = 7 * board->uart_offset; in pci_moxa_setup()
1847 offset = idx * board->uart_offset; in pci_moxa_setup()
1955 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */
1969 * ADDI-DATA GmbH communication cards <info@addi-data.com>
1979 * AFAVLAB cards - these may be called via parport_serial
2210 * Pericom (Only 7954 - It have a offset jump for port 4)
2361 * SBS Technologies, Inc., PMC-OCTALPRO 232
2373 * SBS Technologies, Inc., PMC-OCTALPRO 422
2385 * SBS Technologies, Inc., P-Octal 232
2397 * SBS Technologies, Inc., P-Octal 422
2409 * SIIG cards - these may be called via parport_serial
2477 * Netmos cards - these may be called via parport_serial
2598 * Cronyx Omega PCI (PLX-chip based)
2790 if (quirk_id_matches(quirk->vendor, dev->vendor) && in find_quirk()
2791 quirk_id_matches(quirk->device, dev->device) && in find_quirk()
2792 quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) && in find_quirk()
2793 quirk_id_matches(quirk->subdevice, dev->subsystem_device)) in find_quirk()
2912 * Board-specific versions.
2967 * uart_offset - the space between channels
2968 * reg_shift - describes how the UART registers are mapped
2970 * For example IER register on SBS, Inc. PMC-OctPro is located at
3402 * Entries following this are board-specific.
3406 * Panacom - IOMEM
3430 /* I think this entry is broken - the first_offset looks wrong --rmk */
3516 * Computone - uses IOMEM.
3550 * PA Semi PWRficient PA6T-1682M on-chip UART
3589 * ADDI-DATA GmbH PCI-Express communication cards <info@addi-data.com>
3771 { PCI_VDEVICE(MOTOROLA, 0x3052), }, /* Motorola Si3052-based modem */
3772 { PCI_DEVICE(0x1543, 0x3052), }, /* Si3052-based modem, default IDs */
3774 /* multi-io cards handled by parport_serial */
3810 if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) && in serial_pci_is_class_communication()
3811 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MULTISERIAL) && in serial_pci_is_class_communication()
3812 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) || in serial_pci_is_class_communication()
3813 (dev->class & 0xff) > 6) in serial_pci_is_class_communication()
3814 return -ENODEV; in serial_pci_is_class_communication()
3822 * serial specs. Returns 0 on success, -ENODEV on failure.
3827 int num_iomem, num_port, first_port = -1, i; in serial_pci_guess_board()
3837 if ((dev->class >> 8) == PCI_CLASS_COMMUNICATION_MULTISERIAL) in serial_pci_guess_board()
3838 return -ENODEV; in serial_pci_guess_board()
3844 if (first_port == -1) in serial_pci_guess_board()
3857 board->flags = first_port; in serial_pci_guess_board()
3858 board->num_ports = pci_resource_len(dev, first_port) / 8; in serial_pci_guess_board()
3867 first_port = -1; in serial_pci_guess_board()
3872 (first_port == -1 || (first_port + num_port) == i)) { in serial_pci_guess_board()
3874 if (first_port == -1) in serial_pci_guess_board()
3880 board->flags = first_port | FL_BASE_BARS; in serial_pci_guess_board()
3881 board->num_ports = num_port; in serial_pci_guess_board()
3885 return -ENODEV; in serial_pci_guess_board()
3893 board->num_ports == guessed->num_ports && in serial_pci_matches()
3894 board->base_baud == guessed->base_baud && in serial_pci_matches()
3895 board->uart_offset == guessed->uart_offset && in serial_pci_matches()
3896 board->reg_shift == guessed->reg_shift && in serial_pci_matches()
3897 board->first_offset == guessed->first_offset; in serial_pci_matches()
3908 nr_ports = board->num_ports; in pciserial_init_ports()
3916 * Run the new-style initialization function. in pciserial_init_ports()
3918 * <0 - error in pciserial_init_ports()
3919 * 0 - use board->num_ports in pciserial_init_ports()
3920 * >0 - number of ports in pciserial_init_ports()
3922 if (quirk->init) { in pciserial_init_ports()
3923 rc = quirk->init(dev); in pciserial_init_ports()
3936 priv = ERR_PTR(-ENOMEM); in pciserial_init_ports()
3940 priv->dev = dev; in pciserial_init_ports()
3941 priv->quirk = quirk; in pciserial_init_ports()
3945 uart.port.uartclk = board->base_baud * 16; in pciserial_init_ports()
3948 dev_dbg(&dev->dev, "Using MSI(-X) interrupts\n"); in pciserial_init_ports()
3952 dev_dbg(&dev->dev, "Using legacy interrupts\n"); in pciserial_init_ports()
3962 uart.port.dev = &dev->dev; in pciserial_init_ports()
3965 if (quirk->setup(priv, board, &uart, i)) in pciserial_init_ports()
3968 dev_dbg(&dev->dev, "Setup PCI port: port %lx, irq %d, type %d\n", in pciserial_init_ports()
3971 priv->line[i] = serial8250_register_8250_port(&uart); in pciserial_init_ports()
3972 if (priv->line[i] < 0) { in pciserial_init_ports()
3973 dev_err(&dev->dev, in pciserial_init_ports()
3976 uart.port.iotype, priv->line[i]); in pciserial_init_ports()
3980 priv->nr = i; in pciserial_init_ports()
3981 priv->board = board; in pciserial_init_ports()
3985 if (quirk->exit) in pciserial_init_ports()
3986 quirk->exit(dev); in pciserial_init_ports()
3997 for (i = 0; i < priv->nr; i++) in pciserial_detach_ports()
3998 serial8250_unregister_port(priv->line[i]); in pciserial_detach_ports()
4003 quirk = find_quirk(priv->dev); in pciserial_detach_ports()
4004 if (quirk->exit) in pciserial_detach_ports()
4005 quirk->exit(priv->dev); in pciserial_detach_ports()
4019 for (i = 0; i < priv->nr; i++) in pciserial_suspend_ports()
4020 if (priv->line[i] >= 0) in pciserial_suspend_ports()
4021 serial8250_suspend_port(priv->line[i]); in pciserial_suspend_ports()
4026 if (priv->quirk->exit) in pciserial_suspend_ports()
4027 priv->quirk->exit(priv->dev); in pciserial_suspend_ports()
4038 if (priv->quirk->init) in pciserial_resume_ports()
4039 priv->quirk->init(priv->dev); in pciserial_resume_ports()
4041 for (i = 0; i < priv->nr; i++) in pciserial_resume_ports()
4042 if (priv->line[i] >= 0) in pciserial_resume_ports()
4043 serial8250_resume_port(priv->line[i]); in pciserial_resume_ports()
4062 if (quirk->probe) { in pciserial_init_one()
4063 rc = quirk->probe(dev); in pciserial_init_one()
4068 if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { in pciserial_init_one()
4069 dev_err(&dev->dev, "invalid driver_data: %ld\n", in pciserial_init_one()
4070 ent->driver_data); in pciserial_init_one()
4071 return -EINVAL; in pciserial_init_one()
4074 board = &pci_boards[ent->driver_data]; in pciserial_init_one()
4078 return -ENODEV; in pciserial_init_one()
4085 if (ent->driver_data == pbn_default) { in pciserial_init_one()
4148 * The device may have been disabled. Re-enable it. in pciserial_resume_one()
4153 dev_err(dev, "Unable to re-enable ports, trying to continue.\n"); in pciserial_resume_one()
4287 /* Unknown card - subdevice 0x1584 */
4292 /* Unknown card - subdevice 0x1588 */
4595 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 1 Port V.34 Super-G3 Fax */
4598 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 2 Port V.34 Super-G3 Fax */
4601 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 4 Port V.34 Super-G3 Fax */
4604 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 8 Port V.34 Super-G3 Fax */
4609 * Digi/IBM PCIe 2-port Async EIA-232 Adapter utilizing OxSemi Tornado
4616 * SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards,
4633 * Digitan DS560-558, from jimd@esoft.com
4909 * Dell Remote Access Card 4 - Tim_T_Murphy@Dell.com
4916 * Dell Remote Access Card III - Tim_T_Murphy@Dell.com
4943 * Xircom RBM56G cardbus modem - Dirk Arnold (temp entry)
5122 * IntaShield IS-200
5128 * IntaShield IS-400
5134 * BrainBoxes UC-260
5145 * Perle PCI-RAS cards
5267 * PA Semi PA6T-1682M on-chip UART
5390 * ADDI-DATA GmbH communication cards <info@addi-data.com>
5582 * AgeStar as-prs2-009
5634 /* MKS Tenta SCOM-080x serial cards */
5699 new = pciserial_init_ports(dev, priv->board); in serial8250_io_resume()