Lines Matching +full:wakeup +full:- +full:latency +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0
3 * 8250-core based driver for the OMAP internal UART
5 * based on omap-serial.c, Copyright (C) 2010 Texas Instruments.
29 #include <linux/dma-mapping.h>
118 u32 latency; member
147 return readl(up->port.membase + (reg << up->port.regshift)); in uart_read()
153 struct omap8250_priv *priv = up->port.private_data; in omap8250_set_mctrl()
158 if (!mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS)) { in omap8250_set_mctrl()
165 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in omap8250_set_mctrl()
166 priv->efr |= UART_EFR_RTS; in omap8250_set_mctrl()
168 priv->efr &= ~UART_EFR_RTS; in omap8250_set_mctrl()
169 serial_out(up, UART_EFR, priv->efr); in omap8250_set_mctrl()
180 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
190 if (old_mdr1 == priv->mdr1) in omap_8250_mdr1_errataset()
193 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap_8250_mdr1_errataset()
195 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in omap_8250_mdr1_errataset()
203 timeout--; in omap_8250_mdr1_errataset()
206 dev_crit(up->port.dev, "Errata i202: timedout %x\n", in omap_8250_mdr1_errataset()
217 unsigned int uartclk = port->uartclk; in omap_8250_get_divisor()
224 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) { in omap_8250_get_divisor()
225 priv->quot = port->custom_divisor & UART_DIV_MAX; in omap_8250_get_divisor()
231 if (port->custom_divisor & (1 << 16)) in omap_8250_get_divisor()
232 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
234 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
245 abs_d13 = abs(baud - uartclk / 13 / div_13); in omap_8250_get_divisor()
246 abs_d16 = abs(baud - uartclk / 16 / div_16); in omap_8250_get_divisor()
249 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
250 priv->quot = div_16; in omap_8250_get_divisor()
252 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
253 priv->quot = div_13; in omap_8250_get_divisor()
263 if (old_scr == priv->scr) in omap8250_update_scr()
271 if (priv->scr & OMAP_UART_SCR_DMAMODE_MASK) in omap8250_update_scr()
273 priv->scr & ~OMAP_UART_SCR_DMAMODE_MASK); in omap8250_update_scr()
274 serial_out(up, UART_OMAP_SCR, priv->scr); in omap8250_update_scr()
280 if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS) in omap8250_update_mdr1()
283 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap8250_update_mdr1()
288 struct omap8250_priv *priv = up->port.private_data; in omap8250_restore_regs()
289 struct uart_8250_dma *dma = up->dma; in omap8250_restore_regs()
291 if (dma && dma->tx_running) { in omap8250_restore_regs()
294 * we have a TX-DMA operation in progress then it has been in omap8250_restore_regs()
298 priv->delayed_restore = 1; in omap8250_restore_regs()
307 serial_out(up, UART_FCR, up->fcr); in omap8250_restore_regs()
316 TRIGGER_TLR_MASK(priv->tx_trigger) << UART_TI752_TLR_TX | in omap8250_restore_regs()
317 TRIGGER_TLR_MASK(priv->rx_trigger) << UART_TI752_TLR_RX); in omap8250_restore_regs()
322 serial8250_out_MCR(up, up->mcr); in omap8250_restore_regs()
323 serial_out(up, UART_IER, up->ier); in omap8250_restore_regs()
326 serial_dl_write(up, priv->quot); in omap8250_restore_regs()
328 serial_out(up, UART_EFR, priv->efr); in omap8250_restore_regs()
332 serial_out(up, UART_XON1, priv->xon); in omap8250_restore_regs()
333 serial_out(up, UART_XOFF1, priv->xoff); in omap8250_restore_regs()
335 serial_out(up, UART_LCR, up->lcr); in omap8250_restore_regs()
339 up->port.ops->set_mctrl(&up->port, up->port.mctrl); in omap8250_restore_regs()
351 struct omap8250_priv *priv = up->port.private_data; in omap_8250_set_termios()
355 switch (termios->c_cflag & CSIZE) { in omap_8250_set_termios()
371 if (termios->c_cflag & CSTOPB) in omap_8250_set_termios()
373 if (termios->c_cflag & PARENB) in omap_8250_set_termios()
375 if (!(termios->c_cflag & PARODD)) in omap_8250_set_termios()
377 if (termios->c_cflag & CMSPAR) in omap_8250_set_termios()
381 * Ask the core to calculate the divisor for us. in omap_8250_set_termios()
384 port->uartclk / 16 / UART_DIV_MAX, in omap_8250_set_termios()
385 port->uartclk / 13); in omap_8250_set_termios()
392 pm_runtime_get_sync(port->dev); in omap_8250_set_termios()
393 spin_lock_irq(&port->lock); in omap_8250_set_termios()
396 * Update the per-port timeout. in omap_8250_set_termios()
398 uart_update_timeout(port, termios->c_cflag, baud); in omap_8250_set_termios()
400 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in omap_8250_set_termios()
401 if (termios->c_iflag & INPCK) in omap_8250_set_termios()
402 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; in omap_8250_set_termios()
403 if (termios->c_iflag & (IGNBRK | PARMRK)) in omap_8250_set_termios()
404 up->port.read_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
409 up->port.ignore_status_mask = 0; in omap_8250_set_termios()
410 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
411 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in omap_8250_set_termios()
412 if (termios->c_iflag & IGNBRK) { in omap_8250_set_termios()
413 up->port.ignore_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
418 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
419 up->port.ignore_status_mask |= UART_LSR_OE; in omap_8250_set_termios()
425 if ((termios->c_cflag & CREAD) == 0) in omap_8250_set_termios()
426 up->port.ignore_status_mask |= UART_LSR_DR; in omap_8250_set_termios()
431 up->ier &= ~UART_IER_MSI; in omap_8250_set_termios()
432 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in omap_8250_set_termios()
433 up->ier |= UART_IER_MSI; in omap_8250_set_termios()
435 up->lcr = cval; in omap_8250_set_termios()
441 * - RX_TRIGGER amount of bytes in the FIFO will cause an interrupt. in omap_8250_set_termios()
442 * - less than RX_TRIGGER number of bytes will also cause an interrupt in omap_8250_set_termios()
444 * - Once THRE is enabled, the interrupt will be fired once the FIFO is in omap_8250_set_termios()
445 * empty - the trigger level is ignored here. in omap_8250_set_termios()
448 * - UART will assert the TX DMA line once there is room for TX_TRIGGER in omap_8250_set_termios()
451 * - UART will assert the RX DMA line once there are RX_TRIGGER bytes in in omap_8250_set_termios()
455 up->fcr = UART_FCR_ENABLE_FIFO; in omap_8250_set_termios()
456 up->fcr |= TRIGGER_FCR_MASK(priv->tx_trigger) << OMAP_UART_FCR_TX_TRIG; in omap_8250_set_termios()
457 up->fcr |= TRIGGER_FCR_MASK(priv->rx_trigger) << OMAP_UART_FCR_RX_TRIG; in omap_8250_set_termios()
459 priv->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_MASK | OMAP_UART_SCR_TX_EMPTY | in omap_8250_set_termios()
462 if (up->dma) in omap_8250_set_termios()
463 priv->scr |= OMAP_UART_SCR_DMAMODE_1 | in omap_8250_set_termios()
466 priv->xon = termios->c_cc[VSTART]; in omap_8250_set_termios()
467 priv->xoff = termios->c_cc[VSTOP]; in omap_8250_set_termios()
469 priv->efr = 0; in omap_8250_set_termios()
470 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); in omap_8250_set_termios()
472 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW && in omap_8250_set_termios()
473 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) && in omap_8250_set_termios()
474 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_CTS)) { in omap_8250_set_termios()
476 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in omap_8250_set_termios()
477 priv->efr |= UART_EFR_CTS; in omap_8250_set_termios()
478 } else if (up->port.flags & UPF_SOFT_FLOW) { in omap_8250_set_termios()
489 if (termios->c_iflag & IXOFF) { in omap_8250_set_termios()
490 up->port.status |= UPSTAT_AUTOXOFF; in omap_8250_set_termios()
491 priv->efr |= OMAP_UART_SW_TX; in omap_8250_set_termios()
496 spin_unlock_irq(&up->port.lock); in omap_8250_set_termios()
497 pm_runtime_mark_last_busy(port->dev); in omap_8250_set_termios()
498 pm_runtime_put_autosuspend(port->dev); in omap_8250_set_termios()
500 /* calculate wakeup latency constraint */ in omap_8250_set_termios()
501 priv->calc_latency = USEC_PER_SEC * 64 * 8 / baud; in omap_8250_set_termios()
502 priv->latency = priv->calc_latency; in omap_8250_set_termios()
504 schedule_work(&priv->qos_work); in omap_8250_set_termios()
518 pm_runtime_get_sync(port->dev); in omap_8250_pm()
529 pm_runtime_mark_last_busy(port->dev); in omap_8250_pm()
530 pm_runtime_put_autosuspend(port->dev); in omap_8250_pm()
559 dev_warn(up->port.dev, in omap_serial_fill_features_erratas()
570 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS; in omap_serial_fill_features_erratas()
573 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
577 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
590 cpu_latency_qos_update_request(&priv->pm_qos_request, priv->latency); in omap8250_uart_qos_work()
605 if (up->dma) { in omap8250_irq()
622 struct omap8250_priv *priv = port->private_data; in omap_8250_startup()
625 if (priv->wakeirq) { in omap_8250_startup()
626 ret = dev_pm_set_dedicated_wake_irq(port->dev, priv->wakeirq); in omap_8250_startup()
631 pm_runtime_get_sync(port->dev); in omap_8250_startup()
633 up->mcr = 0; in omap_8250_startup()
638 up->lsr_saved_flags = 0; in omap_8250_startup()
639 up->msr_saved_flags = 0; in omap_8250_startup()
643 up->dma = NULL; in omap_8250_startup()
645 if (up->dma) { in omap_8250_startup()
648 dev_warn_ratelimited(port->dev, in omap_8250_startup()
650 up->dma = NULL; in omap_8250_startup()
654 ret = request_irq(port->irq, omap8250_irq, IRQF_SHARED, in omap_8250_startup()
655 dev_name(port->dev), port); in omap_8250_startup()
659 up->ier = UART_IER_RLSI | UART_IER_RDI; in omap_8250_startup()
660 serial_out(up, UART_IER, up->ier); in omap_8250_startup()
663 up->capabilities |= UART_CAP_RPM; in omap_8250_startup()
667 priv->wer = OMAP_UART_WER_MOD_WKUP; in omap_8250_startup()
668 if (priv->habit & OMAP_UART_WER_HAS_TX_WAKEUP) in omap_8250_startup()
669 priv->wer |= OMAP_UART_TX_WAKEUP_EN; in omap_8250_startup()
670 serial_out(up, UART_OMAP_WER, priv->wer); in omap_8250_startup()
672 if (up->dma && !(priv->habit & UART_HAS_EFR2)) in omap_8250_startup()
673 up->dma->rx_dma(up); in omap_8250_startup()
675 pm_runtime_mark_last_busy(port->dev); in omap_8250_startup()
676 pm_runtime_put_autosuspend(port->dev); in omap_8250_startup()
679 pm_runtime_mark_last_busy(port->dev); in omap_8250_startup()
680 pm_runtime_put_autosuspend(port->dev); in omap_8250_startup()
681 dev_pm_clear_wake_irq(port->dev); in omap_8250_startup()
688 struct omap8250_priv *priv = port->private_data; in omap_8250_shutdown()
690 flush_work(&priv->qos_work); in omap_8250_shutdown()
691 if (up->dma) in omap_8250_shutdown()
694 pm_runtime_get_sync(port->dev); in omap_8250_shutdown()
697 if (priv->habit & UART_HAS_EFR2) in omap_8250_shutdown()
700 up->ier = 0; in omap_8250_shutdown()
703 if (up->dma) in omap_8250_shutdown()
709 if (up->lcr & UART_LCR_SBC) in omap_8250_shutdown()
710 serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC); in omap_8250_shutdown()
713 pm_runtime_mark_last_busy(port->dev); in omap_8250_shutdown()
714 pm_runtime_put_autosuspend(port->dev); in omap_8250_shutdown()
715 free_irq(port->irq, port); in omap_8250_shutdown()
716 dev_pm_clear_wake_irq(port->dev); in omap_8250_shutdown()
721 struct omap8250_priv *priv = port->private_data; in omap_8250_throttle()
724 pm_runtime_get_sync(port->dev); in omap_8250_throttle()
726 spin_lock_irqsave(&port->lock, flags); in omap_8250_throttle()
727 port->ops->stop_rx(port); in omap_8250_throttle()
728 priv->throttled = true; in omap_8250_throttle()
729 spin_unlock_irqrestore(&port->lock, flags); in omap_8250_throttle()
731 pm_runtime_mark_last_busy(port->dev); in omap_8250_throttle()
732 pm_runtime_put_autosuspend(port->dev); in omap_8250_throttle()
737 struct omap8250_priv *priv = port->private_data; in omap_8250_unthrottle()
741 pm_runtime_get_sync(port->dev); in omap_8250_unthrottle()
743 spin_lock_irqsave(&port->lock, flags); in omap_8250_unthrottle()
744 priv->throttled = false; in omap_8250_unthrottle()
745 if (up->dma) in omap_8250_unthrottle()
746 up->dma->rx_dma(up); in omap_8250_unthrottle()
747 up->ier |= UART_IER_RLSI | UART_IER_RDI; in omap_8250_unthrottle()
748 port->read_status_mask |= UART_LSR_DR; in omap_8250_unthrottle()
749 serial_out(up, UART_IER, up->ier); in omap_8250_unthrottle()
750 spin_unlock_irqrestore(&port->lock, flags); in omap_8250_unthrottle()
752 pm_runtime_mark_last_busy(port->dev); in omap_8250_unthrottle()
753 pm_runtime_put_autosuspend(port->dev); in omap_8250_unthrottle()
759 /* Must be called while priv->rx_dma_lock is held */
762 struct uart_8250_dma *dma = p->dma; in __dma_rx_do_complete()
763 struct tty_port *tty_port = &p->port.state->port; in __dma_rx_do_complete()
764 struct dma_chan *rxchan = dma->rxchan; in __dma_rx_do_complete()
770 if (!dma->rx_running) in __dma_rx_do_complete()
773 cookie = dma->rx_cookie; in __dma_rx_do_complete()
774 dma->rx_running = 0; in __dma_rx_do_complete()
777 count = dma->rx_size - state.residue + state.in_flight_bytes; in __dma_rx_do_complete()
778 if (count < dma->rx_size) { in __dma_rx_do_complete()
789 poll_count--) in __dma_rx_do_complete()
793 dev_err(p->port.dev, "teardown incomplete\n"); in __dma_rx_do_complete()
798 ret = tty_insert_flip_string(tty_port, dma->rx_buf, count); in __dma_rx_do_complete()
800 p->port.icount.rx += ret; in __dma_rx_do_complete()
801 p->port.icount.buf_overrun += count - ret; in __dma_rx_do_complete()
810 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_complete()
811 struct uart_8250_dma *dma = p->dma; in __dma_rx_complete()
815 spin_lock_irqsave(&p->port.lock, flags); in __dma_rx_complete()
822 if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) != in __dma_rx_complete()
824 spin_unlock_irqrestore(&p->port.lock, flags); in __dma_rx_complete()
828 if (!priv->throttled) { in __dma_rx_complete()
829 p->ier |= UART_IER_RLSI | UART_IER_RDI; in __dma_rx_complete()
830 serial_out(p, UART_IER, p->ier); in __dma_rx_complete()
831 if (!(priv->habit & UART_HAS_EFR2)) in __dma_rx_complete()
835 spin_unlock_irqrestore(&p->port.lock, flags); in __dma_rx_complete()
840 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma_flush()
841 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma_flush()
846 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
848 if (!dma->rx_running) { in omap_8250_rx_dma_flush()
849 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
853 ret = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in omap_8250_rx_dma_flush()
855 ret = dmaengine_pause(dma->rxchan); in omap_8250_rx_dma_flush()
857 priv->rx_dma_broken = true; in omap_8250_rx_dma_flush()
860 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
865 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma()
866 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma()
871 if (priv->rx_dma_broken) in omap_8250_rx_dma()
872 return -EINVAL; in omap_8250_rx_dma()
874 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
876 if (dma->rx_running) { in omap_8250_rx_dma()
879 state = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, NULL); in omap_8250_rx_dma()
885 p->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in omap_8250_rx_dma()
886 serial_out(p, UART_IER, p->ier); in omap_8250_rx_dma()
891 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, in omap_8250_rx_dma()
892 dma->rx_size, DMA_DEV_TO_MEM, in omap_8250_rx_dma()
895 err = -EBUSY; in omap_8250_rx_dma()
899 dma->rx_running = 1; in omap_8250_rx_dma()
900 desc->callback = __dma_rx_complete; in omap_8250_rx_dma()
901 desc->callback_param = p; in omap_8250_rx_dma()
903 dma->rx_cookie = dmaengine_submit(desc); in omap_8250_rx_dma()
905 dma_async_issue_pending(dma->rxchan); in omap_8250_rx_dma()
907 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
916 struct uart_8250_dma *dma = p->dma; in omap_8250_dma_tx_complete()
917 struct circ_buf *xmit = &p->port.state->xmit; in omap_8250_dma_tx_complete()
920 struct omap8250_priv *priv = p->port.private_data; in omap_8250_dma_tx_complete()
922 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, in omap_8250_dma_tx_complete()
925 spin_lock_irqsave(&p->port.lock, flags); in omap_8250_dma_tx_complete()
927 dma->tx_running = 0; in omap_8250_dma_tx_complete()
929 xmit->tail += dma->tx_size; in omap_8250_dma_tx_complete()
930 xmit->tail &= UART_XMIT_SIZE - 1; in omap_8250_dma_tx_complete()
931 p->port.icount.tx += dma->tx_size; in omap_8250_dma_tx_complete()
933 if (priv->delayed_restore) { in omap_8250_dma_tx_complete()
934 priv->delayed_restore = 0; in omap_8250_dma_tx_complete()
939 uart_write_wakeup(&p->port); in omap_8250_dma_tx_complete()
941 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) { in omap_8250_dma_tx_complete()
947 } else if (p->capabilities & UART_CAP_RPM) { in omap_8250_dma_tx_complete()
952 dma->tx_err = 1; in omap_8250_dma_tx_complete()
956 spin_unlock_irqrestore(&p->port.lock, flags); in omap_8250_dma_tx_complete()
961 struct uart_8250_dma *dma = p->dma; in omap_8250_tx_dma()
962 struct omap8250_priv *priv = p->port.private_data; in omap_8250_tx_dma()
963 struct circ_buf *xmit = &p->port.state->xmit; in omap_8250_tx_dma()
968 if (dma->tx_running) in omap_8250_tx_dma()
970 if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) { in omap_8250_tx_dma()
977 if (dma->tx_err || p->capabilities & UART_CAP_RPM) { in omap_8250_tx_dma()
978 ret = -EBUSY; in omap_8250_tx_dma()
985 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in omap_8250_tx_dma()
986 if (priv->habit & OMAP_DMA_TX_KICK) { in omap_8250_tx_dma()
1000 * 86us at 115200,8n1 but around 60us (not to mention lower in omap_8250_tx_dma()
1005 if (tx_lvl == p->tx_loadsz) { in omap_8250_tx_dma()
1006 ret = -EBUSY; in omap_8250_tx_dma()
1009 if (dma->tx_size < 4) { in omap_8250_tx_dma()
1010 ret = -EINVAL; in omap_8250_tx_dma()
1016 desc = dmaengine_prep_slave_single(dma->txchan, in omap_8250_tx_dma()
1017 dma->tx_addr + xmit->tail + skip_byte, in omap_8250_tx_dma()
1018 dma->tx_size - skip_byte, DMA_MEM_TO_DEV, in omap_8250_tx_dma()
1021 ret = -EBUSY; in omap_8250_tx_dma()
1025 dma->tx_running = 1; in omap_8250_tx_dma()
1027 desc->callback = omap_8250_dma_tx_complete; in omap_8250_tx_dma()
1028 desc->callback_param = p; in omap_8250_tx_dma()
1030 dma->tx_cookie = dmaengine_submit(desc); in omap_8250_tx_dma()
1032 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, in omap_8250_tx_dma()
1035 dma_async_issue_pending(dma->txchan); in omap_8250_tx_dma()
1036 if (dma->tx_err) in omap_8250_tx_dma()
1037 dma->tx_err = 0; in omap_8250_tx_dma()
1041 serial_out(p, UART_TX, xmit->buf[xmit->tail]); in omap_8250_tx_dma()
1044 dma->tx_err = 1; in omap_8250_tx_dma()
1081 (up->ier & UART_IER_RDI)) { in am654_8250_handle_rx_dma()
1088 * periodic timeouts, re-enable interrupts. in am654_8250_handle_rx_dma()
1090 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in am654_8250_handle_rx_dma()
1091 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1095 up->ier |= UART_IER_RLSI | UART_IER_RDI; in am654_8250_handle_rx_dma()
1096 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1103 * use the default routine in the non-DMA case and this one for with DMA.
1108 struct omap8250_priv *priv = up->port.private_data; in omap_8250_dma_handle_irq()
1121 spin_lock_irqsave(&port->lock, flags); in omap_8250_dma_handle_irq()
1125 if (priv->habit & UART_HAS_EFR2) in omap_8250_dma_handle_irq()
1131 if (status & UART_LSR_THRE && up->dma->tx_err) { in omap_8250_dma_handle_irq()
1132 if (uart_tx_stopped(&up->port) || in omap_8250_dma_handle_irq()
1133 uart_circ_empty(&up->port.state->xmit)) { in omap_8250_dma_handle_irq()
1134 up->dma->tx_err = 0; in omap_8250_dma_handle_irq()
1160 return -EINVAL; in omap_8250_rx_dma()
1199 { .compatible = "ti,am654-uart", .data = &am654_platdata, },
1200 { .compatible = "ti,omap2-uart" },
1201 { .compatible = "ti,omap3-uart" },
1202 { .compatible = "ti,omap4-uart", .data = &omap4_platdata, },
1203 { .compatible = "ti,am3352-uart", .data = &am33xx_platdata, },
1204 { .compatible = "ti,am4372-uart", .data = &am33xx_platdata, },
1205 { .compatible = "ti,dra742-uart", .data = &omap4_platdata, },
1212 struct device_node *np = pdev->dev.of_node; in omap8250_probe()
1226 dev_err(&pdev->dev, "missing registers\n"); in omap8250_probe()
1227 return -EINVAL; in omap8250_probe()
1230 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in omap8250_probe()
1232 return -ENOMEM; in omap8250_probe()
1234 membase = devm_ioremap(&pdev->dev, regs->start, in omap8250_probe()
1237 return -ENODEV; in omap8250_probe()
1240 up.port.dev = &pdev->dev; in omap8250_probe()
1241 up.port.mapbase = regs->start; in omap8250_probe()
1285 dev_err(&pdev->dev, "failed to get alias\n"); in omap8250_probe()
1290 if (of_property_read_u32(np, "clock-frequency", &up.port.uartclk)) { in omap8250_probe()
1293 clk = devm_clk_get(&pdev->dev, NULL); in omap8250_probe()
1295 if (PTR_ERR(clk) == -EPROBE_DEFER) in omap8250_probe()
1296 return -EPROBE_DEFER; in omap8250_probe()
1302 priv->wakeirq = irq_of_parse_and_map(np, 1); in omap8250_probe()
1304 pdata = of_device_get_match_data(&pdev->dev); in omap8250_probe()
1306 priv->habit |= pdata->habit; in omap8250_probe()
1310 dev_warn(&pdev->dev, in omap8250_probe()
1315 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1316 priv->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1317 cpu_latency_qos_add_request(&priv->pm_qos_request, priv->latency); in omap8250_probe()
1318 INIT_WORK(&priv->qos_work, omap8250_uart_qos_work); in omap8250_probe()
1320 spin_lock_init(&priv->rx_dma_lock); in omap8250_probe()
1322 device_init_wakeup(&pdev->dev, true); in omap8250_probe()
1323 pm_runtime_enable(&pdev->dev); in omap8250_probe()
1324 pm_runtime_use_autosuspend(&pdev->dev); in omap8250_probe()
1329 * prevent an unsafe default policy with lossy characters on wake-up. in omap8250_probe()
1333 if (!of_get_available_child_count(pdev->dev.of_node)) in omap8250_probe()
1334 pm_runtime_set_autosuspend_delay(&pdev->dev, -1); in omap8250_probe()
1336 pm_runtime_irq_safe(&pdev->dev); in omap8250_probe()
1338 pm_runtime_get_sync(&pdev->dev); in omap8250_probe()
1342 priv->rx_trigger = RX_TRIGGER; in omap8250_probe()
1343 priv->tx_trigger = TX_TRIGGER; in omap8250_probe()
1353 ret = of_property_count_strings(np, "dma-names"); in omap8250_probe()
1357 up.dma = &priv->omap8250_dma; in omap8250_probe()
1358 up.dma->fn = the_no_dma_filter_fn; in omap8250_probe()
1359 up.dma->tx_dma = omap_8250_tx_dma; in omap8250_probe()
1360 up.dma->rx_dma = omap_8250_rx_dma; in omap8250_probe()
1362 dma_params = pdata->dma_params; in omap8250_probe()
1365 up.dma->rx_size = dma_params->rx_size; in omap8250_probe()
1366 up.dma->rxconf.src_maxburst = dma_params->rx_trigger; in omap8250_probe()
1367 up.dma->txconf.dst_maxburst = dma_params->tx_trigger; in omap8250_probe()
1368 priv->rx_trigger = dma_params->rx_trigger; in omap8250_probe()
1369 priv->tx_trigger = dma_params->tx_trigger; in omap8250_probe()
1371 up.dma->rx_size = RX_TRIGGER; in omap8250_probe()
1372 up.dma->rxconf.src_maxburst = RX_TRIGGER; in omap8250_probe()
1373 up.dma->txconf.dst_maxburst = TX_TRIGGER; in omap8250_probe()
1379 dev_err(&pdev->dev, "unable to register 8250 port\n"); in omap8250_probe()
1382 priv->line = ret; in omap8250_probe()
1384 pm_runtime_mark_last_busy(&pdev->dev); in omap8250_probe()
1385 pm_runtime_put_autosuspend(&pdev->dev); in omap8250_probe()
1388 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_probe()
1389 pm_runtime_put_sync(&pdev->dev); in omap8250_probe()
1390 pm_runtime_disable(&pdev->dev); in omap8250_probe()
1398 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_remove()
1399 pm_runtime_put_sync(&pdev->dev); in omap8250_remove()
1400 pm_runtime_disable(&pdev->dev); in omap8250_remove()
1401 serial8250_unregister_port(priv->line); in omap8250_remove()
1402 cpu_latency_qos_remove_request(&priv->pm_qos_request); in omap8250_remove()
1403 device_init_wakeup(&pdev->dev, false); in omap8250_remove()
1414 priv->is_suspending = true; in omap8250_prepare()
1424 priv->is_suspending = false; in omap8250_complete()
1430 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_suspend()
1432 serial8250_suspend_port(priv->line); in omap8250_suspend()
1436 priv->wer = 0; in omap8250_suspend()
1437 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_suspend()
1441 flush_work(&priv->qos_work); in omap8250_suspend()
1449 serial8250_resume_port(priv->line); in omap8250_resume()
1477 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_soft_reset()
1501 /* By experiments, 1us enough for reset complete on AM335x */ in omap8250_soft_reset()
1505 } while (--timeout && !(syss & OMAP_UART_SYSS_RESETDONE)); in omap8250_soft_reset()
1509 return -ETIMEDOUT; in omap8250_soft_reset()
1520 /* In case runtime-pm tries this before we are setup */ in omap8250_runtime_suspend()
1524 up = serial8250_get_port(priv->line); in omap8250_runtime_suspend()
1531 if (priv->is_suspending && !console_suspend_enabled) { in omap8250_runtime_suspend()
1532 if (uart_console(&up->port)) in omap8250_runtime_suspend()
1533 return -EBUSY; in omap8250_runtime_suspend()
1536 if (priv->habit & UART_ERRATA_CLOCK_DISABLE) { in omap8250_runtime_suspend()
1543 /* Restore to UART mode after reset (for wakeup) */ in omap8250_runtime_suspend()
1545 /* Restore wakeup enable register */ in omap8250_runtime_suspend()
1546 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_runtime_suspend()
1549 if (up->dma && up->dma->rxchan) in omap8250_runtime_suspend()
1552 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_runtime_suspend()
1553 schedule_work(&priv->qos_work); in omap8250_runtime_suspend()
1563 /* In case runtime-pm tries this before we are setup */ in omap8250_runtime_resume()
1567 up = serial8250_get_port(priv->line); in omap8250_runtime_resume()
1572 if (up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) in omap8250_runtime_resume()
1575 priv->latency = priv->calc_latency; in omap8250_runtime_resume()
1576 schedule_work(&priv->qos_work); in omap8250_runtime_resume()
1599 idx = *omap_str - '0'; in omap8250_console_fixup()