1 // SPDX-License-Identifier: GPL-2.0
36 				struct serial_rs485 *rs485)  in lpc18xx_rs485_config()  argument
43 	if (rs485->flags & SER_RS485_ENABLED)  in lpc18xx_rs485_config()
44 		memset(rs485->padding, 0, sizeof(rs485->padding));  in lpc18xx_rs485_config()
46 		memset(rs485, 0, sizeof(*rs485));  in lpc18xx_rs485_config()
48 	rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |  in lpc18xx_rs485_config()
51 	if (rs485->flags & SER_RS485_ENABLED) {  in lpc18xx_rs485_config()
55 		if (rs485->flags & SER_RS485_RTS_ON_SEND) {  in lpc18xx_rs485_config()
57 			rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;  in lpc18xx_rs485_config()
59 			rs485->flags |= SER_RS485_RTS_AFTER_SEND;  in lpc18xx_rs485_config()
63 	if (rs485->delay_rts_after_send) {  in lpc18xx_rs485_config()
64 		baud_clk = port->uartclk / up->dl_read(up);  in lpc18xx_rs485_config()
65 		rs485_dly_reg = DIV_ROUND_UP(rs485->delay_rts_after_send  in lpc18xx_rs485_config()
71 		/* Calculate the resulting delay in ms */  in lpc18xx_rs485_config()
72 		rs485->delay_rts_after_send = (rs485_dly_reg * MSEC_PER_SEC)  in lpc18xx_rs485_config()
76 	/* Delay RTS before send not supported */  in lpc18xx_rs485_config()
77 	rs485->delay_rts_before_send = 0;  in lpc18xx_rs485_config()
82 	port->rs485 = *rs485;  in lpc18xx_rs485_config()
97 	offset = offset << p->regshift;  in lpc18xx_uart_serial_out()
98 	writel(value, p->membase + offset);  in lpc18xx_uart_serial_out()
114 		dev_err(&pdev->dev, "memory resource not found");  in lpc18xx_serial_probe()
115 		return -EINVAL;  in lpc18xx_serial_probe()
120 	uart.port.membase = devm_ioremap(&pdev->dev, res->start,  in lpc18xx_serial_probe()
123 		return -ENOMEM;  in lpc18xx_serial_probe()
125 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);  in lpc18xx_serial_probe()
127 		return -ENOMEM;  in lpc18xx_serial_probe()
129 	data->clk_uart = devm_clk_get(&pdev->dev, "uartclk");  in lpc18xx_serial_probe()
130 	if (IS_ERR(data->clk_uart)) {  in lpc18xx_serial_probe()
131 		dev_err(&pdev->dev, "uart clock not found\n");  in lpc18xx_serial_probe()
132 		return PTR_ERR(data->clk_uart);  in lpc18xx_serial_probe()
135 	data->clk_reg = devm_clk_get(&pdev->dev, "reg");  in lpc18xx_serial_probe()
136 	if (IS_ERR(data->clk_reg)) {  in lpc18xx_serial_probe()
137 		dev_err(&pdev->dev, "reg clock not found\n");  in lpc18xx_serial_probe()
138 		return PTR_ERR(data->clk_reg);  in lpc18xx_serial_probe()
141 	ret = clk_prepare_enable(data->clk_reg);  in lpc18xx_serial_probe()
143 		dev_err(&pdev->dev, "unable to enable reg clock\n");  in lpc18xx_serial_probe()
147 	ret = clk_prepare_enable(data->clk_uart);  in lpc18xx_serial_probe()
149 		dev_err(&pdev->dev, "unable to enable uart clock\n");  in lpc18xx_serial_probe()
153 	ret = of_alias_get_id(pdev->dev.of_node, "serial");  in lpc18xx_serial_probe()
157 	data->dma.rx_param = data;  in lpc18xx_serial_probe()
158 	data->dma.tx_param = data;  in lpc18xx_serial_probe()
161 	uart.port.dev = &pdev->dev;  in lpc18xx_serial_probe()
164 	uart.port.mapbase = res->start;  in lpc18xx_serial_probe()
168 	uart.port.uartclk = clk_get_rate(data->clk_uart);  in lpc18xx_serial_probe()
173 	uart.dma = &data->dma;  in lpc18xx_serial_probe()
174 	uart.dma->rxconf.src_maxburst = 1;  in lpc18xx_serial_probe()
175 	uart.dma->txconf.dst_maxburst = 1;  in lpc18xx_serial_probe()
179 		dev_err(&pdev->dev, "unable to register 8250 port\n");  in lpc18xx_serial_probe()
183 	data->line = ret;  in lpc18xx_serial_probe()
189 	clk_disable_unprepare(data->clk_uart);  in lpc18xx_serial_probe()
191 	clk_disable_unprepare(data->clk_reg);  in lpc18xx_serial_probe()
199 	serial8250_unregister_port(data->line);  in lpc18xx_serial_remove()
200 	clk_disable_unprepare(data->clk_uart);  in lpc18xx_serial_remove()
201 	clk_disable_unprepare(data->clk_reg);  in lpc18xx_serial_remove()
207 	{ .compatible = "nxp,lpc1850-uart" },
216 		.name = "lpc18xx-uart",