1 // SPDX-License-Identifier: GPL-2.0
48  * struct tb_dma_port - DMA control port
68 	u64 route = tb_cfg_get_route(pkg->buffer) & ~BIT_ULL(63);  in dma_port_match()
70 	if (pkg->frame.eof == TB_CFG_PKG_ERROR)  in dma_port_match()
72 	if (pkg->frame.eof != req->response_type)  in dma_port_match()
74 	if (route != tb_cfg_get_route(req->request))  in dma_port_match()
76 	if (pkg->frame.size != req->response_size)  in dma_port_match()
84 	memcpy(req->response, pkg->buffer, req->response_size);  in dma_port_copy()
107 		return -ENOMEM;  in dma_port_read()
109 	req->match = dma_port_match;  in dma_port_read()
110 	req->copy = dma_port_copy;  in dma_port_read()
111 	req->request = &request;  in dma_port_read()
112 	req->request_size = sizeof(request);  in dma_port_read()
113 	req->request_type = TB_CFG_PKG_READ;  in dma_port_read()
114 	req->response = &reply;  in dma_port_read()
115 	req->response_size = 12 + 4 * length;  in dma_port_read()
116 	req->response_type = TB_CFG_PKG_READ;  in dma_port_read()
150 		return -ENOMEM;  in dma_port_write()
152 	req->match = dma_port_match;  in dma_port_write()
153 	req->copy = dma_port_copy;  in dma_port_write()
154 	req->request = &request;  in dma_port_write()
155 	req->request_size = 12 + 4 * length;  in dma_port_write()
156 	req->request_type = TB_CFG_PKG_WRITE;  in dma_port_write()
157 	req->response = &reply;  in dma_port_write()
158 	req->response_size = sizeof(reply);  in dma_port_write()
159 	req->response_type = TB_CFG_PKG_WRITE;  in dma_port_write()
181 		ret = dma_port_read(sw->tb->ctl, &type, tb_route(sw), ports[i],  in dma_find_port()
187 	return -ENODEV;  in dma_find_port()
191  * dma_port_alloc() - Finds DMA control port from a switch pointed by route
214 	dma->buf = kmalloc_array(MAIL_DATA_DWORDS, sizeof(u32), GFP_KERNEL);  in dma_port_alloc()
215 	if (!dma->buf) {  in dma_port_alloc()
220 	dma->sw = sw;  in dma_port_alloc()
221 	dma->port = port;  in dma_port_alloc()
222 	dma->base = DMA_PORT_CAP;  in dma_port_alloc()
228  * dma_port_free() - Release DMA control port structure
234 		kfree(dma->buf);  in dma_port_free()
243 	struct tb_switch *sw = dma->sw;  in dma_port_wait_for_completion()
249 		ret = dma_port_read(sw->tb->ctl, &in, tb_route(sw), dma->port,  in dma_port_wait_for_completion()
250 				    dma->base + MAIL_IN, 1, 50);  in dma_port_wait_for_completion()
252 			if (ret != -ETIMEDOUT)  in dma_port_wait_for_completion()
261 	return -ETIMEDOUT;  in dma_port_wait_for_completion()
270 		return -EINVAL;  in status_to_errno()
272 		return -EACCES;  in status_to_errno()
275 	return -EIO;  in status_to_errno()
281 	struct tb_switch *sw = dma->sw;  in dma_port_request()
285 	ret = dma_port_write(sw->tb->ctl, &in, tb_route(sw), dma->port,  in dma_port_request()
286 			     dma->base + MAIL_IN, 1, DMA_PORT_TIMEOUT);  in dma_port_request()
294 	ret = dma_port_read(sw->tb->ctl, &out, tb_route(sw), dma->port,  in dma_port_request()
295 			    dma->base + MAIL_OUT, 1, DMA_PORT_TIMEOUT);  in dma_port_request()
305 	struct tb_switch *sw = dma->sw;  in dma_port_flash_read_block()
322 	return dma_port_read(sw->tb->ctl, buf, tb_route(sw), dma->port,  in dma_port_flash_read_block()
323 			     dma->base + MAIL_DATA, dwords, DMA_PORT_TIMEOUT);  in dma_port_flash_read_block()
329 	struct tb_switch *sw = dma->sw;  in dma_port_flash_write_block()
336 	ret = dma_port_write(sw->tb->ctl, buf, tb_route(sw), dma->port,  in dma_port_flash_write_block()
337 			    dma->base + MAIL_DATA, dwords, DMA_PORT_TIMEOUT);  in dma_port_flash_write_block()
349 	in |= ((dwords - 1) << MAIL_IN_DWORDS_SHIFT) & MAIL_IN_DWORDS_MASK;  in dma_port_flash_write_block()
357  * dma_port_flash_read() - Read from active flash region
376 		ret = dma_port_flash_read_block(dma, address, dma->buf,  in dma_port_flash_read()
379 			if (ret == -ETIMEDOUT) {  in dma_port_flash_read()
380 				if (retries--)  in dma_port_flash_read()
382 				ret = -EIO;  in dma_port_flash_read()
387 		memcpy(buf, dma->buf + offset, nbytes);  in dma_port_flash_read()
389 		size -= nbytes;  in dma_port_flash_read()
398  * dma_port_flash_write() - Write to non-active flash region
400  * @address: Address relative to the start of non-active region
404  * Writes block of data to the non-active flash region of the switch. If
417 			return -E2BIG;  in dma_port_flash_write()
427 		memcpy(dma->buf + offset, buf, nbytes);  in dma_port_flash_write()
431 			if (ret == -ETIMEDOUT) {  in dma_port_flash_write()
432 				if (retries--)  in dma_port_flash_write()
434 				ret = -EIO;  in dma_port_flash_write()
439 		size -= nbytes;  in dma_port_flash_write()
448  * dma_port_flash_update_auth() - Starts flash authenticate cycle
451  * Starts the flash update authentication cycle. If the image in the
452  * non-active area was valid, the switch starts upgrade process where
453  * active and non-active area get swapped in the end. Caller should call
469  * dma_port_flash_update_auth_status() - Reads status of update auth command
483 	struct tb_switch *sw = dma->sw;  in dma_port_flash_update_auth_status()
487 	ret = dma_port_read(sw->tb->ctl, &out, tb_route(sw), dma->port,  in dma_port_flash_update_auth_status()
488 			    dma->base + MAIL_OUT, 1, DMA_PORT_TIMEOUT);  in dma_port_flash_update_auth_status()
492 	/* Check if the status relates to flash update auth */  in dma_port_flash_update_auth_status()
506  * dma_port_power_cycle() - Power cycles the switch