Lines Matching +full:on +full:- +full:chip
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
42 * Trip point values based on threshold control
75 /* protects .thresh, .stage and chip registers */
85 static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data) in qpnp_tm_read() argument
90 ret = regmap_read(chip->map, chip->base + addr, &val); in qpnp_tm_read()
98 static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data) in qpnp_tm_write() argument
100 return regmap_write(chip->map, chip->base + addr, data); in qpnp_tm_write()
104 * qpnp_tm_get_temp_stage() - return over-temperature stage
105 * @chip: Pointer to the qpnp_tm chip
107 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
109 static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip) in qpnp_tm_get_temp_stage() argument
114 ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®); in qpnp_tm_get_temp_stage()
118 if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) in qpnp_tm_get_temp_stage()
127 * This function updates the internal temp value based on the
130 static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip) in qpnp_tm_update_temp_no_adc() argument
135 WARN_ON(!mutex_is_locked(&chip->lock)); in qpnp_tm_update_temp_no_adc()
137 ret = qpnp_tm_get_temp_stage(chip); in qpnp_tm_update_temp_no_adc()
142 if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) { in qpnp_tm_update_temp_no_adc()
144 stage_old = chip->stage; in qpnp_tm_update_temp_no_adc()
147 stage_old = alarm_state_map[chip->stage]; in qpnp_tm_update_temp_no_adc()
152 chip->temp = (stage_new - 1) * TEMP_STAGE_STEP + in qpnp_tm_update_temp_no_adc()
153 chip->thresh * TEMP_THRESH_STEP + in qpnp_tm_update_temp_no_adc()
157 chip->temp = stage_new * TEMP_STAGE_STEP + in qpnp_tm_update_temp_no_adc()
158 chip->thresh * TEMP_THRESH_STEP - in qpnp_tm_update_temp_no_adc()
162 chip->stage = stage; in qpnp_tm_update_temp_no_adc()
169 struct qpnp_tm_chip *chip = data; in qpnp_tm_get_temp() local
173 return -EINVAL; in qpnp_tm_get_temp()
175 if (!chip->initialized) { in qpnp_tm_get_temp()
180 if (!chip->adc) { in qpnp_tm_get_temp()
181 mutex_lock(&chip->lock); in qpnp_tm_get_temp()
182 ret = qpnp_tm_update_temp_no_adc(chip); in qpnp_tm_get_temp()
183 mutex_unlock(&chip->lock); in qpnp_tm_get_temp()
187 ret = iio_read_channel_processed(chip->adc, &mili_celsius); in qpnp_tm_get_temp()
191 chip->temp = mili_celsius; in qpnp_tm_get_temp()
194 *temp = chip->temp; in qpnp_tm_get_temp()
199 static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip, in qpnp_tm_update_critical_trip_temp() argument
205 WARN_ON(!mutex_is_locked(&chip->lock)); in qpnp_tm_update_critical_trip_temp()
215 chip->thresh = THRESH_MIN; in qpnp_tm_update_critical_trip_temp()
220 chip->thresh = THRESH_MAX - in qpnp_tm_update_critical_trip_temp()
221 ((STAGE2_THRESHOLD_MAX - temp) / in qpnp_tm_update_critical_trip_temp()
225 chip->thresh = THRESH_MAX; in qpnp_tm_update_critical_trip_temp()
227 if (chip->adc) in qpnp_tm_update_critical_trip_temp()
230 dev_warn(chip->dev, in qpnp_tm_update_critical_trip_temp()
235 reg |= chip->thresh; in qpnp_tm_update_critical_trip_temp()
239 return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg); in qpnp_tm_update_critical_trip_temp()
244 struct qpnp_tm_chip *chip = data; in qpnp_tm_set_trip_temp() local
248 trip_points = of_thermal_get_trip_points(chip->tz_dev); in qpnp_tm_set_trip_temp()
250 return -EINVAL; in qpnp_tm_set_trip_temp()
255 mutex_lock(&chip->lock); in qpnp_tm_set_trip_temp()
256 ret = qpnp_tm_update_critical_trip_temp(chip, temp); in qpnp_tm_set_trip_temp()
257 mutex_unlock(&chip->lock); in qpnp_tm_set_trip_temp()
269 struct qpnp_tm_chip *chip = data; in qpnp_tm_isr() local
271 thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED); in qpnp_tm_isr()
276 static int qpnp_tm_get_critical_trip_temp(struct qpnp_tm_chip *chip) in qpnp_tm_get_critical_trip_temp() argument
282 ntrips = of_thermal_get_ntrips(chip->tz_dev); in qpnp_tm_get_critical_trip_temp()
286 trips = of_thermal_get_trip_points(chip->tz_dev); in qpnp_tm_get_critical_trip_temp()
291 if (of_thermal_is_trip_valid(chip->tz_dev, i) && in qpnp_tm_get_critical_trip_temp()
300 * This function initializes the internal temp value based on only the
304 static int qpnp_tm_init(struct qpnp_tm_chip *chip) in qpnp_tm_init() argument
311 mutex_lock(&chip->lock); in qpnp_tm_init()
313 ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®); in qpnp_tm_init()
317 chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK; in qpnp_tm_init()
318 chip->temp = DEFAULT_TEMP; in qpnp_tm_init()
320 ret = qpnp_tm_get_temp_stage(chip); in qpnp_tm_init()
323 chip->stage = ret; in qpnp_tm_init()
325 stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1 in qpnp_tm_init()
326 ? chip->stage : alarm_state_map[chip->stage]; in qpnp_tm_init()
329 chip->temp = chip->thresh * TEMP_THRESH_STEP + in qpnp_tm_init()
330 (stage - 1) * TEMP_STAGE_STEP + in qpnp_tm_init()
333 crit_temp = qpnp_tm_get_critical_trip_temp(chip); in qpnp_tm_init()
334 ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp); in qpnp_tm_init()
338 /* Enable the thermal alarm PMIC module in always-on mode. */ in qpnp_tm_init()
340 ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg); in qpnp_tm_init()
342 chip->initialized = true; in qpnp_tm_init()
345 mutex_unlock(&chip->lock); in qpnp_tm_init()
351 struct qpnp_tm_chip *chip; in qpnp_tm_probe() local
357 node = pdev->dev.of_node; in qpnp_tm_probe()
359 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); in qpnp_tm_probe()
360 if (!chip) in qpnp_tm_probe()
361 return -ENOMEM; in qpnp_tm_probe()
363 dev_set_drvdata(&pdev->dev, chip); in qpnp_tm_probe()
364 chip->dev = &pdev->dev; in qpnp_tm_probe()
366 mutex_init(&chip->lock); in qpnp_tm_probe()
368 chip->map = dev_get_regmap(pdev->dev.parent, NULL); in qpnp_tm_probe()
369 if (!chip->map) in qpnp_tm_probe()
370 return -ENXIO; in qpnp_tm_probe()
381 chip->adc = devm_iio_channel_get(&pdev->dev, "thermal"); in qpnp_tm_probe()
382 if (IS_ERR(chip->adc)) { in qpnp_tm_probe()
383 ret = PTR_ERR(chip->adc); in qpnp_tm_probe()
384 chip->adc = NULL; in qpnp_tm_probe()
385 if (ret == -EPROBE_DEFER) in qpnp_tm_probe()
389 chip->base = res; in qpnp_tm_probe()
391 ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type); in qpnp_tm_probe()
393 dev_err(&pdev->dev, "could not read type\n"); in qpnp_tm_probe()
397 ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype); in qpnp_tm_probe()
399 dev_err(&pdev->dev, "could not read subtype\n"); in qpnp_tm_probe()
405 dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n", in qpnp_tm_probe()
407 return -ENODEV; in qpnp_tm_probe()
410 chip->subtype = subtype; in qpnp_tm_probe()
417 chip->tz_dev = devm_thermal_zone_of_sensor_register( in qpnp_tm_probe()
418 &pdev->dev, 0, chip, &qpnp_tm_sensor_ops); in qpnp_tm_probe()
419 if (IS_ERR(chip->tz_dev)) { in qpnp_tm_probe()
420 dev_err(&pdev->dev, "failed to register sensor\n"); in qpnp_tm_probe()
421 return PTR_ERR(chip->tz_dev); in qpnp_tm_probe()
424 ret = qpnp_tm_init(chip); in qpnp_tm_probe()
426 dev_err(&pdev->dev, "init failed\n"); in qpnp_tm_probe()
430 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr, in qpnp_tm_probe()
431 IRQF_ONESHOT, node->name, chip); in qpnp_tm_probe()
435 thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED); in qpnp_tm_probe()
441 { .compatible = "qcom,spmi-temp-alarm" },
448 .name = "spmi-temp-alarm",
455 MODULE_ALIAS("platform:spmi-temp-alarm");