Lines Matching +full:spi +full:- +full:gpio
2 * TXx9 SPI controller driver.
5 * Copyright (C) 2000-2001 Toshiba Corporation
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
14 * Convert to generic SPI framework - Atsushi Nemoto (anemo@mba.ocn.ne.jp)
24 #include <linux/spi/spi.h>
29 #include <linux/gpio/machine.h>
30 #include <linux/gpio/consumer.h>
44 /* SPMCR : SPI Master Control */
51 /* SPCR0 : SPI Control 0 */
63 /* SPSR : SPI Status */
89 return __raw_readl(c->membase + reg); in txx9spi_rd()
93 __raw_writel(val, c->membase + reg); in txx9spi_wr()
96 static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c, in txx9spi_cs_func() argument
100 * The GPIO descriptor will track polarity inversion inside in txx9spi_cs_func()
105 if (c->last_chipselect) in txx9spi_cs_func()
106 gpiod_set_value(c->last_chipselect, in txx9spi_cs_func()
107 !c->last_chipselect_val); in txx9spi_cs_func()
108 c->last_chipselect = spi->cs_gpiod; in txx9spi_cs_func()
109 c->last_chipselect_val = on; in txx9spi_cs_func()
111 c->last_chipselect = NULL; in txx9spi_cs_func()
114 gpiod_set_value(spi->cs_gpiod, on); in txx9spi_cs_func()
118 static int txx9spi_setup(struct spi_device *spi) in txx9spi_setup() argument
120 struct txx9spi *c = spi_master_get_devdata(spi->master); in txx9spi_setup()
122 if (!spi->max_speed_hz) in txx9spi_setup()
123 return -EINVAL; in txx9spi_setup()
126 spin_lock(&c->lock); in txx9spi_setup()
127 txx9spi_cs_func(spi, c, 0, (NSEC_PER_SEC / 2) / spi->max_speed_hz); in txx9spi_setup()
128 spin_unlock(&c->lock); in txx9spi_setup()
140 wake_up(&c->waitq); in txx9spi_interrupt()
146 struct spi_device *spi = m->spi; in txx9spi_work_one() local
156 cs_delay = 100 + (NSEC_PER_SEC / 2) / spi->max_speed_hz; in txx9spi_work_one()
160 dev_err(&spi->dev, "Bad mode.\n"); in txx9spi_work_one()
161 status = -EIO; in txx9spi_work_one()
169 | ((spi->mode & SPI_CPOL) ? TXx9_SPCR0_SPOL : 0) in txx9spi_work_one()
170 | ((spi->mode & SPI_CPHA) ? TXx9_SPCR0_SPHA : 0) in txx9spi_work_one()
174 list_for_each_entry(t, &m->transfers, transfer_list) { in txx9spi_work_one()
175 const void *txbuf = t->tx_buf; in txx9spi_work_one()
176 void *rxbuf = t->rx_buf; in txx9spi_work_one()
178 unsigned int len = t->len; in txx9spi_work_one()
180 u32 speed_hz = t->speed_hz; in txx9spi_work_one()
181 u8 bits_per_word = t->bits_per_word; in txx9spi_work_one()
187 int n = DIV_ROUND_UP(c->baseclk, speed_hz) - 1; in txx9spi_work_one()
202 txx9spi_cs_func(spi, c, 1, cs_delay); in txx9spi_work_one()
203 cs_change = t->cs_change; in txx9spi_work_one()
216 cr0 |= (count - 1) << 12; in txx9spi_work_one()
232 wait_event(c->waitq, in txx9spi_work_one()
245 len -= count * wsize; in txx9spi_work_one()
247 m->actual_length += t->len; in txx9spi_work_one()
252 if (t->transfer_list.next == &m->transfers) in txx9spi_work_one()
254 /* sometimes a short mid-message deselect of the chip in txx9spi_work_one()
257 txx9spi_cs_func(spi, c, 0, cs_delay); in txx9spi_work_one()
261 m->status = status; in txx9spi_work_one()
262 if (m->complete) in txx9spi_work_one()
263 m->complete(m->context); in txx9spi_work_one()
270 txx9spi_cs_func(spi, c, 0, cs_delay); in txx9spi_work_one()
281 spin_lock_irqsave(&c->lock, flags); in txx9spi_work()
282 while (!list_empty(&c->queue)) { in txx9spi_work()
285 m = container_of(c->queue.next, struct spi_message, queue); in txx9spi_work()
286 list_del_init(&m->queue); in txx9spi_work()
287 spin_unlock_irqrestore(&c->lock, flags); in txx9spi_work()
291 spin_lock_irqsave(&c->lock, flags); in txx9spi_work()
293 spin_unlock_irqrestore(&c->lock, flags); in txx9spi_work()
296 static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m) in txx9spi_transfer() argument
298 struct spi_master *master = spi->master; in txx9spi_transfer()
303 m->actual_length = 0; in txx9spi_transfer()
306 list_for_each_entry(t, &m->transfers, transfer_list) { in txx9spi_transfer()
307 if (!t->tx_buf && !t->rx_buf && t->len) in txx9spi_transfer()
308 return -EINVAL; in txx9spi_transfer()
311 spin_lock_irqsave(&c->lock, flags); in txx9spi_transfer()
312 list_add_tail(&m->queue, &c->queue); in txx9spi_transfer()
313 schedule_work(&c->work); in txx9spi_transfer()
314 spin_unlock_irqrestore(&c->lock, flags); in txx9spi_transfer()
320 * Chip select uses GPIO only, further the driver is using the chip select
323 * the GPIO number. As the platform has only one GPIO controller (the txx9 GPIO
329 * offset on the GPIO chip using a GPIO descriptor machine table of the same
330 * size as the txx9 GPIO chip with a 1-to-1 mapping of chip select to GPIO
334 * contain a GPIO offset when it should be using "cs-gpios" as the SPI bindings
365 int ret = -ENODEV; in txx9spi_probe()
369 master = spi_alloc_master(&dev->dev, sizeof(*c)); in txx9spi_probe()
375 INIT_WORK(&c->work, txx9spi_work); in txx9spi_probe()
376 spin_lock_init(&c->lock); in txx9spi_probe()
377 INIT_LIST_HEAD(&c->queue); in txx9spi_probe()
378 init_waitqueue_head(&c->waitq); in txx9spi_probe()
380 c->clk = devm_clk_get(&dev->dev, "spi-baseclk"); in txx9spi_probe()
381 if (IS_ERR(c->clk)) { in txx9spi_probe()
382 ret = PTR_ERR(c->clk); in txx9spi_probe()
383 c->clk = NULL; in txx9spi_probe()
386 ret = clk_prepare_enable(c->clk); in txx9spi_probe()
388 c->clk = NULL; in txx9spi_probe()
391 c->baseclk = clk_get_rate(c->clk); in txx9spi_probe()
392 master->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1); in txx9spi_probe()
393 master->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1); in txx9spi_probe()
396 c->membase = devm_ioremap_resource(&dev->dev, res); in txx9spi_probe()
397 if (IS_ERR(c->membase)) in txx9spi_probe()
408 ret = devm_request_irq(&dev->dev, irq, txx9spi_interrupt, 0, in txx9spi_probe()
413 c->last_chipselect = NULL; in txx9spi_probe()
415 dev_info(&dev->dev, "at %#llx, irq %d, %dMHz\n", in txx9spi_probe()
416 (unsigned long long)res->start, irq, in txx9spi_probe()
417 (c->baseclk + 500000) / 1000000); in txx9spi_probe()
421 /* the spi->mode bits understood by this driver: */ in txx9spi_probe()
422 master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; in txx9spi_probe()
424 master->bus_num = dev->id; in txx9spi_probe()
425 master->setup = txx9spi_setup; in txx9spi_probe()
426 master->transfer = txx9spi_transfer; in txx9spi_probe()
427 master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */ in txx9spi_probe()
428 master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); in txx9spi_probe()
429 master->use_gpio_descriptors = true; in txx9spi_probe()
431 ret = devm_spi_register_master(&dev->dev, master); in txx9spi_probe()
436 ret = -EBUSY; in txx9spi_probe()
438 clk_disable_unprepare(c->clk); in txx9spi_probe()
448 flush_work(&c->work); in txx9spi_remove()
449 clk_disable_unprepare(c->clk); in txx9spi_remove()
476 MODULE_DESCRIPTION("TXx9 SPI Driver");