Lines Matching +full:spi +full:- +full:rx +full:- +full:delay +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/dma-mapping.h>
7 #include <linux/dma/sprd-dma.h>
18 #include <linux/spi/spi.h>
125 /* Default & maximum word delay cycles */
178 * SPI transmission time. in sprd_spi_transfer_max_timeout()
180 u32 size = t->bits_per_word * SPRD_SPI_FIFO_SIZE; in sprd_spi_transfer_max_timeout()
181 u32 bit_time_us = DIV_ROUND_UP(USEC_PER_SEC, ss->hw_speed_hz); in sprd_spi_transfer_max_timeout()
184 * There is an interval between data and the data in our SPI hardware, in sprd_spi_transfer_max_timeout()
187 u32 interval_cycle = SPRD_SPI_FIFO_SIZE * ss->word_delay; in sprd_spi_transfer_max_timeout()
189 ss->src_clk); in sprd_spi_transfer_max_timeout()
196 u32 val, us; in sprd_spi_wait_for_tx_end() local
199 us = sprd_spi_transfer_max_timeout(ss, t); in sprd_spi_wait_for_tx_end()
200 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_INT_RAW_STS, val, in sprd_spi_wait_for_tx_end()
201 val & SPRD_SPI_TX_END_IRQ, 0, us); in sprd_spi_wait_for_tx_end()
203 dev_err(ss->dev, "SPI error, spi send timeout!\n"); in sprd_spi_wait_for_tx_end()
207 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_STS2, val, in sprd_spi_wait_for_tx_end()
208 !(val & SPRD_SPI_TX_BUSY), 0, us); in sprd_spi_wait_for_tx_end()
210 dev_err(ss->dev, "SPI error, spi busy timeout!\n"); in sprd_spi_wait_for_tx_end()
214 writel_relaxed(SPRD_SPI_TX_END_INT_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_wait_for_tx_end()
221 u32 val, us; in sprd_spi_wait_for_rx_end() local
224 us = sprd_spi_transfer_max_timeout(ss, t); in sprd_spi_wait_for_rx_end()
225 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_INT_RAW_STS, val, in sprd_spi_wait_for_rx_end()
226 val & SPRD_SPI_RX_END_IRQ, 0, us); in sprd_spi_wait_for_rx_end()
228 dev_err(ss->dev, "SPI error, spi rx timeout!\n"); in sprd_spi_wait_for_rx_end()
232 writel_relaxed(SPRD_SPI_RX_END_INT_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_wait_for_rx_end()
239 writel_relaxed(SPRD_SPI_SW_TX_REQ, ss->base + SPRD_SPI_CTL12); in sprd_spi_tx_req()
244 writel_relaxed(SPRD_SPI_SW_RX_REQ, ss->base + SPRD_SPI_CTL12); in sprd_spi_rx_req()
249 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL1); in sprd_spi_enter_idle()
252 writel_relaxed(val, ss->base + SPRD_SPI_CTL1); in sprd_spi_enter_idle()
257 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL0); in sprd_spi_set_transfer_bits()
262 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_set_transfer_bits()
267 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL8); in sprd_spi_set_tx_length()
272 writel_relaxed(val, ss->base + SPRD_SPI_CTL8); in sprd_spi_set_tx_length()
275 writel_relaxed(val, ss->base + SPRD_SPI_CTL9); in sprd_spi_set_tx_length()
280 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL10); in sprd_spi_set_rx_length()
285 writel_relaxed(val, ss->base + SPRD_SPI_CTL10); in sprd_spi_set_rx_length()
288 writel_relaxed(val, ss->base + SPRD_SPI_CTL11); in sprd_spi_set_rx_length()
293 struct spi_controller *sctlr = sdev->controller; in sprd_spi_chipselect()
297 val = readl_relaxed(ss->base + SPRD_SPI_CTL0); in sprd_spi_chipselect()
298 /* The SPI controller will pull down CS pin if cs is 0 */ in sprd_spi_chipselect()
301 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_chipselect()
304 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_chipselect()
313 val = readl_relaxed(ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
315 writel_relaxed(val, ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
318 val = readl_relaxed(ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
320 writel_relaxed(val, ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
323 val = readl_relaxed(ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
325 writel_relaxed(val, ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
332 u8 *tx_p = (u8 *)ss->tx_buf; in sprd_spi_write_bufs_u8()
336 writeb_relaxed(tx_p[i], ss->base + SPRD_SPI_TXD); in sprd_spi_write_bufs_u8()
338 ss->tx_buf += i; in sprd_spi_write_bufs_u8()
344 u16 *tx_p = (u16 *)ss->tx_buf; in sprd_spi_write_bufs_u16()
348 writew_relaxed(tx_p[i], ss->base + SPRD_SPI_TXD); in sprd_spi_write_bufs_u16()
350 ss->tx_buf += i << 1; in sprd_spi_write_bufs_u16()
356 u32 *tx_p = (u32 *)ss->tx_buf; in sprd_spi_write_bufs_u32()
360 writel_relaxed(tx_p[i], ss->base + SPRD_SPI_TXD); in sprd_spi_write_bufs_u32()
362 ss->tx_buf += i << 2; in sprd_spi_write_bufs_u32()
368 u8 *rx_p = (u8 *)ss->rx_buf; in sprd_spi_read_bufs_u8()
372 rx_p[i] = readb_relaxed(ss->base + SPRD_SPI_TXD); in sprd_spi_read_bufs_u8()
374 ss->rx_buf += i; in sprd_spi_read_bufs_u8()
380 u16 *rx_p = (u16 *)ss->rx_buf; in sprd_spi_read_bufs_u16()
384 rx_p[i] = readw_relaxed(ss->base + SPRD_SPI_TXD); in sprd_spi_read_bufs_u16()
386 ss->rx_buf += i << 1; in sprd_spi_read_bufs_u16()
392 u32 *rx_p = (u32 *)ss->rx_buf; in sprd_spi_read_bufs_u32()
396 rx_p[i] = readl_relaxed(ss->base + SPRD_SPI_TXD); in sprd_spi_read_bufs_u32()
398 ss->rx_buf += i << 2; in sprd_spi_read_bufs_u32()
404 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller); in sprd_spi_txrx_bufs()
405 u32 trans_len = ss->trans_len, len; in sprd_spi_txrx_bufs()
411 if (ss->trans_mode & SPRD_SPI_TX_MODE) { in sprd_spi_txrx_bufs()
413 write_size += ss->write_bufs(ss, len); in sprd_spi_txrx_bufs()
419 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_txrx_bufs()
430 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_txrx_bufs()
433 write_size += ss->write_bufs(ss, len); in sprd_spi_txrx_bufs()
441 if (ss->trans_mode & SPRD_SPI_RX_MODE) in sprd_spi_txrx_bufs()
442 read_size += ss->read_bufs(ss, len); in sprd_spi_txrx_bufs()
444 trans_len -= len; in sprd_spi_txrx_bufs()
447 if (ss->trans_mode & SPRD_SPI_TX_MODE) in sprd_spi_txrx_bufs()
463 ss->base + SPRD_SPI_INT_CLR); in sprd_spi_irq_enable()
464 /* Enable SPI interrupt only in DMA mode. */ in sprd_spi_irq_enable()
465 val = readl_relaxed(ss->base + SPRD_SPI_INT_EN); in sprd_spi_irq_enable()
468 ss->base + SPRD_SPI_INT_EN); in sprd_spi_irq_enable()
473 writel_relaxed(0, ss->base + SPRD_SPI_INT_EN); in sprd_spi_irq_disable()
478 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL2); in sprd_spi_dma_enable()
485 writel_relaxed(val, ss->base + SPRD_SPI_CTL2); in sprd_spi_dma_enable()
504 desc = dmaengine_prep_slave_sg(dma_chan, sg->sgl, sg->nents, dir, flags); in sprd_spi_dma_submit()
506 return -ENODEV; in sprd_spi_dma_submit()
519 struct dma_chan *dma_chan = ss->dma.dma_chan[SPRD_SPI_RX]; in sprd_spi_dma_rx_config()
521 .src_addr = ss->phy_base, in sprd_spi_dma_rx_config()
522 .src_addr_width = ss->dma.width, in sprd_spi_dma_rx_config()
523 .dst_addr_width = ss->dma.width, in sprd_spi_dma_rx_config()
524 .dst_maxburst = ss->dma.fragmens_len, in sprd_spi_dma_rx_config()
528 ret = sprd_spi_dma_submit(dma_chan, &config, &t->rx_sg, DMA_DEV_TO_MEM); in sprd_spi_dma_rx_config()
532 return ss->dma.rx_len; in sprd_spi_dma_rx_config()
537 struct dma_chan *dma_chan = ss->dma.dma_chan[SPRD_SPI_TX]; in sprd_spi_dma_tx_config()
539 .dst_addr = ss->phy_base, in sprd_spi_dma_tx_config()
540 .src_addr_width = ss->dma.width, in sprd_spi_dma_tx_config()
541 .dst_addr_width = ss->dma.width, in sprd_spi_dma_tx_config()
542 .src_maxburst = ss->dma.fragmens_len, in sprd_spi_dma_tx_config()
546 ret = sprd_spi_dma_submit(dma_chan, &config, &t->tx_sg, DMA_MEM_TO_DEV); in sprd_spi_dma_tx_config()
550 return t->len; in sprd_spi_dma_tx_config()
555 ss->dma.dma_chan[SPRD_SPI_RX] = dma_request_chan(ss->dev, "rx_chn"); in sprd_spi_dma_request()
556 if (IS_ERR_OR_NULL(ss->dma.dma_chan[SPRD_SPI_RX])) in sprd_spi_dma_request()
557 return dev_err_probe(ss->dev, PTR_ERR(ss->dma.dma_chan[SPRD_SPI_RX]), in sprd_spi_dma_request()
558 "request RX DMA channel failed!\n"); in sprd_spi_dma_request()
560 ss->dma.dma_chan[SPRD_SPI_TX] = dma_request_chan(ss->dev, "tx_chn"); in sprd_spi_dma_request()
561 if (IS_ERR_OR_NULL(ss->dma.dma_chan[SPRD_SPI_TX])) { in sprd_spi_dma_request()
562 dma_release_channel(ss->dma.dma_chan[SPRD_SPI_RX]); in sprd_spi_dma_request()
563 return dev_err_probe(ss->dev, PTR_ERR(ss->dma.dma_chan[SPRD_SPI_TX]), in sprd_spi_dma_request()
572 if (ss->dma.dma_chan[SPRD_SPI_RX]) in sprd_spi_dma_release()
573 dma_release_channel(ss->dma.dma_chan[SPRD_SPI_RX]); in sprd_spi_dma_release()
575 if (ss->dma.dma_chan[SPRD_SPI_TX]) in sprd_spi_dma_release()
576 dma_release_channel(ss->dma.dma_chan[SPRD_SPI_TX]); in sprd_spi_dma_release()
582 struct sprd_spi *ss = spi_master_get_devdata(sdev->master); in sprd_spi_dma_txrx_bufs()
583 u32 trans_len = ss->trans_len; in sprd_spi_dma_txrx_bufs()
586 reinit_completion(&ss->xfer_completion); in sprd_spi_dma_txrx_bufs()
588 if (ss->trans_mode & SPRD_SPI_TX_MODE) { in sprd_spi_dma_txrx_bufs()
596 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_dma_txrx_bufs()
605 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_dma_txrx_bufs()
608 write_size = ss->write_bufs(ss, trans_len); in sprd_spi_dma_txrx_bufs()
613 dev_err(ss->dev, "failed to write, ret = %d\n", ret); in sprd_spi_dma_txrx_bufs()
617 if (ss->trans_mode & SPRD_SPI_RX_MODE) { in sprd_spi_dma_txrx_bufs()
625 ss->dma.rx_len = t->len > ss->dma.fragmens_len ? in sprd_spi_dma_txrx_bufs()
626 (t->len - t->len % ss->dma.fragmens_len) : in sprd_spi_dma_txrx_bufs()
627 t->len; in sprd_spi_dma_txrx_bufs()
630 dev_err(&sdev->dev, in sprd_spi_dma_txrx_bufs()
631 "failed to configure rx DMA, ret = %d\n", ret); in sprd_spi_dma_txrx_bufs()
637 wait_for_completion(&(ss->xfer_completion)); in sprd_spi_dma_txrx_bufs()
639 if (ss->trans_mode & SPRD_SPI_TX_MODE) in sprd_spi_dma_txrx_bufs()
642 ret = ss->dma.rx_len; in sprd_spi_dma_txrx_bufs()
655 * From SPI datasheet, the prescale calculation formula: in sprd_spi_set_speed()
656 * prescale = SPI source clock / (2 * SPI_freq) - 1; in sprd_spi_set_speed()
658 u32 clk_div = DIV_ROUND_UP(ss->src_clk, speed_hz << 1) - 1; in sprd_spi_set_speed()
661 ss->hw_speed_hz = (ss->src_clk >> 1) / (clk_div + 1); in sprd_spi_set_speed()
662 writel_relaxed(clk_div, ss->base + SPRD_SPI_CLKD); in sprd_spi_set_speed()
667 struct spi_delay *d = &t->word_delay; in sprd_spi_init_hw()
671 if (d->unit != SPI_DELAY_UNIT_SCK) in sprd_spi_init_hw()
672 return -EINVAL; in sprd_spi_init_hw()
674 val = readl_relaxed(ss->base + SPRD_SPI_CTL0); in sprd_spi_init_hw()
677 val |= ss->hw_mode & SPI_CPHA ? SPRD_SPI_NG_RX : SPRD_SPI_NG_TX; in sprd_spi_init_hw()
678 val |= ss->hw_mode & SPI_CPOL ? SPRD_SPI_SCK_REV : 0; in sprd_spi_init_hw()
679 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_init_hw()
682 * Set the intervals of two SPI frames, and the inteval calculation in sprd_spi_init_hw()
686 word_delay = clamp_t(u16, d->value, SPRD_SPI_MIN_DELAY_CYCLE, in sprd_spi_init_hw()
688 interval = DIV_ROUND_UP(word_delay - 10, 4); in sprd_spi_init_hw()
689 ss->word_delay = interval * 4 + 10; in sprd_spi_init_hw()
690 writel_relaxed(interval, ss->base + SPRD_SPI_CTL5); in sprd_spi_init_hw()
692 /* Reset SPI fifo */ in sprd_spi_init_hw()
693 writel_relaxed(1, ss->base + SPRD_SPI_FIFO_RST); in sprd_spi_init_hw()
694 writel_relaxed(0, ss->base + SPRD_SPI_FIFO_RST); in sprd_spi_init_hw()
696 /* Set SPI work mode */ in sprd_spi_init_hw()
697 val = readl_relaxed(ss->base + SPRD_SPI_CTL7); in sprd_spi_init_hw()
700 if (ss->hw_mode & SPI_3WIRE) in sprd_spi_init_hw()
705 if (ss->hw_mode & SPI_TX_DUAL) in sprd_spi_init_hw()
710 writel_relaxed(val, ss->base + SPRD_SPI_CTL7); in sprd_spi_init_hw()
718 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller); in sprd_spi_setup_transfer()
719 u8 bits_per_word = t->bits_per_word; in sprd_spi_setup_transfer()
723 ss->len = t->len; in sprd_spi_setup_transfer()
724 ss->tx_buf = t->tx_buf; in sprd_spi_setup_transfer()
725 ss->rx_buf = t->rx_buf; in sprd_spi_setup_transfer()
727 ss->hw_mode = sdev->mode; in sprd_spi_setup_transfer()
733 sprd_spi_set_speed(ss, t->speed_hz); in sprd_spi_setup_transfer()
743 ss->trans_len = t->len; in sprd_spi_setup_transfer()
744 ss->read_bufs = sprd_spi_read_bufs_u8; in sprd_spi_setup_transfer()
745 ss->write_bufs = sprd_spi_write_bufs_u8; in sprd_spi_setup_transfer()
746 ss->dma.width = DMA_SLAVE_BUSWIDTH_1_BYTE; in sprd_spi_setup_transfer()
747 ss->dma.fragmens_len = SPRD_SPI_DMA_STEP; in sprd_spi_setup_transfer()
750 ss->trans_len = t->len >> 1; in sprd_spi_setup_transfer()
751 ss->read_bufs = sprd_spi_read_bufs_u16; in sprd_spi_setup_transfer()
752 ss->write_bufs = sprd_spi_write_bufs_u16; in sprd_spi_setup_transfer()
753 ss->dma.width = DMA_SLAVE_BUSWIDTH_2_BYTES; in sprd_spi_setup_transfer()
754 ss->dma.fragmens_len = SPRD_SPI_DMA_STEP << 1; in sprd_spi_setup_transfer()
757 ss->trans_len = t->len >> 2; in sprd_spi_setup_transfer()
758 ss->read_bufs = sprd_spi_read_bufs_u32; in sprd_spi_setup_transfer()
759 ss->write_bufs = sprd_spi_write_bufs_u32; in sprd_spi_setup_transfer()
760 ss->dma.width = DMA_SLAVE_BUSWIDTH_4_BYTES; in sprd_spi_setup_transfer()
761 ss->dma.fragmens_len = SPRD_SPI_DMA_STEP << 2; in sprd_spi_setup_transfer()
764 return -EINVAL; in sprd_spi_setup_transfer()
768 val = readl_relaxed(ss->base + SPRD_SPI_CTL1); in sprd_spi_setup_transfer()
770 if (t->tx_buf) in sprd_spi_setup_transfer()
772 if (t->rx_buf) in sprd_spi_setup_transfer()
775 writel_relaxed(val | mode, ss->base + SPRD_SPI_CTL1); in sprd_spi_setup_transfer()
777 ss->trans_mode = mode; in sprd_spi_setup_transfer()
780 * If in only receive mode, we need to trigger the SPI controller to in sprd_spi_setup_transfer()
783 if (ss->trans_mode == SPRD_SPI_RX_MODE) in sprd_spi_setup_transfer()
784 ss->write_bufs = sprd_spi_write_only_receive; in sprd_spi_setup_transfer()
799 if (sctlr->can_dma(sctlr, sdev, t)) in sprd_spi_transfer_one()
804 if (ret == t->len) in sprd_spi_transfer_one()
807 ret = -EREMOTEIO; in sprd_spi_transfer_one()
818 u32 val = readl_relaxed(ss->base + SPRD_SPI_INT_MASK_STS); in sprd_spi_handle_irq()
821 writel_relaxed(SPRD_SPI_TX_END_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_handle_irq()
822 if (!(ss->trans_mode & SPRD_SPI_RX_MODE)) in sprd_spi_handle_irq()
823 complete(&ss->xfer_completion); in sprd_spi_handle_irq()
829 writel_relaxed(SPRD_SPI_RX_END_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_handle_irq()
830 if (ss->dma.rx_len < ss->len) { in sprd_spi_handle_irq()
831 ss->rx_buf += ss->dma.rx_len; in sprd_spi_handle_irq()
832 ss->dma.rx_len += in sprd_spi_handle_irq()
833 ss->read_bufs(ss, ss->len - ss->dma.rx_len); in sprd_spi_handle_irq()
835 complete(&ss->xfer_completion); in sprd_spi_handle_irq()
847 ss->irq = platform_get_irq(pdev, 0); in sprd_spi_irq_init()
848 if (ss->irq < 0) in sprd_spi_irq_init()
849 return ss->irq; in sprd_spi_irq_init()
851 ret = devm_request_irq(&pdev->dev, ss->irq, sprd_spi_handle_irq, in sprd_spi_irq_init()
852 0, pdev->name, ss); in sprd_spi_irq_init()
854 dev_err(&pdev->dev, "failed to request spi irq %d, ret = %d\n", in sprd_spi_irq_init()
855 ss->irq, ret); in sprd_spi_irq_init()
864 clk_spi = devm_clk_get(&pdev->dev, "spi"); in sprd_spi_clk_init()
866 dev_warn(&pdev->dev, "can't get the spi clock\n"); in sprd_spi_clk_init()
870 clk_parent = devm_clk_get(&pdev->dev, "source"); in sprd_spi_clk_init()
872 dev_warn(&pdev->dev, "can't get the source clock\n"); in sprd_spi_clk_init()
876 ss->clk = devm_clk_get(&pdev->dev, "enable"); in sprd_spi_clk_init()
877 if (IS_ERR(ss->clk)) { in sprd_spi_clk_init()
878 dev_err(&pdev->dev, "can't get the enable clock\n"); in sprd_spi_clk_init()
879 return PTR_ERR(ss->clk); in sprd_spi_clk_init()
883 ss->src_clk = clk_get_rate(clk_spi); in sprd_spi_clk_init()
885 ss->src_clk = SPRD_SPI_DEFAULT_SOURCE; in sprd_spi_clk_init()
891 struct spi_device *spi, struct spi_transfer *t) in sprd_spi_can_dma() argument
895 return ss->dma.enable && (t->len > SPRD_SPI_FIFO_SIZE); in sprd_spi_can_dma()
904 if (ret == -EPROBE_DEFER) in sprd_spi_dma_init()
907 dev_warn(&pdev->dev, in sprd_spi_dma_init()
914 ss->dma.enable = true; in sprd_spi_dma_init()
926 pdev->id = of_alias_get_id(pdev->dev.of_node, "spi"); in sprd_spi_probe()
927 sctlr = spi_alloc_master(&pdev->dev, sizeof(*ss)); in sprd_spi_probe()
929 return -ENOMEM; in sprd_spi_probe()
933 ss->base = devm_ioremap_resource(&pdev->dev, res); in sprd_spi_probe()
934 if (IS_ERR(ss->base)) { in sprd_spi_probe()
935 ret = PTR_ERR(ss->base); in sprd_spi_probe()
939 ss->phy_base = res->start; in sprd_spi_probe()
940 ss->dev = &pdev->dev; in sprd_spi_probe()
941 sctlr->dev.of_node = pdev->dev.of_node; in sprd_spi_probe()
942 sctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE | SPI_TX_DUAL; in sprd_spi_probe()
943 sctlr->bus_num = pdev->id; in sprd_spi_probe()
944 sctlr->set_cs = sprd_spi_chipselect; in sprd_spi_probe()
945 sctlr->transfer_one = sprd_spi_transfer_one; in sprd_spi_probe()
946 sctlr->can_dma = sprd_spi_can_dma; in sprd_spi_probe()
947 sctlr->auto_runtime_pm = true; in sprd_spi_probe()
948 sctlr->max_speed_hz = min_t(u32, ss->src_clk >> 1, in sprd_spi_probe()
951 init_completion(&ss->xfer_completion); in sprd_spi_probe()
965 ret = clk_prepare_enable(ss->clk); in sprd_spi_probe()
969 ret = pm_runtime_set_active(&pdev->dev); in sprd_spi_probe()
973 pm_runtime_set_autosuspend_delay(&pdev->dev, in sprd_spi_probe()
975 pm_runtime_use_autosuspend(&pdev->dev); in sprd_spi_probe()
976 pm_runtime_enable(&pdev->dev); in sprd_spi_probe()
977 ret = pm_runtime_get_sync(&pdev->dev); in sprd_spi_probe()
979 dev_err(&pdev->dev, "failed to resume SPI controller\n"); in sprd_spi_probe()
983 ret = devm_spi_register_controller(&pdev->dev, sctlr); in sprd_spi_probe()
987 pm_runtime_mark_last_busy(&pdev->dev); in sprd_spi_probe()
988 pm_runtime_put_autosuspend(&pdev->dev); in sprd_spi_probe()
993 pm_runtime_put_noidle(&pdev->dev); in sprd_spi_probe()
994 pm_runtime_disable(&pdev->dev); in sprd_spi_probe()
996 clk_disable_unprepare(ss->clk); in sprd_spi_probe()
1011 ret = pm_runtime_get_sync(ss->dev); in sprd_spi_remove()
1013 dev_err(ss->dev, "failed to resume SPI controller\n"); in sprd_spi_remove()
1019 if (ss->dma.enable) in sprd_spi_remove()
1021 clk_disable_unprepare(ss->clk); in sprd_spi_remove()
1022 pm_runtime_put_noidle(&pdev->dev); in sprd_spi_remove()
1023 pm_runtime_disable(&pdev->dev); in sprd_spi_remove()
1033 if (ss->dma.enable) in sprd_spi_runtime_suspend()
1036 clk_disable_unprepare(ss->clk); in sprd_spi_runtime_suspend()
1047 ret = clk_prepare_enable(ss->clk); in sprd_spi_runtime_resume()
1051 if (!ss->dma.enable) in sprd_spi_runtime_resume()
1056 clk_disable_unprepare(ss->clk); in sprd_spi_runtime_resume()
1067 { .compatible = "sprd,sc9860-spi", },
1073 .name = "sprd-spi",
1083 MODULE_DESCRIPTION("Spreadtrum SPI Controller driver");