Lines Matching +full:spi +full:- +full:rx +full:- +full:delay +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
14 #include <linux/spi/spi.h>
18 #define DRIVER_NAME "rockchip-spi"
25 /* SPI register offsets */
67 /* ss_n to sclk_out delay */
150 /* sclk_out: spi master internal logic in rk3x can support 50Mhz */
154 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
174 void *rx; member
195 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); in spi_enable_chip()
203 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) in wait_for_idle()
207 dev_warn(rs->dev, "spi controller is in busy state!\n"); in wait_for_idle()
214 ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); in get_fifo_len()
225 static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) in rockchip_spi_set_cs() argument
227 struct spi_controller *ctlr = spi->controller; in rockchip_spi_set_cs()
231 /* Return immediately for no-op */ in rockchip_spi_set_cs()
232 if (cs_asserted == rs->cs_asserted[spi->chip_select]) in rockchip_spi_set_cs()
237 pm_runtime_get_sync(rs->dev); in rockchip_spi_set_cs()
239 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, in rockchip_spi_set_cs()
240 BIT(spi->chip_select)); in rockchip_spi_set_cs()
242 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, in rockchip_spi_set_cs()
243 BIT(spi->chip_select)); in rockchip_spi_set_cs()
246 pm_runtime_put(rs->dev); in rockchip_spi_set_cs()
249 rs->cs_asserted[spi->chip_select] = cs_asserted; in rockchip_spi_set_cs()
257 /* stop running spi transfer in rockchip_spi_handle_err()
258 * this also flushes both rx and tx fifos in rockchip_spi_handle_err()
263 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_handle_err()
265 if (atomic_read(&rs->state) & TXDMA) in rockchip_spi_handle_err()
266 dmaengine_terminate_async(ctlr->dma_tx); in rockchip_spi_handle_err()
268 if (atomic_read(&rs->state) & RXDMA) in rockchip_spi_handle_err()
269 dmaengine_terminate_async(ctlr->dma_rx); in rockchip_spi_handle_err()
274 u32 tx_free = rs->fifo_len - readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFLR); in rockchip_spi_pio_writer()
275 u32 words = min(rs->tx_left, tx_free); in rockchip_spi_pio_writer()
277 rs->tx_left -= words; in rockchip_spi_pio_writer()
278 for (; words; words--) { in rockchip_spi_pio_writer()
281 if (rs->n_bytes == 1) in rockchip_spi_pio_writer()
282 txw = *(u8 *)rs->tx; in rockchip_spi_pio_writer()
284 txw = *(u16 *)rs->tx; in rockchip_spi_pio_writer()
286 writel_relaxed(txw, rs->regs + ROCKCHIP_SPI_TXDR); in rockchip_spi_pio_writer()
287 rs->tx += rs->n_bytes; in rockchip_spi_pio_writer()
293 u32 words = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_pio_reader()
294 u32 rx_left = (rs->rx_left > words) ? rs->rx_left - words : 0; in rockchip_spi_pio_reader()
296 /* the hardware doesn't allow us to change fifo threshold in rockchip_spi_pio_reader()
297 * level while spi is enabled, so instead make sure to leave in rockchip_spi_pio_reader()
298 * enough words in the rx fifo to get the last interrupt in rockchip_spi_pio_reader()
302 u32 ftl = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFTLR) + 1; in rockchip_spi_pio_reader()
306 words = rs->rx_left - rx_left; in rockchip_spi_pio_reader()
310 rs->rx_left = rx_left; in rockchip_spi_pio_reader()
311 for (; words; words--) { in rockchip_spi_pio_reader()
312 u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_pio_reader()
314 if (!rs->rx) in rockchip_spi_pio_reader()
317 if (rs->n_bytes == 1) in rockchip_spi_pio_reader()
318 *(u8 *)rs->rx = (u8)rxw; in rockchip_spi_pio_reader()
320 *(u16 *)rs->rx = (u16)rxw; in rockchip_spi_pio_reader()
321 rs->rx += rs->n_bytes; in rockchip_spi_pio_reader()
330 if (rs->tx_left) in rockchip_spi_isr()
334 if (!rs->rx_left) { in rockchip_spi_isr()
336 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
346 rs->tx = xfer->tx_buf; in rockchip_spi_prepare_irq()
347 rs->rx = xfer->rx_buf; in rockchip_spi_prepare_irq()
348 rs->tx_left = rs->tx ? xfer->len / rs->n_bytes : 0; in rockchip_spi_prepare_irq()
349 rs->rx_left = xfer->len / rs->n_bytes; in rockchip_spi_prepare_irq()
351 writel_relaxed(INT_RF_FULL, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
354 if (rs->tx_left) in rockchip_spi_prepare_irq()
365 int state = atomic_fetch_andnot(RXDMA, &rs->state); in rockchip_spi_dma_rxcb()
367 if (state & TXDMA && !rs->slave_abort) in rockchip_spi_dma_rxcb()
378 int state = atomic_fetch_andnot(TXDMA, &rs->state); in rockchip_spi_dma_txcb()
380 if (state & RXDMA && !rs->slave_abort) in rockchip_spi_dma_txcb()
408 atomic_set(&rs->state, 0); in rockchip_spi_prepare_dma()
411 if (xfer->rx_buf) { in rockchip_spi_prepare_dma()
414 .src_addr = rs->dma_addr_rx, in rockchip_spi_prepare_dma()
415 .src_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
416 .src_maxburst = rockchip_spi_calc_burst_size(xfer->len / in rockchip_spi_prepare_dma()
417 rs->n_bytes), in rockchip_spi_prepare_dma()
420 dmaengine_slave_config(ctlr->dma_rx, &rxconf); in rockchip_spi_prepare_dma()
423 ctlr->dma_rx, in rockchip_spi_prepare_dma()
424 xfer->rx_sg.sgl, xfer->rx_sg.nents, in rockchip_spi_prepare_dma()
427 return -EINVAL; in rockchip_spi_prepare_dma()
429 rxdesc->callback = rockchip_spi_dma_rxcb; in rockchip_spi_prepare_dma()
430 rxdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
434 if (xfer->tx_buf) { in rockchip_spi_prepare_dma()
437 .dst_addr = rs->dma_addr_tx, in rockchip_spi_prepare_dma()
438 .dst_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
439 .dst_maxburst = rs->fifo_len / 4, in rockchip_spi_prepare_dma()
442 dmaengine_slave_config(ctlr->dma_tx, &txconf); in rockchip_spi_prepare_dma()
445 ctlr->dma_tx, in rockchip_spi_prepare_dma()
446 xfer->tx_sg.sgl, xfer->tx_sg.nents, in rockchip_spi_prepare_dma()
450 dmaengine_terminate_sync(ctlr->dma_rx); in rockchip_spi_prepare_dma()
451 return -EINVAL; in rockchip_spi_prepare_dma()
454 txdesc->callback = rockchip_spi_dma_txcb; in rockchip_spi_prepare_dma()
455 txdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
458 /* rx must be started before tx due to spi instinct */ in rockchip_spi_prepare_dma()
460 atomic_or(RXDMA, &rs->state); in rockchip_spi_prepare_dma()
462 dma_async_issue_pending(ctlr->dma_rx); in rockchip_spi_prepare_dma()
468 atomic_or(TXDMA, &rs->state); in rockchip_spi_prepare_dma()
470 dma_async_issue_pending(ctlr->dma_tx); in rockchip_spi_prepare_dma()
478 struct spi_device *spi, struct spi_transfer *xfer, in rockchip_spi_config() argument
490 rs->slave_abort = false; in rockchip_spi_config()
492 cr0 |= rs->rsd << CR0_RSD_OFFSET; in rockchip_spi_config()
493 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; in rockchip_spi_config()
494 if (spi->mode & SPI_LSB_FIRST) in rockchip_spi_config()
497 if (xfer->rx_buf && xfer->tx_buf) in rockchip_spi_config()
499 else if (xfer->rx_buf) in rockchip_spi_config()
504 switch (xfer->bits_per_word) { in rockchip_spi_config()
507 cr1 = xfer->len - 1; in rockchip_spi_config()
511 cr1 = xfer->len - 1; in rockchip_spi_config()
515 cr1 = xfer->len / 2 - 1; in rockchip_spi_config()
519 * ctlr->bits_per_word_mask, so this shouldn't in rockchip_spi_config()
526 if (xfer->tx_buf) in rockchip_spi_config()
528 if (xfer->rx_buf) in rockchip_spi_config()
532 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_config()
533 writel_relaxed(cr1, rs->regs + ROCKCHIP_SPI_CTRLR1); in rockchip_spi_config()
539 if (xfer->len < rs->fifo_len) in rockchip_spi_config()
540 writel_relaxed(xfer->len - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
542 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
544 writel_relaxed(rs->fifo_len / 2, rs->regs + ROCKCHIP_SPI_DMATDLR); in rockchip_spi_config()
545 writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1, in rockchip_spi_config()
546 rs->regs + ROCKCHIP_SPI_DMARDLR); in rockchip_spi_config()
547 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
553 writel_relaxed(2 * DIV_ROUND_UP(rs->freq, 2 * xfer->speed_hz), in rockchip_spi_config()
554 rs->regs + ROCKCHIP_SPI_BAUDR); in rockchip_spi_config()
557 static size_t rockchip_spi_max_transfer_size(struct spi_device *spi) in rockchip_spi_max_transfer_size() argument
566 rs->slave_abort = true; in rockchip_spi_slave_abort()
567 complete(&ctlr->xfer_completion); in rockchip_spi_slave_abort()
574 struct spi_device *spi, in rockchip_spi_transfer_one() argument
580 WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && in rockchip_spi_transfer_one()
581 (readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)); in rockchip_spi_transfer_one()
583 if (!xfer->tx_buf && !xfer->rx_buf) { in rockchip_spi_transfer_one()
584 dev_err(rs->dev, "No buffer for transfer\n"); in rockchip_spi_transfer_one()
585 return -EINVAL; in rockchip_spi_transfer_one()
588 if (xfer->len > ROCKCHIP_SPI_MAX_TRANLEN) { in rockchip_spi_transfer_one()
589 dev_err(rs->dev, "Transfer is too long (%d)\n", xfer->len); in rockchip_spi_transfer_one()
590 return -EINVAL; in rockchip_spi_transfer_one()
593 rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_transfer_one()
595 use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false; in rockchip_spi_transfer_one()
597 rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->slave); in rockchip_spi_transfer_one()
606 struct spi_device *spi, in rockchip_spi_can_dma() argument
610 unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_can_dma()
612 /* if the numbor of spi words to transfer is less than the fifo in rockchip_spi_can_dma()
616 return xfer->len / bytes_per_word >= rs->fifo_len; in rockchip_spi_can_dma()
625 struct device_node *np = pdev->dev.of_node; in rockchip_spi_probe()
629 slave_mode = of_property_read_bool(np, "spi-slave"); in rockchip_spi_probe()
632 ctlr = spi_alloc_slave(&pdev->dev, in rockchip_spi_probe()
635 ctlr = spi_alloc_master(&pdev->dev, in rockchip_spi_probe()
639 return -ENOMEM; in rockchip_spi_probe()
644 ctlr->slave = slave_mode; in rockchip_spi_probe()
648 rs->regs = devm_ioremap_resource(&pdev->dev, mem); in rockchip_spi_probe()
649 if (IS_ERR(rs->regs)) { in rockchip_spi_probe()
650 ret = PTR_ERR(rs->regs); in rockchip_spi_probe()
654 rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk"); in rockchip_spi_probe()
655 if (IS_ERR(rs->apb_pclk)) { in rockchip_spi_probe()
656 dev_err(&pdev->dev, "Failed to get apb_pclk\n"); in rockchip_spi_probe()
657 ret = PTR_ERR(rs->apb_pclk); in rockchip_spi_probe()
661 rs->spiclk = devm_clk_get(&pdev->dev, "spiclk"); in rockchip_spi_probe()
662 if (IS_ERR(rs->spiclk)) { in rockchip_spi_probe()
663 dev_err(&pdev->dev, "Failed to get spi_pclk\n"); in rockchip_spi_probe()
664 ret = PTR_ERR(rs->spiclk); in rockchip_spi_probe()
668 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_probe()
670 dev_err(&pdev->dev, "Failed to enable apb_pclk\n"); in rockchip_spi_probe()
674 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_probe()
676 dev_err(&pdev->dev, "Failed to enable spi_clk\n"); in rockchip_spi_probe()
686 ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL, in rockchip_spi_probe()
687 IRQF_ONESHOT, dev_name(&pdev->dev), ctlr); in rockchip_spi_probe()
691 rs->dev = &pdev->dev; in rockchip_spi_probe()
692 rs->freq = clk_get_rate(rs->spiclk); in rockchip_spi_probe()
694 if (!of_property_read_u32(pdev->dev.of_node, "rx-sample-delay-ns", in rockchip_spi_probe()
696 /* rx sample delay is expressed in parent clock cycles (max 3) */ in rockchip_spi_probe()
697 u32 rsd = DIV_ROUND_CLOSEST(rsd_nsecs * (rs->freq >> 8), in rockchip_spi_probe()
700 dev_warn(rs->dev, "%u Hz are too slow to express %u ns delay\n", in rockchip_spi_probe()
701 rs->freq, rsd_nsecs); in rockchip_spi_probe()
704 dev_warn(rs->dev, "%u Hz are too fast to express %u ns delay, clamping at %u ns\n", in rockchip_spi_probe()
705 rs->freq, rsd_nsecs, in rockchip_spi_probe()
706 CR0_RSD_MAX * 1000000000U / rs->freq); in rockchip_spi_probe()
708 rs->rsd = rsd; in rockchip_spi_probe()
711 rs->fifo_len = get_fifo_len(rs); in rockchip_spi_probe()
712 if (!rs->fifo_len) { in rockchip_spi_probe()
713 dev_err(&pdev->dev, "Failed to get fifo length\n"); in rockchip_spi_probe()
714 ret = -EINVAL; in rockchip_spi_probe()
718 pm_runtime_set_active(&pdev->dev); in rockchip_spi_probe()
719 pm_runtime_enable(&pdev->dev); in rockchip_spi_probe()
721 ctlr->auto_runtime_pm = true; in rockchip_spi_probe()
722 ctlr->bus_num = pdev->id; in rockchip_spi_probe()
723 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; in rockchip_spi_probe()
725 ctlr->mode_bits |= SPI_NO_CS; in rockchip_spi_probe()
726 ctlr->slave_abort = rockchip_spi_slave_abort; in rockchip_spi_probe()
728 ctlr->flags = SPI_MASTER_GPIO_SS; in rockchip_spi_probe()
729 ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; in rockchip_spi_probe()
732 * if num-cs is missing in the dts, default to 1 in rockchip_spi_probe()
734 if (of_property_read_u16(np, "num-cs", &ctlr->num_chipselect)) in rockchip_spi_probe()
735 ctlr->num_chipselect = 1; in rockchip_spi_probe()
736 ctlr->use_gpio_descriptors = true; in rockchip_spi_probe()
738 ctlr->dev.of_node = pdev->dev.of_node; in rockchip_spi_probe()
739 ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4); in rockchip_spi_probe()
740 ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX; in rockchip_spi_probe()
741 ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT); in rockchip_spi_probe()
743 ctlr->set_cs = rockchip_spi_set_cs; in rockchip_spi_probe()
744 ctlr->transfer_one = rockchip_spi_transfer_one; in rockchip_spi_probe()
745 ctlr->max_transfer_size = rockchip_spi_max_transfer_size; in rockchip_spi_probe()
746 ctlr->handle_err = rockchip_spi_handle_err; in rockchip_spi_probe()
748 ctlr->dma_tx = dma_request_chan(rs->dev, "tx"); in rockchip_spi_probe()
749 if (IS_ERR(ctlr->dma_tx)) { in rockchip_spi_probe()
751 if (PTR_ERR(ctlr->dma_tx) == -EPROBE_DEFER) { in rockchip_spi_probe()
752 ret = -EPROBE_DEFER; in rockchip_spi_probe()
755 dev_warn(rs->dev, "Failed to request TX DMA channel\n"); in rockchip_spi_probe()
756 ctlr->dma_tx = NULL; in rockchip_spi_probe()
759 ctlr->dma_rx = dma_request_chan(rs->dev, "rx"); in rockchip_spi_probe()
760 if (IS_ERR(ctlr->dma_rx)) { in rockchip_spi_probe()
761 if (PTR_ERR(ctlr->dma_rx) == -EPROBE_DEFER) { in rockchip_spi_probe()
762 ret = -EPROBE_DEFER; in rockchip_spi_probe()
765 dev_warn(rs->dev, "Failed to request RX DMA channel\n"); in rockchip_spi_probe()
766 ctlr->dma_rx = NULL; in rockchip_spi_probe()
769 if (ctlr->dma_tx && ctlr->dma_rx) { in rockchip_spi_probe()
770 rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR; in rockchip_spi_probe()
771 rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR; in rockchip_spi_probe()
772 ctlr->can_dma = rockchip_spi_can_dma; in rockchip_spi_probe()
775 ret = devm_spi_register_controller(&pdev->dev, ctlr); in rockchip_spi_probe()
777 dev_err(&pdev->dev, "Failed to register controller\n"); in rockchip_spi_probe()
784 if (ctlr->dma_rx) in rockchip_spi_probe()
785 dma_release_channel(ctlr->dma_rx); in rockchip_spi_probe()
787 if (ctlr->dma_tx) in rockchip_spi_probe()
788 dma_release_channel(ctlr->dma_tx); in rockchip_spi_probe()
790 pm_runtime_disable(&pdev->dev); in rockchip_spi_probe()
792 clk_disable_unprepare(rs->spiclk); in rockchip_spi_probe()
794 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_probe()
806 pm_runtime_get_sync(&pdev->dev); in rockchip_spi_remove()
808 clk_disable_unprepare(rs->spiclk); in rockchip_spi_remove()
809 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_remove()
811 pm_runtime_put_noidle(&pdev->dev); in rockchip_spi_remove()
812 pm_runtime_disable(&pdev->dev); in rockchip_spi_remove()
813 pm_runtime_set_suspended(&pdev->dev); in rockchip_spi_remove()
815 if (ctlr->dma_tx) in rockchip_spi_remove()
816 dma_release_channel(ctlr->dma_tx); in rockchip_spi_remove()
817 if (ctlr->dma_rx) in rockchip_spi_remove()
818 dma_release_channel(ctlr->dma_rx); in rockchip_spi_remove()
858 clk_disable_unprepare(rs->spiclk); in rockchip_spi_resume()
859 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_resume()
872 clk_disable_unprepare(rs->spiclk); in rockchip_spi_runtime_suspend()
873 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_suspend()
884 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_runtime_resume()
888 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_runtime_resume()
890 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_resume()
903 { .compatible = "rockchip,px30-spi", },
904 { .compatible = "rockchip,rk3036-spi", },
905 { .compatible = "rockchip,rk3066-spi", },
906 { .compatible = "rockchip,rk3188-spi", },
907 { .compatible = "rockchip,rk3228-spi", },
908 { .compatible = "rockchip,rk3288-spi", },
909 { .compatible = "rockchip,rk3308-spi", },
910 { .compatible = "rockchip,rk3328-spi", },
911 { .compatible = "rockchip,rk3368-spi", },
912 { .compatible = "rockchip,rk3399-spi", },
913 { .compatible = "rockchip,rv1108-spi", },
930 MODULE_AUTHOR("Addy Ke <addy.ke@rock-chips.com>");
931 MODULE_DESCRIPTION("ROCKCHIP SPI Controller Driver");