Lines Matching +full:imx51 +full:- +full:ecspi
1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/dma-mapping.h>
27 #include <linux/platform_data/dma-imx.h>
60 IMX51_ECSPI, /* ECSPI on i.mx51 */
61 IMX53_ECSPI, /* ECSPI on i.mx53 and later */
124 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
129 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
134 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
139 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
145 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
147 if (spi_imx->rx_buf) { \
148 *(type *)spi_imx->rx_buf = val; \
149 spi_imx->rx_buf += sizeof(type); \
152 spi_imx->remainder -= sizeof(type); \
160 if (spi_imx->tx_buf) { \
161 val = *(type *)spi_imx->tx_buf; \
162 spi_imx->tx_buf += sizeof(type); \
165 spi_imx->count -= sizeof(type); \
167 writel(val, spi_imx->base + MXC_CSPITXDATA); \
229 if (!use_dma || master->fallback) in spi_imx_can_dma()
232 if (!master->dma_rx) in spi_imx_can_dma()
235 if (spi_imx->slave_mode) in spi_imx_can_dma()
238 if (transfer->len < spi_imx->devtype_data->fifo_size) in spi_imx_can_dma()
241 spi_imx->dynamic_burst = 0; in spi_imx_can_dma()
287 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap_u32()
292 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap_u32()
294 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_rx_swap_u32()
300 *(u32 *)spi_imx->rx_buf = val; in spi_imx_buf_rx_swap_u32()
301 spi_imx->rx_buf += sizeof(u32); in spi_imx_buf_rx_swap_u32()
304 spi_imx->remainder -= sizeof(u32); in spi_imx_buf_rx_swap_u32()
312 unaligned = spi_imx->remainder % 4; in spi_imx_buf_rx_swap()
319 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_rx_swap()
324 val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap()
326 while (unaligned--) { in spi_imx_buf_rx_swap()
327 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap()
328 *(u8 *)spi_imx->rx_buf = (val >> (8 * unaligned)) & 0xff; in spi_imx_buf_rx_swap()
329 spi_imx->rx_buf++; in spi_imx_buf_rx_swap()
331 spi_imx->remainder--; in spi_imx_buf_rx_swap()
342 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap_u32()
343 val = *(u32 *)spi_imx->tx_buf; in spi_imx_buf_tx_swap_u32()
344 spi_imx->tx_buf += sizeof(u32); in spi_imx_buf_tx_swap_u32()
347 spi_imx->count -= sizeof(u32); in spi_imx_buf_tx_swap_u32()
349 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_tx_swap_u32()
356 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap_u32()
364 unaligned = spi_imx->count % 4; in spi_imx_buf_tx_swap()
371 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_tx_swap()
376 while (unaligned--) { in spi_imx_buf_tx_swap()
377 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap()
378 val |= *(u8 *)spi_imx->tx_buf << (8 * unaligned); in spi_imx_buf_tx_swap()
379 spi_imx->tx_buf++; in spi_imx_buf_tx_swap()
381 spi_imx->count--; in spi_imx_buf_tx_swap()
384 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap()
389 u32 val = be32_to_cpu(readl(spi_imx->base + MXC_CSPIRXDATA)); in mx53_ecspi_rx_slave()
391 if (spi_imx->rx_buf) { in mx53_ecspi_rx_slave()
392 int n_bytes = spi_imx->slave_burst % sizeof(val); in mx53_ecspi_rx_slave()
397 memcpy(spi_imx->rx_buf, in mx53_ecspi_rx_slave()
398 ((u8 *)&val) + sizeof(val) - n_bytes, n_bytes); in mx53_ecspi_rx_slave()
400 spi_imx->rx_buf += n_bytes; in mx53_ecspi_rx_slave()
401 spi_imx->slave_burst -= n_bytes; in mx53_ecspi_rx_slave()
404 spi_imx->remainder -= sizeof(u32); in mx53_ecspi_rx_slave()
410 int n_bytes = spi_imx->count % sizeof(val); in mx53_ecspi_tx_slave()
415 if (spi_imx->tx_buf) { in mx53_ecspi_tx_slave()
416 memcpy(((u8 *)&val) + sizeof(val) - n_bytes, in mx53_ecspi_tx_slave()
417 spi_imx->tx_buf, n_bytes); in mx53_ecspi_tx_slave()
419 spi_imx->tx_buf += n_bytes; in mx53_ecspi_tx_slave()
422 spi_imx->count -= n_bytes; in mx53_ecspi_tx_slave()
424 writel(val, spi_imx->base + MXC_CSPITXDATA); in mx53_ecspi_tx_slave()
427 /* MX51 eCSPI */
432 * there are two 4-bit dividers, the pre-divider divides by in mx51_ecspi_clkdiv()
433 * $pre, the post-divider by 2^$post in mx51_ecspi_clkdiv()
436 unsigned int fin = spi_imx->spi_clk; in mx51_ecspi_clkdiv()
441 post = fls(fin) - fls(fspi); in mx51_ecspi_clkdiv()
447 post = max(4U, post) - 4; in mx51_ecspi_clkdiv()
449 dev_err(spi_imx->dev, "cannot set clock freq: %u (base freq: %u)\n", in mx51_ecspi_clkdiv()
454 pre = DIV_ROUND_UP(fin, fspi << post) - 1; in mx51_ecspi_clkdiv()
456 dev_dbg(spi_imx->dev, "%s: fin: %u, fspi: %u, post: %u, pre: %u\n", in mx51_ecspi_clkdiv()
479 writel(val, spi_imx->base + MX51_ECSPI_INT); in mx51_ecspi_intctrl()
486 reg = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
488 writel(reg, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
493 writel(0, spi_imx->base + MX51_ECSPI_DMA); in mx51_disable_dma()
500 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
502 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
508 struct spi_device *spi = msg->spi; in mx51_ecspi_prepare_message()
511 u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
514 if (spi_imx->slave_mode) in mx51_ecspi_prepare_message()
522 if (spi->mode & SPI_READY) in mx51_ecspi_prepare_message()
523 ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl); in mx51_ecspi_prepare_message()
526 ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select); in mx51_ecspi_prepare_message()
532 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_message()
534 testreg = readl(spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
535 if (spi->mode & SPI_LOOP) in mx51_ecspi_prepare_message()
539 writel(testreg, spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
542 * eCSPI burst completion by Chip Select signal in Slave mode in mx51_ecspi_prepare_message()
546 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_message()
547 cfg &= ~MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); in mx51_ecspi_prepare_message()
549 cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); in mx51_ecspi_prepare_message()
551 if (spi->mode & SPI_CPHA) in mx51_ecspi_prepare_message()
552 cfg |= MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select); in mx51_ecspi_prepare_message()
554 cfg &= ~MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select); in mx51_ecspi_prepare_message()
556 if (spi->mode & SPI_CPOL) { in mx51_ecspi_prepare_message()
557 cfg |= MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select); in mx51_ecspi_prepare_message()
558 cfg |= MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select); in mx51_ecspi_prepare_message()
560 cfg &= ~MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select); in mx51_ecspi_prepare_message()
561 cfg &= ~MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select); in mx51_ecspi_prepare_message()
564 if (spi->mode & SPI_CS_HIGH) in mx51_ecspi_prepare_message()
565 cfg |= MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); in mx51_ecspi_prepare_message()
567 cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); in mx51_ecspi_prepare_message()
569 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
578 u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
579 u32 clk = t->speed_hz, delay; in mx51_ecspi_prepare_transfer()
583 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_transfer()
584 ctrl |= (spi_imx->slave_burst * 8 - 1) in mx51_ecspi_prepare_transfer()
587 ctrl |= (spi_imx->bits_per_word - 1) in mx51_ecspi_prepare_transfer()
593 ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); in mx51_ecspi_prepare_transfer()
594 spi_imx->spi_bus_clk = clk; in mx51_ecspi_prepare_transfer()
596 if (spi_imx->usedma) in mx51_ecspi_prepare_transfer()
599 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
627 writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | in mx51_setup_wml()
628 MX51_ECSPI_DMA_TX_WML(spi_imx->wml) | in mx51_setup_wml()
629 MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | in mx51_setup_wml()
631 MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); in mx51_setup_wml()
636 return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR; in mx51_ecspi_rx_available()
643 readl(spi_imx->base + MXC_CSPIRXDATA); in mx51_ecspi_reset()
686 writel(val, spi_imx->base + MXC_CSPIINT); in mx31_intctrl()
693 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
695 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
711 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, t->speed_hz, &clk) << in mx31_prepare_transfer()
713 spi_imx->spi_bus_clk = clk; in mx31_prepare_transfer()
716 reg |= (spi_imx->bits_per_word - 1) << MX35_CSPICTRL_BL_SHIFT; in mx31_prepare_transfer()
719 reg |= (spi_imx->bits_per_word - 1) << MX31_CSPICTRL_BC_SHIFT; in mx31_prepare_transfer()
722 if (spi->mode & SPI_CPHA) in mx31_prepare_transfer()
724 if (spi->mode & SPI_CPOL) in mx31_prepare_transfer()
726 if (spi->mode & SPI_CS_HIGH) in mx31_prepare_transfer()
728 if (!spi->cs_gpiod) in mx31_prepare_transfer()
729 reg |= (spi->chip_select) << in mx31_prepare_transfer()
733 if (spi_imx->usedma) in mx31_prepare_transfer()
736 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_prepare_transfer()
738 reg = readl(spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
739 if (spi->mode & SPI_LOOP) in mx31_prepare_transfer()
743 writel(reg, spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
745 if (spi_imx->usedma) { in mx31_prepare_transfer()
751 spi_imx->base + MX31_CSPI_DMAREG); in mx31_prepare_transfer()
759 return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; in mx31_rx_available()
765 while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR) in mx31_reset()
766 readl(spi_imx->base + MXC_CSPIRXDATA); in mx31_reset()
791 writel(val, spi_imx->base + MXC_CSPIINT); in mx21_intctrl()
798 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
800 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
817 reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, t->speed_hz, max, &clk) in mx21_prepare_transfer()
819 spi_imx->spi_bus_clk = clk; in mx21_prepare_transfer()
821 reg |= spi_imx->bits_per_word - 1; in mx21_prepare_transfer()
823 if (spi->mode & SPI_CPHA) in mx21_prepare_transfer()
825 if (spi->mode & SPI_CPOL) in mx21_prepare_transfer()
827 if (spi->mode & SPI_CS_HIGH) in mx21_prepare_transfer()
829 if (!spi->cs_gpiod) in mx21_prepare_transfer()
830 reg |= spi->chip_select << MX21_CSPICTRL_CS_SHIFT; in mx21_prepare_transfer()
832 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_prepare_transfer()
839 return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; in mx21_rx_available()
844 writel(1, spi_imx->base + MXC_RESET); in mx21_reset()
867 writel(val, spi_imx->base + MXC_CSPIINT); in mx1_intctrl()
874 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
876 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
892 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, t->speed_hz, &clk) << in mx1_prepare_transfer()
894 spi_imx->spi_bus_clk = clk; in mx1_prepare_transfer()
896 reg |= spi_imx->bits_per_word - 1; in mx1_prepare_transfer()
898 if (spi->mode & SPI_CPHA) in mx1_prepare_transfer()
900 if (spi->mode & SPI_CPOL) in mx1_prepare_transfer()
903 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_prepare_transfer()
910 return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; in mx1_rx_available()
915 writel(1, spi_imx->base + MXC_RESET); in mx1_reset()
1024 .name = "imx1-cspi",
1027 .name = "imx21-cspi",
1030 .name = "imx27-cspi",
1033 .name = "imx31-cspi",
1036 .name = "imx35-cspi",
1039 .name = "imx51-ecspi",
1042 .name = "imx53-ecspi",
1050 { .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, },
1051 { .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, },
1052 { .compatible = "fsl,imx27-cspi", .data = &imx27_cspi_devtype_data, },
1053 { .compatible = "fsl,imx31-cspi", .data = &imx31_cspi_devtype_data, },
1054 { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
1055 { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
1056 { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, },
1065 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1067 ctrl |= ((n_bits - 1) << MX51_ECSPI_CTRL_BL_OFFSET); in spi_imx_set_burst_len()
1068 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1075 if (spi_imx->dynamic_burst) in spi_imx_push()
1078 fifo_words = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_push()
1084 if (!spi_imx->remainder) { in spi_imx_push()
1085 if (spi_imx->dynamic_burst) { in spi_imx_push()
1088 burst_len = spi_imx->count % MX51_ECSPI_CTRL_MAX_BURST; in spi_imx_push()
1095 spi_imx->remainder = burst_len; in spi_imx_push()
1097 spi_imx->remainder = fifo_words; in spi_imx_push()
1101 while (spi_imx->txfifo < spi_imx->devtype_data->fifo_size) { in spi_imx_push()
1102 if (!spi_imx->count) in spi_imx_push()
1104 if (spi_imx->dynamic_burst && in spi_imx_push()
1105 spi_imx->txfifo >= DIV_ROUND_UP(spi_imx->remainder, in spi_imx_push()
1108 spi_imx->tx(spi_imx); in spi_imx_push()
1109 spi_imx->txfifo++; in spi_imx_push()
1112 if (!spi_imx->slave_mode) in spi_imx_push()
1113 spi_imx->devtype_data->trigger(spi_imx); in spi_imx_push()
1120 while (spi_imx->txfifo && in spi_imx_isr()
1121 spi_imx->devtype_data->rx_available(spi_imx)) { in spi_imx_isr()
1122 spi_imx->rx(spi_imx); in spi_imx_isr()
1123 spi_imx->txfifo--; in spi_imx_isr()
1126 if (spi_imx->count) { in spi_imx_isr()
1131 if (spi_imx->txfifo) { in spi_imx_isr()
1135 spi_imx->devtype_data->intctrl( in spi_imx_isr()
1140 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_isr()
1141 complete(&spi_imx->xfer_done); in spi_imx_isr()
1153 switch (spi_imx_bytes_per_word(spi_imx->bits_per_word)) { in spi_imx_dma_configure()
1164 return -EINVAL; in spi_imx_dma_configure()
1168 tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA; in spi_imx_dma_configure()
1170 tx.dst_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1171 ret = dmaengine_slave_config(master->dma_tx, &tx); in spi_imx_dma_configure()
1173 dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1178 rx.src_addr = spi_imx->base_phys + MXC_CSPIRXDATA; in spi_imx_dma_configure()
1180 rx.src_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1181 ret = dmaengine_slave_config(master->dma_rx, &rx); in spi_imx_dma_configure()
1183 dev_err(spi_imx->dev, "RX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1193 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_setupxfer()
1198 spi_imx->bits_per_word = t->bits_per_word; in spi_imx_setupxfer()
1201 * Initialize the functions for transfer. To transfer non byte-aligned in spi_imx_setupxfer()
1202 * words, we have to use multiple word-size bursts, we can't use in spi_imx_setupxfer()
1205 if (spi_imx->devtype_data->dynamic_burst && !spi_imx->slave_mode && in spi_imx_setupxfer()
1206 (spi_imx->bits_per_word == 8 || in spi_imx_setupxfer()
1207 spi_imx->bits_per_word == 16 || in spi_imx_setupxfer()
1208 spi_imx->bits_per_word == 32)) { in spi_imx_setupxfer()
1210 spi_imx->rx = spi_imx_buf_rx_swap; in spi_imx_setupxfer()
1211 spi_imx->tx = spi_imx_buf_tx_swap; in spi_imx_setupxfer()
1212 spi_imx->dynamic_burst = 1; in spi_imx_setupxfer()
1215 if (spi_imx->bits_per_word <= 8) { in spi_imx_setupxfer()
1216 spi_imx->rx = spi_imx_buf_rx_u8; in spi_imx_setupxfer()
1217 spi_imx->tx = spi_imx_buf_tx_u8; in spi_imx_setupxfer()
1218 } else if (spi_imx->bits_per_word <= 16) { in spi_imx_setupxfer()
1219 spi_imx->rx = spi_imx_buf_rx_u16; in spi_imx_setupxfer()
1220 spi_imx->tx = spi_imx_buf_tx_u16; in spi_imx_setupxfer()
1222 spi_imx->rx = spi_imx_buf_rx_u32; in spi_imx_setupxfer()
1223 spi_imx->tx = spi_imx_buf_tx_u32; in spi_imx_setupxfer()
1225 spi_imx->dynamic_burst = 0; in spi_imx_setupxfer()
1228 if (spi_imx_can_dma(spi_imx->bitbang.master, spi, t)) in spi_imx_setupxfer()
1229 spi_imx->usedma = true; in spi_imx_setupxfer()
1231 spi_imx->usedma = false; in spi_imx_setupxfer()
1233 if (is_imx53_ecspi(spi_imx) && spi_imx->slave_mode) { in spi_imx_setupxfer()
1234 spi_imx->rx = mx53_ecspi_rx_slave; in spi_imx_setupxfer()
1235 spi_imx->tx = mx53_ecspi_tx_slave; in spi_imx_setupxfer()
1236 spi_imx->slave_burst = t->len; in spi_imx_setupxfer()
1239 spi_imx->devtype_data->prepare_transfer(spi_imx, spi, t); in spi_imx_setupxfer()
1246 struct spi_master *master = spi_imx->bitbang.master; in spi_imx_sdma_exit()
1248 if (master->dma_rx) { in spi_imx_sdma_exit()
1249 dma_release_channel(master->dma_rx); in spi_imx_sdma_exit()
1250 master->dma_rx = NULL; in spi_imx_sdma_exit()
1253 if (master->dma_tx) { in spi_imx_sdma_exit()
1254 dma_release_channel(master->dma_tx); in spi_imx_sdma_exit()
1255 master->dma_tx = NULL; in spi_imx_sdma_exit()
1268 spi_imx->wml = spi_imx->devtype_data->fifo_size / 2; in spi_imx_sdma_init()
1271 master->dma_tx = dma_request_chan(dev, "tx"); in spi_imx_sdma_init()
1272 if (IS_ERR(master->dma_tx)) { in spi_imx_sdma_init()
1273 ret = PTR_ERR(master->dma_tx); in spi_imx_sdma_init()
1275 master->dma_tx = NULL; in spi_imx_sdma_init()
1280 master->dma_rx = dma_request_chan(dev, "rx"); in spi_imx_sdma_init()
1281 if (IS_ERR(master->dma_rx)) { in spi_imx_sdma_init()
1282 ret = PTR_ERR(master->dma_rx); in spi_imx_sdma_init()
1284 master->dma_rx = NULL; in spi_imx_sdma_init()
1288 init_completion(&spi_imx->dma_rx_completion); in spi_imx_sdma_init()
1289 init_completion(&spi_imx->dma_tx_completion); in spi_imx_sdma_init()
1290 master->can_dma = spi_imx_can_dma; in spi_imx_sdma_init()
1291 master->max_dma_len = MAX_SDMA_BD_BYTES; in spi_imx_sdma_init()
1292 spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX | in spi_imx_sdma_init()
1305 complete(&spi_imx->dma_rx_completion); in spi_imx_dma_rx_callback()
1312 complete(&spi_imx->dma_tx_completion); in spi_imx_dma_tx_callback()
1320 timeout = (8 + 4) * size / spi_imx->spi_bus_clk; in spi_imx_calculate_timeout()
1335 struct spi_master *master = spi_imx->bitbang.master; in spi_imx_dma_transfer()
1336 struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg; in spi_imx_dma_transfer()
1337 struct scatterlist *last_sg = sg_last(rx->sgl, rx->nents); in spi_imx_dma_transfer()
1342 bytes_per_word = spi_imx_bytes_per_word(transfer->bits_per_word); in spi_imx_dma_transfer()
1343 for (i = spi_imx->devtype_data->fifo_size / 2; i > 0; i--) { in spi_imx_dma_transfer()
1351 spi_imx->wml = i; in spi_imx_dma_transfer()
1357 if (!spi_imx->devtype_data->setup_wml) { in spi_imx_dma_transfer()
1358 dev_err(spi_imx->dev, "No setup_wml()?\n"); in spi_imx_dma_transfer()
1359 ret = -EINVAL; in spi_imx_dma_transfer()
1362 spi_imx->devtype_data->setup_wml(spi_imx); in spi_imx_dma_transfer()
1368 desc_rx = dmaengine_prep_slave_sg(master->dma_rx, in spi_imx_dma_transfer()
1369 rx->sgl, rx->nents, DMA_DEV_TO_MEM, in spi_imx_dma_transfer()
1372 ret = -EINVAL; in spi_imx_dma_transfer()
1376 desc_rx->callback = spi_imx_dma_rx_callback; in spi_imx_dma_transfer()
1377 desc_rx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1379 reinit_completion(&spi_imx->dma_rx_completion); in spi_imx_dma_transfer()
1380 dma_async_issue_pending(master->dma_rx); in spi_imx_dma_transfer()
1382 desc_tx = dmaengine_prep_slave_sg(master->dma_tx, in spi_imx_dma_transfer()
1383 tx->sgl, tx->nents, DMA_MEM_TO_DEV, in spi_imx_dma_transfer()
1386 dmaengine_terminate_all(master->dma_tx); in spi_imx_dma_transfer()
1387 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1388 return -EINVAL; in spi_imx_dma_transfer()
1391 desc_tx->callback = spi_imx_dma_tx_callback; in spi_imx_dma_transfer()
1392 desc_tx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1394 reinit_completion(&spi_imx->dma_tx_completion); in spi_imx_dma_transfer()
1395 dma_async_issue_pending(master->dma_tx); in spi_imx_dma_transfer()
1397 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_dma_transfer()
1400 timeout = wait_for_completion_timeout(&spi_imx->dma_tx_completion, in spi_imx_dma_transfer()
1403 dev_err(spi_imx->dev, "I/O Error in DMA TX\n"); in spi_imx_dma_transfer()
1404 dmaengine_terminate_all(master->dma_tx); in spi_imx_dma_transfer()
1405 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1406 return -ETIMEDOUT; in spi_imx_dma_transfer()
1409 timeout = wait_for_completion_timeout(&spi_imx->dma_rx_completion, in spi_imx_dma_transfer()
1412 dev_err(&master->dev, "I/O Error in DMA RX\n"); in spi_imx_dma_transfer()
1413 spi_imx->devtype_data->reset(spi_imx); in spi_imx_dma_transfer()
1414 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1415 return -ETIMEDOUT; in spi_imx_dma_transfer()
1418 return transfer->len; in spi_imx_dma_transfer()
1421 transfer->error |= SPI_TRANS_FAIL_NO_START; in spi_imx_dma_transfer()
1428 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_pio_transfer()
1432 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer()
1433 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer()
1434 spi_imx->count = transfer->len; in spi_imx_pio_transfer()
1435 spi_imx->txfifo = 0; in spi_imx_pio_transfer()
1436 spi_imx->remainder = 0; in spi_imx_pio_transfer()
1438 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer()
1442 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE); in spi_imx_pio_transfer()
1444 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_pio_transfer()
1446 timeout = wait_for_completion_timeout(&spi_imx->xfer_done, in spi_imx_pio_transfer()
1449 dev_err(&spi->dev, "I/O Error in PIO\n"); in spi_imx_pio_transfer()
1450 spi_imx->devtype_data->reset(spi_imx); in spi_imx_pio_transfer()
1451 return -ETIMEDOUT; in spi_imx_pio_transfer()
1454 return transfer->len; in spi_imx_pio_transfer()
1460 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_pio_transfer_slave()
1461 int ret = transfer->len; in spi_imx_pio_transfer_slave()
1464 transfer->len > MX53_MAX_TRANSFER_BYTES) { in spi_imx_pio_transfer_slave()
1465 dev_err(&spi->dev, "Transaction too big, max size is %d bytes\n", in spi_imx_pio_transfer_slave()
1467 return -EMSGSIZE; in spi_imx_pio_transfer_slave()
1470 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer_slave()
1471 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer_slave()
1472 spi_imx->count = transfer->len; in spi_imx_pio_transfer_slave()
1473 spi_imx->txfifo = 0; in spi_imx_pio_transfer_slave()
1474 spi_imx->remainder = 0; in spi_imx_pio_transfer_slave()
1476 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer_slave()
1477 spi_imx->slave_aborted = false; in spi_imx_pio_transfer_slave()
1481 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE | MXC_INT_RDR); in spi_imx_pio_transfer_slave()
1483 if (wait_for_completion_interruptible(&spi_imx->xfer_done) || in spi_imx_pio_transfer_slave()
1484 spi_imx->slave_aborted) { in spi_imx_pio_transfer_slave()
1485 dev_dbg(&spi->dev, "interrupted\n"); in spi_imx_pio_transfer_slave()
1486 ret = -EINTR; in spi_imx_pio_transfer_slave()
1489 /* ecspi has a HW issue when works in Slave mode, in spi_imx_pio_transfer_slave()
1492 * so we have to disable ECSPI when in slave mode after the in spi_imx_pio_transfer_slave()
1495 if (spi_imx->devtype_data->disable) in spi_imx_pio_transfer_slave()
1496 spi_imx->devtype_data->disable(spi_imx); in spi_imx_pio_transfer_slave()
1504 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_transfer()
1506 transfer->effective_speed_hz = spi_imx->spi_bus_clk; in spi_imx_transfer()
1509 while (spi_imx->devtype_data->rx_available(spi_imx)) in spi_imx_transfer()
1510 readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_transfer()
1512 if (spi_imx->slave_mode) in spi_imx_transfer()
1515 if (spi_imx->usedma) in spi_imx_transfer()
1523 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, in spi_imx_setup()
1524 spi->mode, spi->bits_per_word, spi->max_speed_hz); in spi_imx_setup()
1539 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_prepare_message()
1541 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_prepare_message()
1545 ret = spi_imx->devtype_data->prepare_message(spi_imx, msg); in spi_imx_prepare_message()
1547 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_prepare_message()
1548 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_prepare_message()
1559 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_unprepare_message()
1560 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_unprepare_message()
1568 spi_imx->slave_aborted = true; in spi_imx_slave_abort()
1569 complete(&spi_imx->xfer_done); in spi_imx_slave_abort()
1576 struct device_node *np = pdev->dev.of_node; in spi_imx_probe()
1578 of_match_device(spi_imx_dt_ids, &pdev->dev); in spi_imx_probe()
1583 const struct spi_imx_devtype_data *devtype_data = of_id ? of_id->data : in spi_imx_probe()
1584 (struct spi_imx_devtype_data *)pdev->id_entry->driver_data; in spi_imx_probe()
1588 slave_mode = devtype_data->has_slavemode && in spi_imx_probe()
1589 of_property_read_bool(np, "spi-slave"); in spi_imx_probe()
1591 master = spi_alloc_slave(&pdev->dev, in spi_imx_probe()
1594 master = spi_alloc_master(&pdev->dev, in spi_imx_probe()
1597 return -ENOMEM; in spi_imx_probe()
1599 ret = of_property_read_u32(np, "fsl,spi-rdy-drctl", &spi_drctl); in spi_imx_probe()
1607 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); in spi_imx_probe()
1608 master->bus_num = np ? -1 : pdev->id; in spi_imx_probe()
1609 master->use_gpio_descriptors = true; in spi_imx_probe()
1612 spi_imx->bitbang.master = master; in spi_imx_probe()
1613 spi_imx->dev = &pdev->dev; in spi_imx_probe()
1614 spi_imx->slave_mode = slave_mode; in spi_imx_probe()
1616 spi_imx->devtype_data = devtype_data; in spi_imx_probe()
1624 if (!device_property_read_u32(&pdev->dev, "num-cs", &val)) in spi_imx_probe()
1625 master->num_chipselect = val; in spi_imx_probe()
1627 master->num_chipselect = 3; in spi_imx_probe()
1629 spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; in spi_imx_probe()
1630 spi_imx->bitbang.txrx_bufs = spi_imx_transfer; in spi_imx_probe()
1631 spi_imx->bitbang.master->setup = spi_imx_setup; in spi_imx_probe()
1632 spi_imx->bitbang.master->cleanup = spi_imx_cleanup; in spi_imx_probe()
1633 spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message; in spi_imx_probe()
1634 spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; in spi_imx_probe()
1635 spi_imx->bitbang.master->slave_abort = spi_imx_slave_abort; in spi_imx_probe()
1636 spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \ in spi_imx_probe()
1640 spi_imx->bitbang.master->mode_bits |= SPI_LOOP | SPI_READY; in spi_imx_probe()
1642 spi_imx->spi_drctl = spi_drctl; in spi_imx_probe()
1644 init_completion(&spi_imx->xfer_done); in spi_imx_probe()
1647 spi_imx->base = devm_ioremap_resource(&pdev->dev, res); in spi_imx_probe()
1648 if (IS_ERR(spi_imx->base)) { in spi_imx_probe()
1649 ret = PTR_ERR(spi_imx->base); in spi_imx_probe()
1652 spi_imx->base_phys = res->start; in spi_imx_probe()
1660 ret = devm_request_irq(&pdev->dev, irq, spi_imx_isr, 0, in spi_imx_probe()
1661 dev_name(&pdev->dev), spi_imx); in spi_imx_probe()
1663 dev_err(&pdev->dev, "can't get irq%d: %d\n", irq, ret); in spi_imx_probe()
1667 spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in spi_imx_probe()
1668 if (IS_ERR(spi_imx->clk_ipg)) { in spi_imx_probe()
1669 ret = PTR_ERR(spi_imx->clk_ipg); in spi_imx_probe()
1673 spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); in spi_imx_probe()
1674 if (IS_ERR(spi_imx->clk_per)) { in spi_imx_probe()
1675 ret = PTR_ERR(spi_imx->clk_per); in spi_imx_probe()
1679 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_probe()
1683 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_probe()
1687 pm_runtime_set_autosuspend_delay(spi_imx->dev, MXC_RPM_TIMEOUT); in spi_imx_probe()
1688 pm_runtime_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1689 pm_runtime_get_noresume(spi_imx->dev); in spi_imx_probe()
1690 pm_runtime_set_active(spi_imx->dev); in spi_imx_probe()
1691 pm_runtime_enable(spi_imx->dev); in spi_imx_probe()
1693 spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); in spi_imx_probe()
1698 if (spi_imx->devtype_data->has_dmamode) { in spi_imx_probe()
1699 ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master); in spi_imx_probe()
1700 if (ret == -EPROBE_DEFER) in spi_imx_probe()
1704 dev_dbg(&pdev->dev, "dma setup error %d, use pio\n", in spi_imx_probe()
1708 spi_imx->devtype_data->reset(spi_imx); in spi_imx_probe()
1710 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_probe()
1712 master->dev.of_node = pdev->dev.of_node; in spi_imx_probe()
1713 ret = spi_bitbang_start(&spi_imx->bitbang); in spi_imx_probe()
1715 dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); in spi_imx_probe()
1719 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_probe()
1720 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_probe()
1725 if (spi_imx->devtype_data->has_dmamode) in spi_imx_probe()
1728 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1729 pm_runtime_set_suspended(&pdev->dev); in spi_imx_probe()
1730 pm_runtime_disable(spi_imx->dev); in spi_imx_probe()
1732 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_probe()
1734 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_probe()
1747 spi_bitbang_stop(&spi_imx->bitbang); in spi_imx_remove()
1749 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_remove()
1751 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_remove()
1755 writel(0, spi_imx->base + MXC_CSPICTRL); in spi_imx_remove()
1757 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_remove()
1758 pm_runtime_put_sync(spi_imx->dev); in spi_imx_remove()
1759 pm_runtime_disable(spi_imx->dev); in spi_imx_remove()
1775 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_runtime_resume()
1779 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_runtime_resume()
1781 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_resume()
1795 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_suspend()
1796 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_runtime_suspend()