Lines Matching full:cs
92 struct spi_mpc8xxx_cs *cs = spi->controller_state; in fsl_spi_change_mode() local
97 if (cs->hw_mode == mpc8xxx_spi_read_reg(mode)) in fsl_spi_change_mode()
104 mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE); in fsl_spi_change_mode()
110 mpc8xxx_spi_write_reg(mode, cs->hw_mode); in fsl_spi_change_mode()
119 struct spi_mpc8xxx_cs *cs = spi->controller_state; in fsl_spi_chipselect() local
129 mpc8xxx_spi->rx_shift = cs->rx_shift; in fsl_spi_chipselect()
130 mpc8xxx_spi->tx_shift = cs->tx_shift; in fsl_spi_chipselect()
131 mpc8xxx_spi->get_rx = cs->get_rx; in fsl_spi_chipselect()
132 mpc8xxx_spi->get_tx = cs->get_tx; in fsl_spi_chipselect()
175 static int mspi_apply_cpu_mode_quirks(struct spi_mpc8xxx_cs *cs, in mspi_apply_cpu_mode_quirks() argument
180 cs->rx_shift = 0; in mspi_apply_cpu_mode_quirks()
181 cs->tx_shift = 0; in mspi_apply_cpu_mode_quirks()
183 cs->get_rx = mpc8xxx_spi_rx_buf_u8; in mspi_apply_cpu_mode_quirks()
184 cs->get_tx = mpc8xxx_spi_tx_buf_u8; in mspi_apply_cpu_mode_quirks()
186 cs->get_rx = mpc8xxx_spi_rx_buf_u16; in mspi_apply_cpu_mode_quirks()
187 cs->get_tx = mpc8xxx_spi_tx_buf_u16; in mspi_apply_cpu_mode_quirks()
189 cs->get_rx = mpc8xxx_spi_rx_buf_u32; in mspi_apply_cpu_mode_quirks()
190 cs->get_tx = mpc8xxx_spi_tx_buf_u32; in mspi_apply_cpu_mode_quirks()
195 mpc8xxx_spi->set_shifts(&cs->rx_shift, &cs->tx_shift, in mspi_apply_cpu_mode_quirks()
199 mpc8xxx_spi->rx_shift = cs->rx_shift; in mspi_apply_cpu_mode_quirks()
200 mpc8xxx_spi->tx_shift = cs->tx_shift; in mspi_apply_cpu_mode_quirks()
201 mpc8xxx_spi->get_rx = cs->get_rx; in mspi_apply_cpu_mode_quirks()
202 mpc8xxx_spi->get_tx = cs->get_tx; in mspi_apply_cpu_mode_quirks()
207 static int mspi_apply_qe_mode_quirks(struct spi_mpc8xxx_cs *cs, in mspi_apply_qe_mode_quirks() argument
232 struct spi_mpc8xxx_cs *cs = spi->controller_state; in fsl_spi_setup_transfer() local
249 bits_per_word = mspi_apply_cpu_mode_quirks(cs, spi, in fsl_spi_setup_transfer()
253 bits_per_word = mspi_apply_qe_mode_quirks(cs, spi, in fsl_spi_setup_transfer()
265 cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16 in fsl_spi_setup_transfer()
268 cs->hw_mode |= SPMODE_LEN(bits_per_word); in fsl_spi_setup_transfer()
271 cs->hw_mode |= SPMODE_DIV16; in fsl_spi_setup_transfer()
284 cs->hw_mode |= SPMODE_PM(pm); in fsl_spi_setup_transfer()
383 /* Don't allow changes if CS is active */ in fsl_spi_do_one_msg()
391 "speed_hz cannot change while CS is active\n"); in fsl_spi_do_one_msg()
446 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi); in fsl_spi_setup() local
451 if (!cs) { in fsl_spi_setup()
452 cs = kzalloc(sizeof(*cs), GFP_KERNEL); in fsl_spi_setup()
453 if (!cs) in fsl_spi_setup()
455 spi_set_ctldata(spi, cs); in fsl_spi_setup()
461 hw_mode = cs->hw_mode; /* Save original settings */ in fsl_spi_setup()
462 cs->hw_mode = mpc8xxx_spi_read_reg(®_base->mode); in fsl_spi_setup()
464 cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH in fsl_spi_setup()
468 cs->hw_mode |= SPMODE_CP_BEGIN_EDGECLK; in fsl_spi_setup()
470 cs->hw_mode |= SPMODE_CI_INACTIVEHIGH; in fsl_spi_setup()
472 cs->hw_mode |= SPMODE_REV; in fsl_spi_setup()
474 cs->hw_mode |= SPMODE_LOOP; in fsl_spi_setup()
478 cs->hw_mode = hw_mode; /* Restore settings */ in fsl_spi_setup()
490 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi); in fsl_spi_cleanup() local
492 kfree(cs); in fsl_spi_cleanup()
555 u16 cs = spi->chip_select; in fsl_spi_grlib_cs_control() local
559 } else if (cs < mpc8xxx_spi->native_chipselects) { in fsl_spi_grlib_cs_control()
561 slvsel = on ? (slvsel | (1 << cs)) : (slvsel & ~(1 << cs)); in fsl_spi_grlib_cs_control()
733 * appropriate callback for dealing with the CS lines. This isn't in of_fsl_spi_probe()
736 ret = gpiod_count(dev, "cs"); in of_fsl_spi_probe()