Lines Matching +full:cs +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0-or-later
21 /*----------------------------------------------------------------------*/
24 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
25 * Use this for GPIO or shift-register level hardware APIs.
27 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
29 * used, though maybe they're called from controller-aware code.
31 * chipselect() and friends may use spi_device->controller_data and
41 unsigned nsecs; /* (clock cycle time)/2 */
64 unsigned bits = t->bits_per_word; in bitbang_txrx_8()
65 unsigned count = t->len; in bitbang_txrx_8()
66 const u8 *tx = t->tx_buf; in bitbang_txrx_8()
67 u8 *rx = t->rx_buf; in bitbang_txrx_8()
77 count -= 1; in bitbang_txrx_8()
79 return t->len - count; in bitbang_txrx_8()
92 unsigned bits = t->bits_per_word; in bitbang_txrx_16()
93 unsigned count = t->len; in bitbang_txrx_16()
94 const u16 *tx = t->tx_buf; in bitbang_txrx_16()
95 u16 *rx = t->rx_buf; in bitbang_txrx_16()
105 count -= 2; in bitbang_txrx_16()
107 return t->len - count; in bitbang_txrx_16()
120 unsigned bits = t->bits_per_word; in bitbang_txrx_32()
121 unsigned count = t->len; in bitbang_txrx_32()
122 const u32 *tx = t->tx_buf; in bitbang_txrx_32()
123 u32 *rx = t->rx_buf; in bitbang_txrx_32()
133 count -= 4; in bitbang_txrx_32()
135 return t->len - count; in bitbang_txrx_32()
140 struct spi_bitbang_cs *cs = spi->controller_state; in spi_bitbang_setup_transfer() local
145 bits_per_word = t->bits_per_word; in spi_bitbang_setup_transfer()
146 hz = t->speed_hz; in spi_bitbang_setup_transfer()
152 /* spi_transfer level calls that work per-word */ in spi_bitbang_setup_transfer()
154 bits_per_word = spi->bits_per_word; in spi_bitbang_setup_transfer()
156 cs->txrx_bufs = bitbang_txrx_8; in spi_bitbang_setup_transfer()
158 cs->txrx_bufs = bitbang_txrx_16; in spi_bitbang_setup_transfer()
160 cs->txrx_bufs = bitbang_txrx_32; in spi_bitbang_setup_transfer()
162 return -EINVAL; in spi_bitbang_setup_transfer()
164 /* nsecs = (clock period)/2 */ in spi_bitbang_setup_transfer()
166 hz = spi->max_speed_hz; in spi_bitbang_setup_transfer()
168 cs->nsecs = (1000000000/2) / hz; in spi_bitbang_setup_transfer()
169 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000)) in spi_bitbang_setup_transfer()
170 return -EINVAL; in spi_bitbang_setup_transfer()
178 * spi_bitbang_setup - default setup for per-word I/O loops
182 struct spi_bitbang_cs *cs = spi->controller_state; in spi_bitbang_setup() local
185 bitbang = spi_master_get_devdata(spi->master); in spi_bitbang_setup()
187 if (!cs) { in spi_bitbang_setup()
188 cs = kzalloc(sizeof(*cs), GFP_KERNEL); in spi_bitbang_setup()
189 if (!cs) in spi_bitbang_setup()
190 return -ENOMEM; in spi_bitbang_setup()
191 spi->controller_state = cs; in spi_bitbang_setup()
194 /* per-word shift register access, in hardware or bitbanging */ in spi_bitbang_setup()
195 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; in spi_bitbang_setup()
196 if (!cs->txrx_word) in spi_bitbang_setup()
197 return -EINVAL; in spi_bitbang_setup()
199 if (bitbang->setup_transfer) { in spi_bitbang_setup()
200 int retval = bitbang->setup_transfer(spi, NULL); in spi_bitbang_setup()
205 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs); in spi_bitbang_setup()
212 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
216 kfree(spi->controller_state); in spi_bitbang_cleanup()
222 struct spi_bitbang_cs *cs = spi->controller_state; in spi_bitbang_bufs() local
223 unsigned nsecs = cs->nsecs; in spi_bitbang_bufs()
226 bitbang = spi_master_get_devdata(spi->master); in spi_bitbang_bufs()
227 if (bitbang->set_line_direction) { in spi_bitbang_bufs()
230 err = bitbang->set_line_direction(spi, !!(t->tx_buf)); in spi_bitbang_bufs()
235 if (spi->mode & SPI_3WIRE) { in spi_bitbang_bufs()
238 flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX; in spi_bitbang_bufs()
239 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags); in spi_bitbang_bufs()
241 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0); in spi_bitbang_bufs()
244 /*----------------------------------------------------------------------*/
254 * Drivers can provide word-at-a-time i/o primitives, or provide
255 * transfer-at-a-time ones to leverage dma or fifo hardware.
264 mutex_lock(&bitbang->lock); in spi_bitbang_prepare_hardware()
265 bitbang->busy = 1; in spi_bitbang_prepare_hardware()
266 mutex_unlock(&bitbang->lock); in spi_bitbang_prepare_hardware()
278 if (bitbang->setup_transfer) { in spi_bitbang_transfer_one()
279 status = bitbang->setup_transfer(spi, transfer); in spi_bitbang_transfer_one()
284 if (transfer->len) in spi_bitbang_transfer_one()
285 status = bitbang->txrx_bufs(spi, transfer); in spi_bitbang_transfer_one()
287 if (status == transfer->len) in spi_bitbang_transfer_one()
290 status = -EREMOTEIO; in spi_bitbang_transfer_one()
304 mutex_lock(&bitbang->lock); in spi_bitbang_unprepare_hardware()
305 bitbang->busy = 0; in spi_bitbang_unprepare_hardware()
306 mutex_unlock(&bitbang->lock); in spi_bitbang_unprepare_hardware()
313 struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master); in spi_bitbang_set_cs()
315 /* SPI core provides CS high / low, but bitbang driver in spi_bitbang_set_cs()
316 * expects CS active in spi_bitbang_set_cs()
319 enable = (!!(spi->mode & SPI_CS_HIGH) == enable); in spi_bitbang_set_cs()
322 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE : in spi_bitbang_set_cs()
327 /*----------------------------------------------------------------------*/
331 struct spi_master *master = bitbang->master; in spi_bitbang_init()
335 return -EINVAL; in spi_bitbang_init()
340 * driver-specific chipselect routine. in spi_bitbang_init()
342 custom_cs = (!master->use_gpio_descriptors || in spi_bitbang_init()
343 (master->flags & SPI_MASTER_GPIO_SS)); in spi_bitbang_init()
345 if (custom_cs && !bitbang->chipselect) in spi_bitbang_init()
346 return -EINVAL; in spi_bitbang_init()
348 mutex_init(&bitbang->lock); in spi_bitbang_init()
350 if (!master->mode_bits) in spi_bitbang_init()
351 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags; in spi_bitbang_init()
353 if (master->transfer || master->transfer_one_message) in spi_bitbang_init()
354 return -EINVAL; in spi_bitbang_init()
356 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware; in spi_bitbang_init()
357 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware; in spi_bitbang_init()
358 master->transfer_one = spi_bitbang_transfer_one; in spi_bitbang_init()
360 * When using GPIO descriptors, the ->set_cs() callback doesn't even in spi_bitbang_init()
364 master->set_cs = spi_bitbang_set_cs; in spi_bitbang_init()
366 if (!bitbang->txrx_bufs) { in spi_bitbang_init()
367 bitbang->use_dma = 0; in spi_bitbang_init()
368 bitbang->txrx_bufs = spi_bitbang_bufs; in spi_bitbang_init()
369 if (!master->setup) { in spi_bitbang_init()
370 if (!bitbang->setup_transfer) in spi_bitbang_init()
371 bitbang->setup_transfer = in spi_bitbang_init()
373 master->setup = spi_bitbang_setup; in spi_bitbang_init()
374 master->cleanup = spi_bitbang_cleanup; in spi_bitbang_init()
383 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
386 * Caller should have zero-initialized all parts of the structure, and then
392 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
393 * hardware that basically exposes a shift register) or per-spi_transfer
396 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
398 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
412 struct spi_master *master = bitbang->master; in spi_bitbang_start()
431 * spi_bitbang_stop - stops the task providing spi communication
435 spi_unregister_master(bitbang->master); in spi_bitbang_stop()