Lines Matching +full:native +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * the driver does not rely on the native chipselects at all
8 * Based on: spi-bcm2835.c
35 "time in us to run a transfer in polling mode - if zero no polling is used\n");
115 snprintf(name, sizeof(name), "spi-bcm2835aux-%s", dname); in bcm2835aux_debugfs_create()
119 bs->debugfs_dir = dir; in bcm2835aux_debugfs_create()
123 &bs->count_transfer_polling); in bcm2835aux_debugfs_create()
125 &bs->count_transfer_irq); in bcm2835aux_debugfs_create()
127 &bs->count_transfer_irq_after_poll); in bcm2835aux_debugfs_create()
132 debugfs_remove_recursive(bs->debugfs_dir); in bcm2835aux_debugfs_remove()
133 bs->debugfs_dir = NULL; in bcm2835aux_debugfs_remove()
148 return readl(bs->regs + reg); in bcm2835aux_rd()
154 writel(val, bs->regs + reg); in bcm2835aux_wr()
160 int count = min(bs->rx_len, 3); in bcm2835aux_rd_fifo()
163 if (bs->rx_buf) { in bcm2835aux_rd_fifo()
166 *bs->rx_buf++ = (data >> 16) & 0xff; in bcm2835aux_rd_fifo()
169 *bs->rx_buf++ = (data >> 8) & 0xff; in bcm2835aux_rd_fifo()
172 *bs->rx_buf++ = (data >> 0) & 0xff; in bcm2835aux_rd_fifo()
173 /* fallthrough - no default */ in bcm2835aux_rd_fifo()
176 bs->rx_len -= count; in bcm2835aux_rd_fifo()
177 bs->pending -= count; in bcm2835aux_rd_fifo()
188 count = min(bs->tx_len, 3); in bcm2835aux_wr_fifo()
191 byte = bs->tx_buf ? *bs->tx_buf++ : 0; in bcm2835aux_wr_fifo()
192 data |= byte << (8 * (2 - i)); in bcm2835aux_wr_fifo()
195 /* and set the variable bit-length */ in bcm2835aux_wr_fifo()
199 bs->tx_len -= count; in bcm2835aux_wr_fifo()
200 bs->pending += count; in bcm2835aux_wr_fifo()
202 /* write to the correct TX-register */ in bcm2835aux_wr_fifo()
203 if (bs->tx_len) in bcm2835aux_wr_fifo()
222 for (; bs->rx_len && (stat & BCM2835_AUX_SPI_STAT_RX_LVL); in bcm2835aux_spi_transfer_helper()
227 while (bs->tx_len && in bcm2835aux_spi_transfer_helper()
228 (bs->pending < 12) && in bcm2835aux_spi_transfer_helper()
248 if (!bs->tx_len) { in bcm2835aux_spi_interrupt()
250 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] | in bcm2835aux_spi_interrupt()
255 if (!bs->rx_len) { in bcm2835aux_spi_interrupt()
256 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_interrupt()
257 complete(&master->xfer_completion); in bcm2835aux_spi_interrupt()
270 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] | in __bcm2835aux_spi_transfer_one_irq()
285 bs->count_transfer_irq++; in bcm2835aux_spi_transfer_one_irq()
288 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_transfer_one_irq()
289 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_transfer_one_irq()
292 while ((bs->tx_len) && in bcm2835aux_spi_transfer_one_irq()
293 (bs->pending < 12) && in bcm2835aux_spi_transfer_one_irq()
299 /* now run the interrupt mode */ in bcm2835aux_spi_transfer_one_irq()
311 bs->count_transfer_polling++; in bcm2835aux_spi_transfer_one_poll()
314 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_transfer_one_poll()
315 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_transfer_one_poll()
321 while (bs->rx_len) { in bcm2835aux_spi_transfer_one_poll()
327 if (bs->rx_len && time_after(jiffies, timeout)) { in bcm2835aux_spi_transfer_one_poll()
328 dev_dbg_ratelimited(&spi->dev, in bcm2835aux_spi_transfer_one_poll()
329 … "timeout period reached: jiffies: %lu remaining tx/rx: %d/%d - falling back to interrupt mode\n", in bcm2835aux_spi_transfer_one_poll()
330 jiffies - timeout, in bcm2835aux_spi_transfer_one_poll()
331 bs->tx_len, bs->rx_len); in bcm2835aux_spi_transfer_one_poll()
333 bs->count_transfer_irq_after_poll++; in bcm2835aux_spi_transfer_one_poll()
353 * note that we use the variable data mode, which in bcm2835aux_spi_transfer_one()
360 spi_hz = tfr->speed_hz; in bcm2835aux_spi_transfer_one()
361 clk_hz = clk_get_rate(bs->clk); in bcm2835aux_spi_transfer_one()
366 speed = DIV_ROUND_UP(clk_hz, 2 * spi_hz) - 1; in bcm2835aux_spi_transfer_one()
373 bs->cntl[0] &= ~(BCM2835_AUX_SPI_CNTL0_SPEED); in bcm2835aux_spi_transfer_one()
375 bs->cntl[0] |= speed << BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT; in bcm2835aux_spi_transfer_one()
377 tfr->effective_speed_hz = clk_hz / (2 * (speed + 1)); in bcm2835aux_spi_transfer_one()
380 bs->tx_buf = tfr->tx_buf; in bcm2835aux_spi_transfer_one()
381 bs->rx_buf = tfr->rx_buf; in bcm2835aux_spi_transfer_one()
382 bs->tx_len = tfr->len; in bcm2835aux_spi_transfer_one()
383 bs->rx_len = tfr->len; in bcm2835aux_spi_transfer_one()
384 bs->pending = 0; in bcm2835aux_spi_transfer_one()
388 * transferred - in our case the chunk size is 3 bytes, so we in bcm2835aux_spi_transfer_one()
394 byte_limit = hz_per_byte ? tfr->effective_speed_hz / hz_per_byte : 1; in bcm2835aux_spi_transfer_one()
396 /* run in polling mode for short transfers */ in bcm2835aux_spi_transfer_one()
397 if (tfr->len < byte_limit) in bcm2835aux_spi_transfer_one()
400 /* run in interrupt mode for all others */ in bcm2835aux_spi_transfer_one()
407 struct spi_device *spi = msg->spi; in bcm2835aux_spi_prepare_message()
410 bs->cntl[0] = BCM2835_AUX_SPI_CNTL0_ENABLE | in bcm2835aux_spi_prepare_message()
413 bs->cntl[1] = BCM2835_AUX_SPI_CNTL1_MSBF_IN; in bcm2835aux_spi_prepare_message()
416 if (spi->mode & SPI_CPOL) { in bcm2835aux_spi_prepare_message()
417 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPOL; in bcm2835aux_spi_prepare_message()
418 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_OUT_RISING; in bcm2835aux_spi_prepare_message()
420 bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_IN_RISING; in bcm2835aux_spi_prepare_message()
422 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); in bcm2835aux_spi_prepare_message()
423 bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]); in bcm2835aux_spi_prepare_message()
450 /* sanity check for native cs */ in bcm2835aux_spi_setup()
451 if (spi->mode & SPI_NO_CS) in bcm2835aux_spi_setup()
453 if (gpio_is_valid(spi->cs_gpio)) { in bcm2835aux_spi_setup()
454 /* with gpio-cs set the GPIO to the correct level in bcm2835aux_spi_setup()
456 * as output but native cs) in bcm2835aux_spi_setup()
458 ret = gpio_direction_output(spi->cs_gpio, in bcm2835aux_spi_setup()
459 (spi->mode & SPI_CS_HIGH) ? 0 : 1); in bcm2835aux_spi_setup()
461 dev_err(&spi->dev, in bcm2835aux_spi_setup()
463 spi->cs_gpio, ret); in bcm2835aux_spi_setup()
468 /* for dt-backwards compatibility: only support native on CS0 in bcm2835aux_spi_setup()
469 * known things not supported with broken native CS: in bcm2835aux_spi_setup()
470 * * multiple chip-selects: cs0-cs2 are all in bcm2835aux_spi_setup()
479 dev_warn(&spi->dev, in bcm2835aux_spi_setup()
480 "Native CS is not supported - please configure cs-gpio in device-tree\n"); in bcm2835aux_spi_setup()
482 if (spi->chip_select == 0) in bcm2835aux_spi_setup()
485 dev_warn(&spi->dev, "Native CS is not working for cs > 0\n"); in bcm2835aux_spi_setup()
487 return -EINVAL; in bcm2835aux_spi_setup()
497 master = devm_spi_alloc_master(&pdev->dev, sizeof(*bs)); in bcm2835aux_spi_probe()
499 return -ENOMEM; in bcm2835aux_spi_probe()
502 master->mode_bits = (SPI_CPOL | SPI_CS_HIGH | SPI_NO_CS); in bcm2835aux_spi_probe()
503 master->bits_per_word_mask = SPI_BPW_MASK(8); in bcm2835aux_spi_probe()
504 /* even though the driver never officially supported native CS in bcm2835aux_spi_probe()
505 * allow a single native CS for legacy DT support purposes when in bcm2835aux_spi_probe()
506 * no cs-gpio is configured. in bcm2835aux_spi_probe()
507 * Known limitations for native cs are: in bcm2835aux_spi_probe()
508 * * multiple chip-selects: cs0-cs2 are all simultaniously asserted in bcm2835aux_spi_probe()
509 * whenever there is a transfer - this even includes SPI_NO_CS in bcm2835aux_spi_probe()
510 * * SPI_CS_HIGH: is ignores - cs are always asserted low in bcm2835aux_spi_probe()
515 master->num_chipselect = 1; in bcm2835aux_spi_probe()
516 master->setup = bcm2835aux_spi_setup; in bcm2835aux_spi_probe()
517 master->transfer_one = bcm2835aux_spi_transfer_one; in bcm2835aux_spi_probe()
518 master->handle_err = bcm2835aux_spi_handle_err; in bcm2835aux_spi_probe()
519 master->prepare_message = bcm2835aux_spi_prepare_message; in bcm2835aux_spi_probe()
520 master->unprepare_message = bcm2835aux_spi_unprepare_message; in bcm2835aux_spi_probe()
521 master->dev.of_node = pdev->dev.of_node; in bcm2835aux_spi_probe()
526 bs->regs = devm_platform_ioremap_resource(pdev, 0); in bcm2835aux_spi_probe()
527 if (IS_ERR(bs->regs)) in bcm2835aux_spi_probe()
528 return PTR_ERR(bs->regs); in bcm2835aux_spi_probe()
530 bs->clk = devm_clk_get(&pdev->dev, NULL); in bcm2835aux_spi_probe()
531 if (IS_ERR(bs->clk)) { in bcm2835aux_spi_probe()
532 err = PTR_ERR(bs->clk); in bcm2835aux_spi_probe()
533 dev_err(&pdev->dev, "could not get clk: %d\n", err); in bcm2835aux_spi_probe()
537 bs->irq = platform_get_irq(pdev, 0); in bcm2835aux_spi_probe()
538 if (bs->irq <= 0) in bcm2835aux_spi_probe()
539 return bs->irq ? bs->irq : -ENODEV; in bcm2835aux_spi_probe()
542 err = clk_prepare_enable(bs->clk); in bcm2835aux_spi_probe()
544 dev_err(&pdev->dev, "could not prepare clock: %d\n", err); in bcm2835aux_spi_probe()
549 clk_hz = clk_get_rate(bs->clk); in bcm2835aux_spi_probe()
551 dev_err(&pdev->dev, "clock returns 0 Hz\n"); in bcm2835aux_spi_probe()
552 err = -ENODEV; in bcm2835aux_spi_probe()
556 /* reset SPI-HW block */ in bcm2835aux_spi_probe()
559 err = devm_request_irq(&pdev->dev, bs->irq, in bcm2835aux_spi_probe()
562 dev_name(&pdev->dev), master); in bcm2835aux_spi_probe()
564 dev_err(&pdev->dev, "could not request IRQ: %d\n", err); in bcm2835aux_spi_probe()
570 dev_err(&pdev->dev, "could not register SPI master: %d\n", err); in bcm2835aux_spi_probe()
574 bcm2835aux_debugfs_create(bs, dev_name(&pdev->dev)); in bcm2835aux_spi_probe()
579 clk_disable_unprepare(bs->clk); in bcm2835aux_spi_probe()
595 clk_disable_unprepare(bs->clk); in bcm2835aux_spi_remove()
601 { .compatible = "brcm,bcm2835-aux-spi", },
608 .name = "spi-bcm2835aux",