Lines Matching +full:domain +full:- +full:idle +full:- +full:state
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip Generic power domain support.
19 #include <dt-bindings/power/px30-power.h>
20 #include <dt-bindings/power/rk3036-power.h>
21 #include <dt-bindings/power/rk3066-power.h>
22 #include <dt-bindings/power/rk3128-power.h>
23 #include <dt-bindings/power/rk3188-power.h>
24 #include <dt-bindings/power/rk3228-power.h>
25 #include <dt-bindings/power/rk3288-power.h>
26 #include <dt-bindings/power/rk3328-power.h>
27 #include <dt-bindings/power/rk3366-power.h>
28 #include <dt-bindings/power/rk3368-power.h>
29 #include <dt-bindings/power/rk3399-power.h>
88 #define DOMAIN(pwr, status, req, idle, ack, wakeup) \ macro
93 .idle_mask = (idle), \
98 #define DOMAIN_M(pwr, status, req, idle, ack, wakeup) \ argument
105 .idle_mask = (idle), \
110 #define DOMAIN_RK3036(req, ack, idle, wakeup) \ argument
115 .idle_mask = (idle), \
123 DOMAIN(pwr, status, req, req, (req) << 16, wakeup)
129 DOMAIN(pwr, status, req, (req) << 16, req, wakeup)
132 DOMAIN(pwr, status, req, req, req, wakeup)
136 struct rockchip_pmu *pmu = pd->pmu; in rockchip_pmu_domain_is_idle()
137 const struct rockchip_domain_info *pd_info = pd->info; in rockchip_pmu_domain_is_idle()
140 regmap_read(pmu->regmap, pmu->info->idle_offset, &val); in rockchip_pmu_domain_is_idle()
141 return (val & pd_info->idle_mask) == pd_info->idle_mask; in rockchip_pmu_domain_is_idle()
148 regmap_read(pmu->regmap, pmu->info->ack_offset, &val); in rockchip_pmu_read_ack()
153 bool idle) in rockchip_pmu_set_idle_request() argument
155 const struct rockchip_domain_info *pd_info = pd->info; in rockchip_pmu_set_idle_request()
156 struct generic_pm_domain *genpd = &pd->genpd; in rockchip_pmu_set_idle_request()
157 struct rockchip_pmu *pmu = pd->pmu; in rockchip_pmu_set_idle_request()
163 if (pd_info->req_mask == 0) in rockchip_pmu_set_idle_request()
165 else if (pd_info->req_w_mask) in rockchip_pmu_set_idle_request()
166 regmap_write(pmu->regmap, pmu->info->req_offset, in rockchip_pmu_set_idle_request()
167 idle ? (pd_info->req_mask | pd_info->req_w_mask) : in rockchip_pmu_set_idle_request()
168 pd_info->req_w_mask); in rockchip_pmu_set_idle_request()
170 regmap_update_bits(pmu->regmap, pmu->info->req_offset, in rockchip_pmu_set_idle_request()
171 pd_info->req_mask, idle ? -1U : 0); in rockchip_pmu_set_idle_request()
176 target_ack = idle ? pd_info->ack_mask : 0; in rockchip_pmu_set_idle_request()
178 (val & pd_info->ack_mask) == target_ack, in rockchip_pmu_set_idle_request()
181 dev_err(pmu->dev, in rockchip_pmu_set_idle_request()
182 "failed to get ack on domain '%s', val=0x%x\n", in rockchip_pmu_set_idle_request()
183 genpd->name, val); in rockchip_pmu_set_idle_request()
188 is_idle, is_idle == idle, 0, 10000); in rockchip_pmu_set_idle_request()
190 dev_err(pmu->dev, in rockchip_pmu_set_idle_request()
191 "failed to set idle on domain '%s', val=%d\n", in rockchip_pmu_set_idle_request()
192 genpd->name, is_idle); in rockchip_pmu_set_idle_request()
203 for (i = 0; i < pd->num_qos; i++) { in rockchip_pmu_save_qos()
204 regmap_read(pd->qos_regmap[i], in rockchip_pmu_save_qos()
206 &pd->qos_save_regs[0][i]); in rockchip_pmu_save_qos()
207 regmap_read(pd->qos_regmap[i], in rockchip_pmu_save_qos()
209 &pd->qos_save_regs[1][i]); in rockchip_pmu_save_qos()
210 regmap_read(pd->qos_regmap[i], in rockchip_pmu_save_qos()
212 &pd->qos_save_regs[2][i]); in rockchip_pmu_save_qos()
213 regmap_read(pd->qos_regmap[i], in rockchip_pmu_save_qos()
215 &pd->qos_save_regs[3][i]); in rockchip_pmu_save_qos()
216 regmap_read(pd->qos_regmap[i], in rockchip_pmu_save_qos()
218 &pd->qos_save_regs[4][i]); in rockchip_pmu_save_qos()
227 for (i = 0; i < pd->num_qos; i++) { in rockchip_pmu_restore_qos()
228 regmap_write(pd->qos_regmap[i], in rockchip_pmu_restore_qos()
230 pd->qos_save_regs[0][i]); in rockchip_pmu_restore_qos()
231 regmap_write(pd->qos_regmap[i], in rockchip_pmu_restore_qos()
233 pd->qos_save_regs[1][i]); in rockchip_pmu_restore_qos()
234 regmap_write(pd->qos_regmap[i], in rockchip_pmu_restore_qos()
236 pd->qos_save_regs[2][i]); in rockchip_pmu_restore_qos()
237 regmap_write(pd->qos_regmap[i], in rockchip_pmu_restore_qos()
239 pd->qos_save_regs[3][i]); in rockchip_pmu_restore_qos()
240 regmap_write(pd->qos_regmap[i], in rockchip_pmu_restore_qos()
242 pd->qos_save_regs[4][i]); in rockchip_pmu_restore_qos()
250 struct rockchip_pmu *pmu = pd->pmu; in rockchip_pmu_domain_is_on()
253 /* check idle status for idle-only domains */ in rockchip_pmu_domain_is_on()
254 if (pd->info->status_mask == 0) in rockchip_pmu_domain_is_on()
257 regmap_read(pmu->regmap, pmu->info->status_offset, &val); in rockchip_pmu_domain_is_on()
260 return !(val & pd->info->status_mask); in rockchip_pmu_domain_is_on()
266 struct rockchip_pmu *pmu = pd->pmu; in rockchip_do_pmu_set_power_domain()
267 struct generic_pm_domain *genpd = &pd->genpd; in rockchip_do_pmu_set_power_domain()
270 if (pd->info->pwr_mask == 0) in rockchip_do_pmu_set_power_domain()
272 else if (pd->info->pwr_w_mask) in rockchip_do_pmu_set_power_domain()
273 regmap_write(pmu->regmap, pmu->info->pwr_offset, in rockchip_do_pmu_set_power_domain()
274 on ? pd->info->pwr_w_mask : in rockchip_do_pmu_set_power_domain()
275 (pd->info->pwr_mask | pd->info->pwr_w_mask)); in rockchip_do_pmu_set_power_domain()
277 regmap_update_bits(pmu->regmap, pmu->info->pwr_offset, in rockchip_do_pmu_set_power_domain()
278 pd->info->pwr_mask, on ? 0 : -1U); in rockchip_do_pmu_set_power_domain()
284 dev_err(pmu->dev, in rockchip_do_pmu_set_power_domain()
285 "failed to set domain '%s', val=%d\n", in rockchip_do_pmu_set_power_domain()
286 genpd->name, is_on); in rockchip_do_pmu_set_power_domain()
293 struct rockchip_pmu *pmu = pd->pmu; in rockchip_pd_power()
296 mutex_lock(&pmu->mutex); in rockchip_pd_power()
299 ret = clk_bulk_enable(pd->num_clks, pd->clks); in rockchip_pd_power()
301 dev_err(pmu->dev, "failed to enable clocks\n"); in rockchip_pd_power()
302 mutex_unlock(&pmu->mutex); in rockchip_pd_power()
309 /* if powering down, idle request to NIU first */ in rockchip_pd_power()
316 /* if powering up, leave idle mode */ in rockchip_pd_power()
322 clk_bulk_disable(pd->num_clks, pd->clks); in rockchip_pd_power()
325 mutex_unlock(&pmu->mutex); in rockchip_pd_power()
329 static int rockchip_pd_power_on(struct generic_pm_domain *domain) in rockchip_pd_power_on() argument
331 struct rockchip_pm_domain *pd = to_rockchip_pd(domain); in rockchip_pd_power_on()
336 static int rockchip_pd_power_off(struct generic_pm_domain *domain) in rockchip_pd_power_off() argument
338 struct rockchip_pm_domain *pd = to_rockchip_pd(domain); in rockchip_pd_power_off()
350 dev_dbg(dev, "attaching to power domain '%s'\n", genpd->name); in rockchip_pd_attach_dev()
359 while ((clk = of_clk_get(dev->of_node, i++)) && !IS_ERR(clk)) { in rockchip_pd_attach_dev()
376 dev_dbg(dev, "detaching from power domain '%s'\n", genpd->name); in rockchip_pd_detach_dev()
393 dev_err(pmu->dev, in rockchip_pm_add_one_domain()
394 "%pOFn: failed to retrieve domain id (reg): %d\n", in rockchip_pm_add_one_domain()
396 return -EINVAL; in rockchip_pm_add_one_domain()
399 if (id >= pmu->info->num_domains) { in rockchip_pm_add_one_domain()
400 dev_err(pmu->dev, "%pOFn: invalid domain id %d\n", in rockchip_pm_add_one_domain()
402 return -EINVAL; in rockchip_pm_add_one_domain()
405 pd_info = &pmu->info->domain_info[id]; in rockchip_pm_add_one_domain()
407 dev_err(pmu->dev, "%pOFn: undefined domain id %d\n", in rockchip_pm_add_one_domain()
409 return -EINVAL; in rockchip_pm_add_one_domain()
412 pd = devm_kzalloc(pmu->dev, sizeof(*pd), GFP_KERNEL); in rockchip_pm_add_one_domain()
414 return -ENOMEM; in rockchip_pm_add_one_domain()
416 pd->info = pd_info; in rockchip_pm_add_one_domain()
417 pd->pmu = pmu; in rockchip_pm_add_one_domain()
419 pd->num_clks = of_clk_get_parent_count(node); in rockchip_pm_add_one_domain()
420 if (pd->num_clks > 0) { in rockchip_pm_add_one_domain()
421 pd->clks = devm_kcalloc(pmu->dev, pd->num_clks, in rockchip_pm_add_one_domain()
422 sizeof(*pd->clks), GFP_KERNEL); in rockchip_pm_add_one_domain()
423 if (!pd->clks) in rockchip_pm_add_one_domain()
424 return -ENOMEM; in rockchip_pm_add_one_domain()
426 dev_dbg(pmu->dev, "%pOFn: doesn't have clocks: %d\n", in rockchip_pm_add_one_domain()
427 node, pd->num_clks); in rockchip_pm_add_one_domain()
428 pd->num_clks = 0; in rockchip_pm_add_one_domain()
431 for (i = 0; i < pd->num_clks; i++) { in rockchip_pm_add_one_domain()
432 pd->clks[i].clk = of_clk_get(node, i); in rockchip_pm_add_one_domain()
433 if (IS_ERR(pd->clks[i].clk)) { in rockchip_pm_add_one_domain()
434 error = PTR_ERR(pd->clks[i].clk); in rockchip_pm_add_one_domain()
435 dev_err(pmu->dev, in rockchip_pm_add_one_domain()
442 error = clk_bulk_prepare(pd->num_clks, pd->clks); in rockchip_pm_add_one_domain()
446 pd->num_qos = of_count_phandle_with_args(node, "pm_qos", in rockchip_pm_add_one_domain()
449 if (pd->num_qos > 0) { in rockchip_pm_add_one_domain()
450 pd->qos_regmap = devm_kcalloc(pmu->dev, pd->num_qos, in rockchip_pm_add_one_domain()
451 sizeof(*pd->qos_regmap), in rockchip_pm_add_one_domain()
453 if (!pd->qos_regmap) { in rockchip_pm_add_one_domain()
454 error = -ENOMEM; in rockchip_pm_add_one_domain()
459 pd->qos_save_regs[j] = devm_kcalloc(pmu->dev, in rockchip_pm_add_one_domain()
460 pd->num_qos, in rockchip_pm_add_one_domain()
463 if (!pd->qos_save_regs[j]) { in rockchip_pm_add_one_domain()
464 error = -ENOMEM; in rockchip_pm_add_one_domain()
469 for (j = 0; j < pd->num_qos; j++) { in rockchip_pm_add_one_domain()
472 error = -ENODEV; in rockchip_pm_add_one_domain()
475 pd->qos_regmap[j] = syscon_node_to_regmap(qos_node); in rockchip_pm_add_one_domain()
476 if (IS_ERR(pd->qos_regmap[j])) { in rockchip_pm_add_one_domain()
477 error = -ENODEV; in rockchip_pm_add_one_domain()
487 dev_err(pmu->dev, in rockchip_pm_add_one_domain()
488 "failed to power on domain '%pOFn': %d\n", in rockchip_pm_add_one_domain()
493 pd->genpd.name = node->name; in rockchip_pm_add_one_domain()
494 pd->genpd.power_off = rockchip_pd_power_off; in rockchip_pm_add_one_domain()
495 pd->genpd.power_on = rockchip_pd_power_on; in rockchip_pm_add_one_domain()
496 pd->genpd.attach_dev = rockchip_pd_attach_dev; in rockchip_pm_add_one_domain()
497 pd->genpd.detach_dev = rockchip_pd_detach_dev; in rockchip_pm_add_one_domain()
498 pd->genpd.flags = GENPD_FLAG_PM_CLK; in rockchip_pm_add_one_domain()
499 if (pd_info->active_wakeup) in rockchip_pm_add_one_domain()
500 pd->genpd.flags |= GENPD_FLAG_ACTIVE_WAKEUP; in rockchip_pm_add_one_domain()
501 pm_genpd_init(&pd->genpd, NULL, false); in rockchip_pm_add_one_domain()
503 pmu->genpd_data.domains[id] = &pd->genpd; in rockchip_pm_add_one_domain()
507 clk_bulk_unprepare(pd->num_clks, pd->clks); in rockchip_pm_add_one_domain()
509 clk_bulk_put(pd->num_clks, pd->clks); in rockchip_pm_add_one_domain()
521 ret = pm_genpd_remove(&pd->genpd); in rockchip_pm_remove_one_domain()
523 dev_err(pd->pmu->dev, "failed to remove domain '%s' : %d - state may be inconsistent\n", in rockchip_pm_remove_one_domain()
524 pd->genpd.name, ret); in rockchip_pm_remove_one_domain()
526 clk_bulk_unprepare(pd->num_clks, pd->clks); in rockchip_pm_remove_one_domain()
527 clk_bulk_put(pd->num_clks, pd->clks); in rockchip_pm_remove_one_domain()
529 /* protect the zeroing of pm->num_clks */ in rockchip_pm_remove_one_domain()
530 mutex_lock(&pd->pmu->mutex); in rockchip_pm_remove_one_domain()
531 pd->num_clks = 0; in rockchip_pm_remove_one_domain()
532 mutex_unlock(&pd->pmu->mutex); in rockchip_pm_remove_one_domain()
543 for (i = 0; i < pmu->genpd_data.num_domains; i++) { in rockchip_pm_domain_cleanup()
544 genpd = pmu->genpd_data.domains[i]; in rockchip_pm_domain_cleanup()
558 /* First configure domain power down transition count ... */ in rockchip_configure_pd_cnt()
559 regmap_write(pmu->regmap, domain_reg_offset, count); in rockchip_configure_pd_cnt()
561 regmap_write(pmu->regmap, domain_reg_offset + 4, count); in rockchip_configure_pd_cnt()
576 dev_err(pmu->dev, in rockchip_pm_add_subdomain()
577 "%pOFn: failed to retrieve domain id (reg): %d\n", in rockchip_pm_add_subdomain()
581 parent_domain = pmu->genpd_data.domains[idx]; in rockchip_pm_add_subdomain()
585 dev_err(pmu->dev, "failed to handle node %pOFn: %d\n", in rockchip_pm_add_subdomain()
592 dev_err(pmu->dev, in rockchip_pm_add_subdomain()
593 "%pOFn: failed to retrieve domain id (reg): %d\n", in rockchip_pm_add_subdomain()
597 child_domain = pmu->genpd_data.domains[idx]; in rockchip_pm_add_subdomain()
601 dev_err(pmu->dev, "%s failed to add subdomain %s: %d\n", in rockchip_pm_add_subdomain()
602 parent_domain->name, child_domain->name, error); in rockchip_pm_add_subdomain()
605 dev_dbg(pmu->dev, "%s add subdomain: %s\n", in rockchip_pm_add_subdomain()
606 parent_domain->name, child_domain->name); in rockchip_pm_add_subdomain()
621 struct device *dev = &pdev->dev; in rockchip_pm_domain_probe()
622 struct device_node *np = dev->of_node; in rockchip_pm_domain_probe()
632 return -ENODEV; in rockchip_pm_domain_probe()
635 match = of_match_device(dev->driver->of_match_table, dev); in rockchip_pm_domain_probe()
636 if (!match || !match->data) { in rockchip_pm_domain_probe()
638 return -EINVAL; in rockchip_pm_domain_probe()
641 pmu_info = match->data; in rockchip_pm_domain_probe()
644 struct_size(pmu, domains, pmu_info->num_domains), in rockchip_pm_domain_probe()
647 return -ENOMEM; in rockchip_pm_domain_probe()
649 pmu->dev = &pdev->dev; in rockchip_pm_domain_probe()
650 mutex_init(&pmu->mutex); in rockchip_pm_domain_probe()
652 pmu->info = pmu_info; in rockchip_pm_domain_probe()
654 pmu->genpd_data.domains = pmu->domains; in rockchip_pm_domain_probe()
655 pmu->genpd_data.num_domains = pmu_info->num_domains; in rockchip_pm_domain_probe()
657 parent = dev->parent; in rockchip_pm_domain_probe()
660 return -ENODEV; in rockchip_pm_domain_probe()
663 pmu->regmap = syscon_node_to_regmap(parent->of_node); in rockchip_pm_domain_probe()
664 if (IS_ERR(pmu->regmap)) { in rockchip_pm_domain_probe()
666 return PTR_ERR(pmu->regmap); in rockchip_pm_domain_probe()
673 if (pmu_info->core_power_transition_time) in rockchip_pm_domain_probe()
674 rockchip_configure_pd_cnt(pmu, pmu_info->core_pwrcnt_offset, in rockchip_pm_domain_probe()
675 pmu_info->core_power_transition_time); in rockchip_pm_domain_probe()
676 if (pmu_info->gpu_pwrcnt_offset) in rockchip_pm_domain_probe()
677 rockchip_configure_pd_cnt(pmu, pmu_info->gpu_pwrcnt_offset, in rockchip_pm_domain_probe()
678 pmu_info->gpu_power_transition_time); in rockchip_pm_domain_probe()
680 error = -ENODEV; in rockchip_pm_domain_probe()
705 error = of_genpd_add_provider_onecell(np, &pmu->genpd_data); in rockchip_pm_domain_probe()
740 [RK3066_PD_GPU] = DOMAIN(BIT(9), BIT(9), BIT(3), BIT(24), BIT(29), false),
741 [RK3066_PD_VIDEO] = DOMAIN(BIT(8), BIT(8), BIT(4), BIT(23), BIT(28), false),
742 [RK3066_PD_VIO] = DOMAIN(BIT(7), BIT(7), BIT(5), BIT(22), BIT(27), false),
743 [RK3066_PD_PERI] = DOMAIN(BIT(6), BIT(6), BIT(2), BIT(25), BIT(30), false),
744 [RK3066_PD_CPU] = DOMAIN(0, BIT(5), BIT(1), BIT(26), BIT(31), false),
756 [RK3188_PD_GPU] = DOMAIN(BIT(9), BIT(9), BIT(3), BIT(24), BIT(29), false),
757 [RK3188_PD_VIDEO] = DOMAIN(BIT(8), BIT(8), BIT(4), BIT(23), BIT(28), false),
758 [RK3188_PD_VIO] = DOMAIN(BIT(7), BIT(7), BIT(5), BIT(22), BIT(27), false),
759 [RK3188_PD_PERI] = DOMAIN(BIT(6), BIT(6), BIT(2), BIT(25), BIT(30), false),
760 [RK3188_PD_CPU] = DOMAIN(BIT(5), BIT(5), BIT(1), BIT(26), BIT(31), false),
981 .compatible = "rockchip,px30-power-controller",
985 .compatible = "rockchip,rk3036-power-controller",
989 .compatible = "rockchip,rk3066-power-controller",
993 .compatible = "rockchip,rk3128-power-controller",
997 .compatible = "rockchip,rk3188-power-controller",
1001 .compatible = "rockchip,rk3228-power-controller",
1005 .compatible = "rockchip,rk3288-power-controller",
1009 .compatible = "rockchip,rk3328-power-controller",
1013 .compatible = "rockchip,rk3366-power-controller",
1017 .compatible = "rockchip,rk3368-power-controller",
1021 .compatible = "rockchip,rk3399-power-controller",
1030 .name = "rockchip-pm-domain",
1033 * We can't forcibly eject devices form power domain,