Lines Matching full:ufs
3 * UFS Host Controller driver for Exynos specific extensions
23 #include "ufs-exynos.h"
99 * UFS Protector registers
110 static void exynos_ufs_auto_ctrl_hcc(struct exynos_ufs *ufs, bool en);
111 static void exynos_ufs_ctrl_clkstop(struct exynos_ufs *ufs, bool en);
113 static inline void exynos_ufs_enable_auto_ctrl_hcc(struct exynos_ufs *ufs) in exynos_ufs_enable_auto_ctrl_hcc() argument
115 exynos_ufs_auto_ctrl_hcc(ufs, true); in exynos_ufs_enable_auto_ctrl_hcc()
118 static inline void exynos_ufs_disable_auto_ctrl_hcc(struct exynos_ufs *ufs) in exynos_ufs_disable_auto_ctrl_hcc() argument
120 exynos_ufs_auto_ctrl_hcc(ufs, false); in exynos_ufs_disable_auto_ctrl_hcc()
124 struct exynos_ufs *ufs, u32 *val) in exynos_ufs_disable_auto_ctrl_hcc_save() argument
126 *val = hci_readl(ufs, HCI_MISC); in exynos_ufs_disable_auto_ctrl_hcc_save()
127 exynos_ufs_auto_ctrl_hcc(ufs, false); in exynos_ufs_disable_auto_ctrl_hcc_save()
131 struct exynos_ufs *ufs, u32 *val) in exynos_ufs_auto_ctrl_hcc_restore() argument
133 hci_writel(ufs, *val, HCI_MISC); in exynos_ufs_auto_ctrl_hcc_restore()
136 static inline void exynos_ufs_gate_clks(struct exynos_ufs *ufs) in exynos_ufs_gate_clks() argument
138 exynos_ufs_ctrl_clkstop(ufs, true); in exynos_ufs_gate_clks()
141 static inline void exynos_ufs_ungate_clks(struct exynos_ufs *ufs) in exynos_ufs_ungate_clks() argument
143 exynos_ufs_ctrl_clkstop(ufs, false); in exynos_ufs_ungate_clks()
146 static int exynos7_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs) in exynos7_ufs_drv_init() argument
151 static int exynos7_ufs_pre_link(struct exynos_ufs *ufs) in exynos7_ufs_pre_link() argument
153 struct ufs_hba *hba = ufs->hba; in exynos7_ufs_pre_link()
154 u32 val = ufs->drv_data->uic_attr->pa_dbg_option_suite; in exynos7_ufs_pre_link()
158 for_each_ufs_tx_lane(ufs, i) in exynos7_ufs_pre_link()
160 for_each_ufs_rx_lane(ufs, i) { in exynos7_ufs_pre_link()
166 for_each_ufs_tx_lane(ufs, i) in exynos7_ufs_pre_link()
181 static int exynos7_ufs_post_link(struct exynos_ufs *ufs) in exynos7_ufs_post_link() argument
183 struct ufs_hba *hba = ufs->hba; in exynos7_ufs_post_link()
187 for_each_ufs_tx_lane(ufs, i) { in exynos7_ufs_post_link()
191 TX_LINERESET_N(exynos_ufs_calc_time_cntr(ufs, 200000))); in exynos7_ufs_post_link()
202 static int exynos7_ufs_pre_pwr_change(struct exynos_ufs *ufs, in exynos7_ufs_pre_pwr_change() argument
205 unipro_writel(ufs, 0x22, UNIPRO_DBG_FORCE_DME_CTRL_STATE); in exynos7_ufs_pre_pwr_change()
210 static int exynos7_ufs_post_pwr_change(struct exynos_ufs *ufs, in exynos7_ufs_post_pwr_change() argument
213 struct ufs_hba *hba = ufs->hba; in exynos7_ufs_post_pwr_change()
231 * - Access to UFS protector's register
233 static void exynos_ufs_auto_ctrl_hcc(struct exynos_ufs *ufs, bool en) in exynos_ufs_auto_ctrl_hcc() argument
235 u32 misc = hci_readl(ufs, HCI_MISC); in exynos_ufs_auto_ctrl_hcc()
238 hci_writel(ufs, misc | HCI_CORECLK_CTRL_EN, HCI_MISC); in exynos_ufs_auto_ctrl_hcc()
240 hci_writel(ufs, misc & ~HCI_CORECLK_CTRL_EN, HCI_MISC); in exynos_ufs_auto_ctrl_hcc()
243 static void exynos_ufs_ctrl_clkstop(struct exynos_ufs *ufs, bool en) in exynos_ufs_ctrl_clkstop() argument
245 u32 ctrl = hci_readl(ufs, HCI_CLKSTOP_CTRL); in exynos_ufs_ctrl_clkstop()
246 u32 misc = hci_readl(ufs, HCI_MISC); in exynos_ufs_ctrl_clkstop()
249 hci_writel(ufs, misc | CLK_CTRL_EN_MASK, HCI_MISC); in exynos_ufs_ctrl_clkstop()
250 hci_writel(ufs, ctrl | CLK_STOP_MASK, HCI_CLKSTOP_CTRL); in exynos_ufs_ctrl_clkstop()
252 hci_writel(ufs, ctrl & ~CLK_STOP_MASK, HCI_CLKSTOP_CTRL); in exynos_ufs_ctrl_clkstop()
253 hci_writel(ufs, misc & ~CLK_CTRL_EN_MASK, HCI_MISC); in exynos_ufs_ctrl_clkstop()
257 static int exynos_ufs_get_clk_info(struct exynos_ufs *ufs) in exynos_ufs_get_clk_info() argument
259 struct ufs_hba *hba = ufs->hba; in exynos_ufs_get_clk_info()
273 ufs->clk_hci_core = clki->clk; in exynos_ufs_get_clk_info()
275 ufs->clk_unipro_main = clki->clk; in exynos_ufs_get_clk_info()
279 if (!ufs->clk_hci_core || !ufs->clk_unipro_main) { in exynos_ufs_get_clk_info()
285 ufs->mclk_rate = clk_get_rate(ufs->clk_unipro_main); in exynos_ufs_get_clk_info()
286 pclk_rate = clk_get_rate(ufs->clk_hci_core); in exynos_ufs_get_clk_info()
287 f_min = ufs->pclk_avail_min; in exynos_ufs_get_clk_info()
288 f_max = ufs->pclk_avail_max; in exynos_ufs_get_clk_info()
290 if (ufs->opts & EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL) { in exynos_ufs_get_clk_info()
306 ufs->pclk_rate = pclk_rate; in exynos_ufs_get_clk_info()
307 ufs->pclk_div = div; in exynos_ufs_get_clk_info()
313 static void exynos_ufs_set_unipro_pclk_div(struct exynos_ufs *ufs) in exynos_ufs_set_unipro_pclk_div() argument
315 if (ufs->opts & EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL) { in exynos_ufs_set_unipro_pclk_div()
318 val = hci_readl(ufs, HCI_UNIPRO_APB_CLK_CTRL); in exynos_ufs_set_unipro_pclk_div()
319 hci_writel(ufs, UNIPRO_APB_CLK(val, ufs->pclk_div), in exynos_ufs_set_unipro_pclk_div()
324 static void exynos_ufs_set_pwm_clk_div(struct exynos_ufs *ufs) in exynos_ufs_set_pwm_clk_div() argument
326 struct ufs_hba *hba = ufs->hba; in exynos_ufs_set_pwm_clk_div()
327 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr; in exynos_ufs_set_pwm_clk_div()
333 static void exynos_ufs_calc_pwm_clk_div(struct exynos_ufs *ufs) in exynos_ufs_calc_pwm_clk_div() argument
335 struct ufs_hba *hba = ufs->hba; in exynos_ufs_calc_pwm_clk_div()
336 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr; in exynos_ufs_calc_pwm_clk_div()
344 clk_period = UNIPRO_PCLK_PERIOD(ufs); in exynos_ufs_calc_pwm_clk_div()
364 long exynos_ufs_calc_time_cntr(struct exynos_ufs *ufs, long period) in exynos_ufs_calc_time_cntr() argument
367 long pclk_rate = ufs->pclk_rate; in exynos_ufs_calc_time_cntr()
370 clk_period = UNIPRO_PCLK_PERIOD(ufs); in exynos_ufs_calc_time_cntr()
376 static void exynos_ufs_specify_phy_time_attr(struct exynos_ufs *ufs) in exynos_ufs_specify_phy_time_attr() argument
378 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr; in exynos_ufs_specify_phy_time_attr()
379 struct ufs_phy_time_cfg *t_cfg = &ufs->t_cfg; in exynos_ufs_specify_phy_time_attr()
382 exynos_ufs_calc_time_cntr(ufs, attr->tx_dif_p_nsec); in exynos_ufs_specify_phy_time_attr()
384 exynos_ufs_calc_time_cntr(ufs, attr->tx_dif_n_nsec); in exynos_ufs_specify_phy_time_attr()
386 exynos_ufs_calc_time_cntr(ufs, attr->tx_high_z_cnt_nsec); in exynos_ufs_specify_phy_time_attr()
388 exynos_ufs_calc_time_cntr(ufs, attr->tx_base_unit_nsec); in exynos_ufs_specify_phy_time_attr()
390 exynos_ufs_calc_time_cntr(ufs, attr->tx_gran_unit_nsec); in exynos_ufs_specify_phy_time_attr()
392 exynos_ufs_calc_time_cntr(ufs, attr->tx_sleep_cnt); in exynos_ufs_specify_phy_time_attr()
395 exynos_ufs_calc_time_cntr(ufs, attr->rx_dif_p_nsec); in exynos_ufs_specify_phy_time_attr()
397 exynos_ufs_calc_time_cntr(ufs, attr->rx_hibern8_wait_nsec); in exynos_ufs_specify_phy_time_attr()
399 exynos_ufs_calc_time_cntr(ufs, attr->rx_base_unit_nsec); in exynos_ufs_specify_phy_time_attr()
401 exynos_ufs_calc_time_cntr(ufs, attr->rx_gran_unit_nsec); in exynos_ufs_specify_phy_time_attr()
403 exynos_ufs_calc_time_cntr(ufs, attr->rx_sleep_cnt); in exynos_ufs_specify_phy_time_attr()
405 exynos_ufs_calc_time_cntr(ufs, attr->rx_stall_cnt); in exynos_ufs_specify_phy_time_attr()
408 static void exynos_ufs_config_phy_time_attr(struct exynos_ufs *ufs) in exynos_ufs_config_phy_time_attr() argument
410 struct ufs_hba *hba = ufs->hba; in exynos_ufs_config_phy_time_attr()
411 struct ufs_phy_time_cfg *t_cfg = &ufs->t_cfg; in exynos_ufs_config_phy_time_attr()
414 exynos_ufs_set_pwm_clk_div(ufs); in exynos_ufs_config_phy_time_attr()
418 for_each_ufs_rx_lane(ufs, i) { in exynos_ufs_config_phy_time_attr()
420 ufs->drv_data->uic_attr->rx_filler_enable); in exynos_ufs_config_phy_time_attr()
437 for_each_ufs_tx_lane(ufs, i) { in exynos_ufs_config_phy_time_attr()
456 ufs->drv_data->uic_attr->tx_min_activatetime); in exynos_ufs_config_phy_time_attr()
462 static void exynos_ufs_config_phy_cap_attr(struct exynos_ufs *ufs) in exynos_ufs_config_phy_cap_attr() argument
464 struct ufs_hba *hba = ufs->hba; in exynos_ufs_config_phy_cap_attr()
465 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr; in exynos_ufs_config_phy_cap_attr()
470 for_each_ufs_rx_lane(ufs, i) { in exynos_ufs_config_phy_cap_attr()
492 for_each_ufs_rx_lane(ufs, i) { in exynos_ufs_config_phy_cap_attr()
507 for_each_ufs_rx_lane(ufs, i) { in exynos_ufs_config_phy_cap_attr()
531 static void exynos_ufs_establish_connt(struct exynos_ufs *ufs) in exynos_ufs_establish_connt() argument
533 struct ufs_hba *hba = ufs->hba; in exynos_ufs_establish_connt()
554 static void exynos_ufs_config_smu(struct exynos_ufs *ufs) in exynos_ufs_config_smu() argument
558 exynos_ufs_disable_auto_ctrl_hcc_save(ufs, &val); in exynos_ufs_config_smu()
561 reg = ufsp_readl(ufs, UFSPRSECURITY); in exynos_ufs_config_smu()
562 ufsp_writel(ufs, reg | NSSMU, UFSPRSECURITY); in exynos_ufs_config_smu()
563 ufsp_writel(ufs, 0x0, UFSPSBEGIN0); in exynos_ufs_config_smu()
564 ufsp_writel(ufs, 0xffffffff, UFSPSEND0); in exynos_ufs_config_smu()
565 ufsp_writel(ufs, 0xff, UFSPSLUN0); in exynos_ufs_config_smu()
566 ufsp_writel(ufs, 0xf1, UFSPSCTRL0); in exynos_ufs_config_smu()
568 exynos_ufs_auto_ctrl_hcc_restore(ufs, &val); in exynos_ufs_config_smu()
571 static void exynos_ufs_config_sync_pattern_mask(struct exynos_ufs *ufs, in exynos_ufs_config_sync_pattern_mask() argument
574 struct ufs_hba *hba = ufs->hba; in exynos_ufs_config_sync_pattern_mask()
593 mask = exynos_ufs_calc_time_cntr(ufs, sync_len); in exynos_ufs_config_sync_pattern_mask()
598 for_each_ufs_rx_lane(ufs, i) in exynos_ufs_config_sync_pattern_mask()
609 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_pre_pwr_mode() local
610 struct phy *generic_phy = ufs->phy; in exynos_ufs_pre_pwr_mode()
642 if (ufs->drv_data->pre_pwr_change) in exynos_ufs_pre_pwr_mode()
643 ufs->drv_data->pre_pwr_change(ufs, dev_req_params); in exynos_ufs_pre_pwr_mode()
646 exynos_ufs_config_sync_pattern_mask(ufs, dev_req_params); in exynos_ufs_pre_pwr_mode()
666 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_post_pwr_mode() local
667 struct phy *generic_phy = ufs->phy; in exynos_ufs_post_pwr_mode()
679 if (ufs->drv_data->post_pwr_change) in exynos_ufs_post_pwr_mode()
680 ufs->drv_data->post_pwr_change(ufs, pwr_req); in exynos_ufs_post_pwr_mode()
706 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_specify_nexus_t_xfer_req() local
709 type = hci_readl(ufs, HCI_UTRL_NEXUS_TYPE); in exynos_ufs_specify_nexus_t_xfer_req()
712 hci_writel(ufs, type | (1 << tag), HCI_UTRL_NEXUS_TYPE); in exynos_ufs_specify_nexus_t_xfer_req()
714 hci_writel(ufs, type & ~(1 << tag), HCI_UTRL_NEXUS_TYPE); in exynos_ufs_specify_nexus_t_xfer_req()
720 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_specify_nexus_t_tm_req() local
723 type = hci_readl(ufs, HCI_UTMRL_NEXUS_TYPE); in exynos_ufs_specify_nexus_t_tm_req()
728 hci_writel(ufs, type | (1 << tag), HCI_UTMRL_NEXUS_TYPE); in exynos_ufs_specify_nexus_t_tm_req()
734 hci_writel(ufs, type & ~(1 << tag), HCI_UTMRL_NEXUS_TYPE); in exynos_ufs_specify_nexus_t_tm_req()
739 static int exynos_ufs_phy_init(struct exynos_ufs *ufs) in exynos_ufs_phy_init() argument
741 struct ufs_hba *hba = ufs->hba; in exynos_ufs_phy_init()
742 struct phy *generic_phy = ufs->phy; in exynos_ufs_phy_init()
745 if (ufs->avail_ln_rx == 0 || ufs->avail_ln_tx == 0) { in exynos_ufs_phy_init()
747 &ufs->avail_ln_rx); in exynos_ufs_phy_init()
749 &ufs->avail_ln_tx); in exynos_ufs_phy_init()
750 WARN(ufs->avail_ln_rx != ufs->avail_ln_tx, in exynos_ufs_phy_init()
752 ufs->avail_ln_rx, ufs->avail_ln_tx); in exynos_ufs_phy_init()
755 phy_set_bus_width(generic_phy, ufs->avail_ln_rx); in exynos_ufs_phy_init()
771 static void exynos_ufs_config_unipro(struct exynos_ufs *ufs) in exynos_ufs_config_unipro() argument
773 struct ufs_hba *hba = ufs->hba; in exynos_ufs_config_unipro()
776 DIV_ROUND_UP(NSEC_PER_SEC, ufs->mclk_rate)); in exynos_ufs_config_unipro()
778 ufs->drv_data->uic_attr->tx_trailingclks); in exynos_ufs_config_unipro()
780 ufs->drv_data->uic_attr->pa_dbg_option_suite); in exynos_ufs_config_unipro()
783 static void exynos_ufs_config_intr(struct exynos_ufs *ufs, u32 errs, u8 index) in exynos_ufs_config_intr() argument
787 hci_writel(ufs, DFES_ERR_EN | errs, HCI_ERR_EN_PA_LAYER); in exynos_ufs_config_intr()
790 hci_writel(ufs, DFES_ERR_EN | errs, HCI_ERR_EN_DL_LAYER); in exynos_ufs_config_intr()
793 hci_writel(ufs, DFES_ERR_EN | errs, HCI_ERR_EN_N_LAYER); in exynos_ufs_config_intr()
796 hci_writel(ufs, DFES_ERR_EN | errs, HCI_ERR_EN_T_LAYER); in exynos_ufs_config_intr()
799 hci_writel(ufs, DFES_ERR_EN | errs, HCI_ERR_EN_DME_LAYER); in exynos_ufs_config_intr()
806 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_pre_link() local
809 exynos_ufs_config_intr(ufs, DFES_DEF_L2_ERRS, UNIPRO_L2); in exynos_ufs_pre_link()
810 exynos_ufs_config_intr(ufs, DFES_DEF_L3_ERRS, UNIPRO_L3); in exynos_ufs_pre_link()
811 exynos_ufs_config_intr(ufs, DFES_DEF_L4_ERRS, UNIPRO_L4); in exynos_ufs_pre_link()
812 exynos_ufs_set_unipro_pclk_div(ufs); in exynos_ufs_pre_link()
815 exynos_ufs_config_unipro(ufs); in exynos_ufs_pre_link()
818 exynos_ufs_phy_init(ufs); in exynos_ufs_pre_link()
819 exynos_ufs_config_phy_time_attr(ufs); in exynos_ufs_pre_link()
820 exynos_ufs_config_phy_cap_attr(ufs); in exynos_ufs_pre_link()
822 if (ufs->drv_data->pre_link) in exynos_ufs_pre_link()
823 ufs->drv_data->pre_link(ufs); in exynos_ufs_pre_link()
828 static void exynos_ufs_fit_aggr_timeout(struct exynos_ufs *ufs) in exynos_ufs_fit_aggr_timeout() argument
832 val = exynos_ufs_calc_time_cntr(ufs, IATOVAL_NSEC / CNTR_DIV_VAL); in exynos_ufs_fit_aggr_timeout()
833 hci_writel(ufs, val & CNT_VAL_1US_MASK, HCI_1US_TO_CNT_VAL); in exynos_ufs_fit_aggr_timeout()
838 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_post_link() local
839 struct phy *generic_phy = ufs->phy; in exynos_ufs_post_link()
840 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr; in exynos_ufs_post_link()
842 exynos_ufs_establish_connt(ufs); in exynos_ufs_post_link()
843 exynos_ufs_fit_aggr_timeout(ufs); in exynos_ufs_post_link()
845 hci_writel(ufs, 0xa, HCI_DATA_REORDER); in exynos_ufs_post_link()
846 hci_writel(ufs, PRDT_SET_SIZE(12), HCI_TXPRDT_ENTRY_SIZE); in exynos_ufs_post_link()
847 hci_writel(ufs, PRDT_SET_SIZE(12), HCI_RXPRDT_ENTRY_SIZE); in exynos_ufs_post_link()
848 hci_writel(ufs, (1 << hba->nutrs) - 1, HCI_UTRL_NEXUS_TYPE); in exynos_ufs_post_link()
849 hci_writel(ufs, (1 << hba->nutmrs) - 1, HCI_UTMRL_NEXUS_TYPE); in exynos_ufs_post_link()
850 hci_writel(ufs, 0xf, HCI_AXIDMA_RWDATA_BURST_LEN); in exynos_ufs_post_link()
852 if (ufs->opts & EXYNOS_UFS_OPT_SKIP_CONNECTION_ESTAB) in exynos_ufs_post_link()
866 !(ufs->opts & EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER)) in exynos_ufs_post_link()
871 if (ufs->opts & EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER) { in exynos_ufs_post_link()
895 if (ufs->drv_data->post_link) in exynos_ufs_post_link()
896 ufs->drv_data->post_link(ufs); in exynos_ufs_post_link()
901 static int exynos_ufs_parse_dt(struct device *dev, struct exynos_ufs *ufs) in exynos_ufs_parse_dt() argument
910 ufs->drv_data = drv_data; in exynos_ufs_parse_dt()
916 if (ufs->drv_data && ufs->drv_data->uic_attr) { in exynos_ufs_parse_dt()
917 attr = ufs->drv_data->uic_attr; in exynos_ufs_parse_dt()
924 ufs->pclk_avail_min = PCLK_AVAIL_MIN; in exynos_ufs_parse_dt()
925 ufs->pclk_avail_max = PCLK_AVAIL_MAX; in exynos_ufs_parse_dt()
942 struct exynos_ufs *ufs; in exynos_ufs_init() local
945 ufs = devm_kzalloc(dev, sizeof(*ufs), GFP_KERNEL); in exynos_ufs_init()
946 if (!ufs) in exynos_ufs_init()
950 ufs->reg_hci = devm_platform_ioremap_resource_byname(pdev, "vs_hci"); in exynos_ufs_init()
951 if (IS_ERR(ufs->reg_hci)) { in exynos_ufs_init()
953 return PTR_ERR(ufs->reg_hci); in exynos_ufs_init()
957 ufs->reg_unipro = devm_platform_ioremap_resource_byname(pdev, "unipro"); in exynos_ufs_init()
958 if (IS_ERR(ufs->reg_unipro)) { in exynos_ufs_init()
960 return PTR_ERR(ufs->reg_unipro); in exynos_ufs_init()
963 /* ufs protector */ in exynos_ufs_init()
964 ufs->reg_ufsp = devm_platform_ioremap_resource_byname(pdev, "ufsp"); in exynos_ufs_init()
965 if (IS_ERR(ufs->reg_ufsp)) { in exynos_ufs_init()
966 dev_err(dev, "cannot ioremap for ufs protector register\n"); in exynos_ufs_init()
967 return PTR_ERR(ufs->reg_ufsp); in exynos_ufs_init()
970 ret = exynos_ufs_parse_dt(dev, ufs); in exynos_ufs_init()
976 ufs->phy = devm_phy_get(dev, "ufs-phy"); in exynos_ufs_init()
977 if (IS_ERR(ufs->phy)) { in exynos_ufs_init()
978 ret = PTR_ERR(ufs->phy); in exynos_ufs_init()
979 dev_err(dev, "failed to get ufs-phy\n"); in exynos_ufs_init()
983 ret = phy_power_on(ufs->phy); in exynos_ufs_init()
987 ufs->hba = hba; in exynos_ufs_init()
988 ufs->opts = ufs->drv_data->opts; in exynos_ufs_init()
989 ufs->rx_sel_idx = PA_MAXDATALANES; in exynos_ufs_init()
990 if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX) in exynos_ufs_init()
991 ufs->rx_sel_idx = 0; in exynos_ufs_init()
992 hba->priv = (void *)ufs; in exynos_ufs_init()
993 hba->quirks = ufs->drv_data->quirks; in exynos_ufs_init()
994 if (ufs->drv_data->drv_init) { in exynos_ufs_init()
995 ret = ufs->drv_data->drv_init(dev, ufs); in exynos_ufs_init()
1002 ret = exynos_ufs_get_clk_info(ufs); in exynos_ufs_init()
1005 exynos_ufs_specify_phy_time_attr(ufs); in exynos_ufs_init()
1006 exynos_ufs_config_smu(ufs); in exynos_ufs_init()
1010 phy_power_off(ufs->phy); in exynos_ufs_init()
1018 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_host_reset() local
1023 exynos_ufs_disable_auto_ctrl_hcc_save(ufs, &val); in exynos_ufs_host_reset()
1025 hci_writel(ufs, UFS_SW_RST_MASK, HCI_SW_RST); in exynos_ufs_host_reset()
1028 if (!(hci_readl(ufs, HCI_SW_RST) & UFS_SW_RST_MASK)) in exynos_ufs_host_reset()
1036 exynos_ufs_auto_ctrl_hcc_restore(ufs, &val); in exynos_ufs_host_reset()
1042 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_dev_hw_reset() local
1044 hci_writel(ufs, 0 << 0, HCI_GPIO_OUT); in exynos_ufs_dev_hw_reset()
1046 hci_writel(ufs, 1 << 0, HCI_GPIO_OUT); in exynos_ufs_dev_hw_reset()
1051 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_pre_hibern8() local
1052 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr; in exynos_ufs_pre_hibern8()
1055 if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL) in exynos_ufs_pre_hibern8()
1056 exynos_ufs_disable_auto_ctrl_hcc(ufs); in exynos_ufs_pre_hibern8()
1057 exynos_ufs_ungate_clks(ufs); in exynos_ufs_pre_hibern8()
1059 if (ufs->opts & EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER) { in exynos_ufs_pre_hibern8()
1070 ufs->entry_hibern8_t); in exynos_ufs_pre_hibern8()
1084 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_post_hibern8() local
1090 if (ufshcd_is_hs_mode(&ufs->dev_req_params)) in exynos_ufs_post_hibern8()
1103 if (!(ufs->opts & EXYNOS_UFS_OPT_SKIP_CONNECTION_ESTAB)) in exynos_ufs_post_hibern8()
1104 exynos_ufs_establish_connt(ufs); in exynos_ufs_post_hibern8()
1106 ufs->entry_hibern8_t = ktime_get(); in exynos_ufs_post_hibern8()
1107 exynos_ufs_gate_clks(ufs); in exynos_ufs_post_hibern8()
1108 if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL) in exynos_ufs_post_hibern8()
1109 exynos_ufs_enable_auto_ctrl_hcc(ufs); in exynos_ufs_post_hibern8()
1116 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_hce_enable_notify() local
1127 exynos_ufs_calc_pwm_clk_div(ufs); in exynos_ufs_hce_enable_notify()
1128 if (!(ufs->opts & EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL)) in exynos_ufs_hce_enable_notify()
1129 exynos_ufs_enable_auto_ctrl_hcc(ufs); in exynos_ufs_hce_enable_notify()
1189 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_suspend() local
1192 phy_power_off(ufs->phy); in exynos_ufs_suspend()
1199 struct exynos_ufs *ufs = ufshcd_get_variant(hba); in exynos_ufs_resume() local
1202 phy_power_on(ufs->phy); in exynos_ufs_resume()
1204 exynos_ufs_config_smu(ufs); in exynos_ufs_resume()
1245 .compatible = "samsung,exynos7-ufs",
1266 { .compatible = "samsung,exynos7-ufs",
1293 MODULE_DESCRIPTION("Exynos UFS HCI Driver");