Lines Matching +full:pci +full:- +full:host +full:- +full:cam +full:- +full:generic
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
8 #include <linux/io-64-nonatomic-lo-hi.h>
9 #include <linux/pci.h>
14 #define MASK(n) ((1ULL<<(n))-1)
97 qla82xx_crb_addr_transform(CAM); in qla82xx_crb_addr_transform_setup()
355 * In: 'off_in' is offset from CRB space in 128M pci map
356 * Out: 'off_out' is 2M pci map addr
364 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
366 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
367 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
372 win_read = rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
373 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
377 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
379 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
389 return -1; in qla82xx_pci_get_crb_addr_2M()
392 *off_out = (off_in - QLA82XX_PCI_CAMQM) + in qla82xx_pci_get_crb_addr_2M()
393 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
398 return -1; in qla82xx_pci_get_crb_addr_2M()
400 off_in -= QLA82XX_PCI_CRBSPACE; in qla82xx_pci_get_crb_addr_2M()
405 if (m->valid && (m->start_128M <= off_in) && (m->end_128M > off_in)) { in qla82xx_pci_get_crb_addr_2M()
406 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
420 /* acquire semaphore3 from PCI HW block */ in qla82xx_crb_win_lock()
425 return -1; in qla82xx_crb_win_lock()
428 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); in qla82xx_crb_win_lock()
441 BUG_ON(rv == -1); in qla82xx_wr_32()
445 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_wr_32()
456 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_wr_32()
472 BUG_ON(rv == -1); in qla82xx_rd_32()
476 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_rd_32()
486 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_rd_32()
499 /* acquire semaphore5 from PCI HW block */ in qla82xx_idc_lock()
504 return -1; in qla82xx_idc_lock()
535 !addr_in_range(addr + size - 1, QLA82XX_ADDR_DDR_NET, in qla82xx_pci_mem_bound_check()
550 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_window()
556 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
558 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
560 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
574 addr = -1UL; in qla82xx_pci_set_window()
577 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
579 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
581 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
595 ha->qdr_sn_window = window; in qla82xx_pci_set_window()
597 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
599 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
617 addr = -1UL; in qla82xx_pci_set_window()
643 window = ((addr - QLA82XX_ADDR_QDR_NET) >> 22) & 0x3f; in qla82xx_pci_is_same_window()
644 if (ha->qdr_sn_window == window) in qla82xx_pci_is_same_window()
660 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_read_direct()
662 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
669 if ((start == -1UL) || in qla82xx_pci_mem_read_direct()
670 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_read_direct()
671 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
673 "%s out of bound pci memory " in qla82xx_pci_mem_read_direct()
676 return -1; in qla82xx_pci_mem_read_direct()
679 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
680 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_read_direct()
685 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla82xx_pci_mem_read_direct()
691 return -1; in qla82xx_pci_mem_read_direct()
694 addr += start & (PAGE_SIZE - 1); in qla82xx_pci_mem_read_direct()
695 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
711 ret = -1; in qla82xx_pci_mem_read_direct()
714 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
732 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_write_direct()
734 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
741 if ((start == -1UL) || in qla82xx_pci_mem_write_direct()
742 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_write_direct()
743 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
748 return -1; in qla82xx_pci_mem_write_direct()
751 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
752 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_write_direct()
757 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla82xx_pci_mem_write_direct()
762 return -1; in qla82xx_pci_mem_write_direct()
765 addr += start & (PAGE_SIZE - 1); in qla82xx_pci_mem_write_direct()
766 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
782 ret = -1; in qla82xx_pci_mem_write_direct()
785 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
824 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock()
827 /* acquire semaphore2 from PCI HW block */ in qla82xx_rom_lock()
835 __func__, ha->portnum, lock_owner); in qla82xx_rom_lock()
836 return -1; in qla82xx_rom_lock()
840 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); in qla82xx_rom_lock()
856 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_busy()
866 return -1; in qla82xx_wait_rom_busy()
877 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_done()
887 return -1; in qla82xx_wait_rom_done()
898 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
901 rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
905 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
909 ha->nx_pcibase); in qla82xx_md_rw_32()
930 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_fast_read()
942 return -1; in qla82xx_rom_fast_read()
952 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_read_status_reg()
959 return -1; in qla82xx_read_status_reg()
970 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_flash_wait_write_finish()
982 return -1; in qla82xx_flash_wait_write_finish()
995 return -1; in qla82xx_flash_set_write_enable()
997 return -1; in qla82xx_flash_set_write_enable()
999 return -1; in qla82xx_flash_set_write_enable()
1006 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_status_reg()
1009 return -1; in qla82xx_write_status_reg()
1015 return -1; in qla82xx_write_status_reg()
1023 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_disable_flash()
1029 return -1; in qla82xx_write_disable_flash()
1039 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in ql82xx_rom_lock_d()
1050 return -1; in ql82xx_rom_lock_d()
1060 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_flash_dword()
1080 ret = -1; in qla82xx_write_flash_dword()
1102 struct qla_hw_data *ha = vha->hw; in qla82xx_pinit_from_rom()
1157 if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) in qla82xx_pinit_from_rom()
1158 /* don't reset CAM block on reset */ in qla82xx_pinit_from_rom()
1174 return -1; in qla82xx_pinit_from_rom()
1187 return -1; in qla82xx_pinit_from_rom()
1197 return -ENOMEM; in qla82xx_pinit_from_rom()
1204 return -1; in qla82xx_pinit_from_rom()
1213 * address to PCI bus address in qla82xx_pinit_from_rom()
1225 /* do not reset PCI */ in qla82xx_pinit_from_rom()
1307 sz[0] = (size < (8 - off0)) ? size : (8 - off0); in qla82xx_pci_mem_write_2M()
1308 sz[1] = size - sz[0]; in qla82xx_pci_mem_write_2M()
1311 loop = (((off & 0xf) + size - 1) >> 4) + 1; in qla82xx_pci_mem_write_2M()
1319 return -1; in qla82xx_pci_mem_write_2M()
1379 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_write_2M()
1381 ret = -1; in qla82xx_pci_mem_write_2M()
1394 long flashaddr = ha->flt_region_bootload << 2; in qla82xx_fw_load_from_flash()
1399 size = (IMAGE_START - BOOTLD_START) / 8; in qla82xx_fw_load_from_flash()
1404 return -1; in qla82xx_fw_load_from_flash()
1415 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1418 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1446 sz[0] = (size < (16 - off0[0])) ? size : (16 - off0[0]); in qla82xx_pci_mem_read_2M()
1448 loop = ((off0[0] + size - 1) >> shift_amount) + 1; in qla82xx_pci_mem_read_2M()
1450 sz[1] = size - sz[0]; in qla82xx_pci_mem_read_2M()
1470 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_read_2M()
1476 end = (off0[i] + sz[i] - 1) >> 2; in qla82xx_pci_mem_read_2M()
1485 return -1; in qla82xx_pci_mem_read_2M()
1520 uint32_t entries = le32_to_cpu(directory->num_entries); in qla82xx_get_table_desc()
1523 offset = le32_to_cpu(directory->findex) + in qla82xx_get_table_desc()
1524 (i * le32_to_cpu(directory->entry_size)); in qla82xx_get_table_desc()
1538 const u8 *unirom = ha->hablob->fw->data; in qla82xx_get_data_desc()
1539 int idx = get_unaligned_le32((u32 *)&unirom[ha->file_prd_off] + in qla82xx_get_data_desc()
1548 offset = le32_to_cpu(tab_desc->findex) + in qla82xx_get_data_desc()
1549 (le32_to_cpu(tab_desc->entry_size) * idx); in qla82xx_get_data_desc()
1560 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_bootld_offset()
1564 offset = le32_to_cpu(uri_desc->findex); in qla82xx_get_bootld_offset()
1567 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_bootld_offset()
1574 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_size()
1578 return le32_to_cpu(uri_desc->size); in qla82xx_get_fw_size()
1581 return get_unaligned_le32(&ha->hablob->fw->data[FW_SIZE_OFFSET]); in qla82xx_get_fw_size()
1590 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_offs()
1594 offset = le32_to_cpu(uri_desc->findex); in qla82xx_get_fw_offs()
1597 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_fw_offs()
1600 /* PCI related functions */
1624 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { in qla82xx_iospace_config()
1625 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, in qla82xx_iospace_config()
1631 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla82xx_iospace_config()
1632 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, in qla82xx_iospace_config()
1637 len = pci_resource_len(ha->pdev, 0); in qla82xx_iospace_config()
1638 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
1639 if (!ha->nx_pcibase) { in qla82xx_iospace_config()
1640 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, in qla82xx_iospace_config()
1647 ha->iobase = ha->nx_pcibase; in qla82xx_iospace_config()
1649 ha->iobase = ha->nx_pcibase + 0xbc000 + (ha->pdev->devfn << 11); in qla82xx_iospace_config()
1653 ha->nxdb_wr_ptr = ioremap((pci_resource_start(ha->pdev, 4) + in qla82xx_iospace_config()
1654 (ha->pdev->devfn << 12)), 4); in qla82xx_iospace_config()
1655 if (!ha->nxdb_wr_ptr) { in qla82xx_iospace_config()
1656 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, in qla82xx_iospace_config()
1664 ha->nxdb_rd_ptr = ha->nx_pcibase + (512 * 1024) + in qla82xx_iospace_config()
1665 (ha->pdev->devfn * 8); in qla82xx_iospace_config()
1667 ha->nxdb_wr_ptr = (void __iomem *)(ha->pdev->devfn == 6 ? in qla82xx_iospace_config()
1672 ha->max_req_queues = ha->max_rsp_queues = 1; in qla82xx_iospace_config()
1673 ha->msix_count = ha->max_rsp_queues + 1; in qla82xx_iospace_config()
1674 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, in qla82xx_iospace_config()
1677 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1678 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1679 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, in qla82xx_iospace_config()
1682 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1683 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1687 return -ENOMEM; in qla82xx_iospace_config()
1695 * qla82xx_pci_config() - Setup ISP82xx PCI configuration registers.
1703 struct qla_hw_data *ha = vha->hw; in qla82xx_pci_config()
1706 pci_set_master(ha->pdev); in qla82xx_pci_config()
1707 ret = pci_set_mwi(ha->pdev); in qla82xx_pci_config()
1708 ha->chip_revision = ha->pdev->revision; in qla82xx_pci_config()
1711 ha->chip_revision, ret); in qla82xx_pci_config()
1716 * qla82xx_reset_chip() - Setup ISP82xx PCI configuration registers.
1724 struct qla_hw_data *ha = vha->hw; in qla82xx_reset_chip()
1726 ha->isp_ops->disable_intrs(ha); in qla82xx_reset_chip()
1733 struct qla_hw_data *ha = vha->hw; in qla82xx_config_rings()
1734 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_config_rings()
1736 struct req_que *req = ha->req_q_map[0]; in qla82xx_config_rings()
1737 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla82xx_config_rings()
1740 icb = (struct init_cb_81xx *)ha->init_cb; in qla82xx_config_rings()
1741 icb->request_q_outpointer = cpu_to_le16(0); in qla82xx_config_rings()
1742 icb->response_q_inpointer = cpu_to_le16(0); in qla82xx_config_rings()
1743 icb->request_q_length = cpu_to_le16(req->length); in qla82xx_config_rings()
1744 icb->response_q_length = cpu_to_le16(rsp->length); in qla82xx_config_rings()
1745 put_unaligned_le64(req->dma, &icb->request_q_address); in qla82xx_config_rings()
1746 put_unaligned_le64(rsp->dma, &icb->response_q_address); in qla82xx_config_rings()
1748 wrt_reg_dword(®->req_q_out[0], 0); in qla82xx_config_rings()
1749 wrt_reg_dword(®->rsp_q_in[0], 0); in qla82xx_config_rings()
1750 wrt_reg_dword(®->rsp_q_out[0], 0); in qla82xx_config_rings()
1760 size = (IMAGE_START - BOOTLD_START) / 8; in qla82xx_fw_load_from_blob()
1768 return -EIO; in qla82xx_fw_load_from_blob()
1780 return -EIO; in qla82xx_fw_load_from_blob()
1792 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1795 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1803 const uint8_t *unirom = ha->hablob->fw->data; in qla82xx_set_product_offset()
1807 uint8_t chiprev = ha->chip_revision; in qla82xx_set_product_offset()
1815 return -1; in qla82xx_set_product_offset()
1817 entries = le32_to_cpu(ptab_desc->num_entries); in qla82xx_set_product_offset()
1820 offset = le32_to_cpu(ptab_desc->findex) + in qla82xx_set_product_offset()
1821 (i * le32_to_cpu(ptab_desc->entry_size)); in qla82xx_set_product_offset()
1830 ha->file_prd_off = offset; in qla82xx_set_product_offset()
1834 return -1; in qla82xx_set_product_offset()
1842 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_firmware_blob()
1843 const struct firmware *fw = ha->hablob->fw; in qla82xx_validate_firmware_blob()
1845 ha->fw_type = fw_type; in qla82xx_validate_firmware_blob()
1849 return -EINVAL; in qla82xx_validate_firmware_blob()
1853 val = get_unaligned_le32(&fw->data[QLA82XX_FW_MAGIC_OFFSET]); in qla82xx_validate_firmware_blob()
1855 return -EINVAL; in qla82xx_validate_firmware_blob()
1860 if (fw->size < min_size) in qla82xx_validate_firmware_blob()
1861 return -EINVAL; in qla82xx_validate_firmware_blob()
1870 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_cmdpeg_state()
1873 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1875 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1892 } while (--retries); in qla82xx_check_cmdpeg_state()
1898 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1900 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1909 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_rcvpeg_state()
1912 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1914 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1931 } while (--retries); in qla82xx_check_rcvpeg_state()
1935 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1937 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1946 * qla82xx_mbx_completion() - Process mailbox command completions.
1955 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_completion()
1956 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_mbx_completion()
1958 wptr = ®->mailbox_out[1]; in qla82xx_mbx_completion()
1961 ha->flags.mbox_int = 1; in qla82xx_mbx_completion()
1962 ha->mailbox_out[0] = mb0; in qla82xx_mbx_completion()
1964 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla82xx_mbx_completion()
1965 ha->mailbox_out[cnt] = rd_reg_word(wptr); in qla82xx_mbx_completion()
1969 if (!ha->mcp) in qla82xx_mbx_completion()
1975 * qla82xx_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
1979 * Called by system whenever the host adapter generates an interrupt.
2002 ha = rsp->hw; in qla82xx_intr_handler()
2004 if (!ha->flags.msi_enabled) { in qla82xx_intr_handler()
2006 if (!(status & ha->nx_legacy_intr.int_vec_bit)) in qla82xx_intr_handler()
2015 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); in qla82xx_intr_handler()
2021 reg = &ha->iobase->isp82; in qla82xx_intr_handler()
2023 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2024 vha = pci_get_drvdata(ha->pdev); in qla82xx_intr_handler()
2025 for (iter = 1; iter--; ) { in qla82xx_intr_handler()
2027 if (rd_reg_dword(®->host_int)) { in qla82xx_intr_handler()
2028 stat = rd_reg_dword(®->host_status); in qla82xx_intr_handler()
2040 mb[1] = rd_reg_word(®->mailbox_out[1]); in qla82xx_intr_handler()
2041 mb[2] = rd_reg_word(®->mailbox_out[2]); in qla82xx_intr_handler()
2042 mb[3] = rd_reg_word(®->mailbox_out[3]); in qla82xx_intr_handler()
2055 wrt_reg_dword(®->host_int, 0); in qla82xx_intr_handler()
2059 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2061 if (!ha->flags.msi_enabled) in qla82xx_intr_handler()
2062 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_intr_handler()
2086 ha = rsp->hw; in qla82xx_msix_default()
2088 reg = &ha->iobase->isp82; in qla82xx_msix_default()
2090 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_default()
2091 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_default()
2093 host_int = rd_reg_dword(®->host_int); in qla82xx_msix_default()
2097 stat = rd_reg_dword(®->host_status); in qla82xx_msix_default()
2109 mb[1] = rd_reg_word(®->mailbox_out[1]); in qla82xx_msix_default()
2110 mb[2] = rd_reg_word(®->mailbox_out[2]); in qla82xx_msix_default()
2111 mb[3] = rd_reg_word(®->mailbox_out[3]); in qla82xx_msix_default()
2124 wrt_reg_dword(®->host_int, 0); in qla82xx_msix_default()
2128 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_default()
2150 ha = rsp->hw; in qla82xx_msix_rsp_q()
2151 reg = &ha->iobase->isp82; in qla82xx_msix_rsp_q()
2152 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2153 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_rsp_q()
2154 host_int = rd_reg_dword(®->host_int); in qla82xx_msix_rsp_q()
2158 wrt_reg_dword(®->host_int, 0); in qla82xx_msix_rsp_q()
2160 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2183 ha = rsp->hw; in qla82xx_poll()
2185 reg = &ha->iobase->isp82; in qla82xx_poll()
2186 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_poll()
2187 vha = pci_get_drvdata(ha->pdev); in qla82xx_poll()
2189 host_int = rd_reg_dword(®->host_int); in qla82xx_poll()
2193 stat = rd_reg_dword(®->host_status); in qla82xx_poll()
2204 mb[1] = rd_reg_word(®->mailbox_out[1]); in qla82xx_poll()
2205 mb[2] = rd_reg_word(®->mailbox_out[2]); in qla82xx_poll()
2206 mb[3] = rd_reg_word(®->mailbox_out[3]); in qla82xx_poll()
2218 wrt_reg_dword(®->host_int, 0); in qla82xx_poll()
2221 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_poll()
2227 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_enable_intrs()
2230 spin_lock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2234 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_enable_intrs()
2235 spin_unlock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2236 ha->interrupts_on = 1; in qla82xx_enable_intrs()
2242 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_disable_intrs()
2244 if (ha->interrupts_on) in qla82xx_disable_intrs()
2247 spin_lock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2251 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla82xx_disable_intrs()
2252 spin_unlock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2253 ha->interrupts_on = 0; in qla82xx_disable_intrs()
2261 rwlock_init(&ha->hw_lock); in qla82xx_init_flags()
2262 ha->qdr_sn_window = -1; in qla82xx_init_flags()
2263 ha->ddr_mn_window = -1; in qla82xx_init_flags()
2264 ha->curr_window = 255; in qla82xx_init_flags()
2265 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla82xx_init_flags()
2266 nx_legacy_intr = &legacy_intr[ha->portnum]; in qla82xx_init_flags()
2267 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; in qla82xx_init_flags()
2268 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; in qla82xx_init_flags()
2269 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; in qla82xx_init_flags()
2270 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; in qla82xx_init_flags()
2278 struct qla_hw_data *ha = vha->hw; in qla82xx_set_idc_version()
2281 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { in qla82xx_set_idc_version()
2300 struct qla_hw_data *ha = vha->hw; in qla82xx_set_drv_active()
2310 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_set_drv_active()
2320 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_clear_drv_active()
2330 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset()
2334 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_need_reset()
2343 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_set_rst_ready()
2352 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_set_rst_ready()
2364 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_clear_rst_ready()
2374 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_set_qsnt_ready()
2381 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_qsnt_ready()
2385 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_clear_qsnt_ready()
2394 struct qla_hw_data *ha = vha->hw; in qla82xx_load_fw()
2411 * 2) Firmware via request-firmware interface (.bin file). in qla82xx_load_fw()
2433 blob = ha->hablob = qla2x00_request_firmware(vha); in qla82xx_load_fw()
2460 blob->fw = NULL; in qla82xx_load_fw()
2471 struct qla_hw_data *ha = vha->hw; in qla82xx_start_firmware()
2500 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla82xx_start_firmware()
2501 ha->link_width = (lnk >> 4) & 0x3f; in qla82xx_start_firmware()
2513 struct qla_hw_data *ha = vha->hw; in qla82xx_read_flash_data()
2533 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_unprotect_flash()
2567 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_protect_flash()
2599 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_erase_sector()
2616 ret = -1; in qla82xx_erase_sector()
2632 scsi_block_requests(vha->host); in qla82xx_read_optrom_data()
2634 scsi_unblock_requests(vha->host); in qla82xx_read_optrom_data()
2648 struct qla_hw_data *ha = vha->hw; in qla82xx_write_flash_data()
2650 ret = -1; in qla82xx_write_flash_data()
2652 /* Prepare burst-capable write on supported ISPs. */ in qla82xx_write_flash_data()
2655 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, in qla82xx_write_flash_data()
2665 rest_addr = ha->fdt_block_size - 1; in qla82xx_write_flash_data()
2687 /* Go with burst-write. */ in qla82xx_write_flash_data()
2693 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2697 "Unable to burst-write optrom segment " in qla82xx_write_flash_data()
2699 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2702 "Reverting to slow-write.\n"); in qla82xx_write_flash_data()
2704 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2708 liter += OPTROM_BURST_DWORDS - 1; in qla82xx_write_flash_data()
2709 faddr += OPTROM_BURST_DWORDS - 1; in qla82xx_write_flash_data()
2710 dwptr += OPTROM_BURST_DWORDS - 1; in qla82xx_write_flash_data()
2731 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2743 scsi_block_requests(vha->host); in qla82xx_write_optrom_data()
2745 scsi_unblock_requests(vha->host); in qla82xx_write_optrom_data()
2747 /* Convert return ISP82xx to generic */ in qla82xx_write_optrom_data()
2758 struct qla_hw_data *ha = vha->hw; in qla82xx_start_iocbs()
2759 struct req_que *req = ha->req_q_map[0]; in qla82xx_start_iocbs()
2763 req->ring_index++; in qla82xx_start_iocbs()
2764 if (req->ring_index == req->length) { in qla82xx_start_iocbs()
2765 req->ring_index = 0; in qla82xx_start_iocbs()
2766 req->ring_ptr = req->ring; in qla82xx_start_iocbs()
2768 req->ring_ptr++; in qla82xx_start_iocbs()
2770 dbval = 0x04 | (ha->portnum << 5); in qla82xx_start_iocbs()
2772 dbval = dbval | (req->id << 8) | (req->ring_index << 16); in qla82xx_start_iocbs()
2774 qla82xx_wr_32(ha, (unsigned long)ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2776 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2778 while (rd_reg_dword(ha->nxdb_rd_ptr) != dbval) { in qla82xx_start_iocbs()
2779 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2788 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock_recovery()
2822 struct qla_hw_data *ha = vha->hw; in qla82xx_device_bootstrap()
2829 if (ha->flags.isp82xx_fw_hung) in qla82xx_device_bootstrap()
2882 struct qla_hw_data *ha = vha->hw; in qla82xx_need_qsnt_handler()
2886 if (vha->flags.online) { in qla82xx_need_qsnt_handler()
2954 struct qla_hw_data *ha = vha->hw; in qla82xx_wait_for_state_change()
2970 struct qla_hw_data *ha = vha->hw; in qla8xxx_dev_failed_handler()
2985 vha->device_flags |= DFLG_DEV_FAILED; in qla8xxx_dev_failed_handler()
2988 vha->flags.online = 0; in qla8xxx_dev_failed_handler()
2989 vha->flags.init_done = 0; in qla8xxx_dev_failed_handler()
3009 struct qla_hw_data *ha = vha->hw; in qla82xx_need_reset_handler()
3010 struct req_que *req = ha->req_q_map[0]; in qla82xx_need_reset_handler()
3012 if (vha->flags.online) { in qla82xx_need_reset_handler()
3015 ha->isp_ops->get_flash_version(vha, req->ring); in qla82xx_need_reset_handler()
3016 ha->isp_ops->nvram_config(vha); in qla82xx_need_reset_handler()
3021 if (!ha->flags.nic_core_reset_owner) { in qla82xx_need_reset_handler()
3023 "reset_acknowledged by 0x%x\n", ha->portnum); in qla82xx_need_reset_handler()
3026 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_need_reset_handler()
3033 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla82xx_need_reset_handler()
3056 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset_handler()
3075 "HW State: COLD/RE-INIT.\n"); in qla82xx_need_reset_handler()
3091 struct qla_hw_data *ha = vha->hw; in qla82xx_check_md_needed()
3095 fw_major_version = ha->fw_major_version; in qla82xx_check_md_needed()
3096 fw_minor_version = ha->fw_minor_version; in qla82xx_check_md_needed()
3097 fw_subminor_version = ha->fw_subminor_version; in qla82xx_check_md_needed()
3104 if (!ha->fw_dumped) { in qla82xx_check_md_needed()
3105 if ((fw_major_version != ha->fw_major_version || in qla82xx_check_md_needed()
3106 fw_minor_version != ha->fw_minor_version || in qla82xx_check_md_needed()
3107 fw_subminor_version != ha->fw_subminor_version) || in qla82xx_check_md_needed()
3108 (ha->prev_minidump_failed)) { in qla82xx_check_md_needed()
3110 …"Firmware version differs Previous version: %d:%d:%d - New version: %d:%d:%d, prev_minidump_failed… in qla82xx_check_md_needed()
3113 ha->fw_major_version, in qla82xx_check_md_needed()
3114 ha->fw_minor_version, in qla82xx_check_md_needed()
3115 ha->fw_subminor_version, in qla82xx_check_md_needed()
3116 ha->prev_minidump_failed); in qla82xx_check_md_needed()
3136 fw_heartbeat_counter = qla82xx_rd_32(vha->hw, in qla82xx_check_fw_alive()
3145 if (vha->fw_heartbeat_counter == fw_heartbeat_counter) { in qla82xx_check_fw_alive()
3146 vha->seconds_since_last_heartbeat++; in qla82xx_check_fw_alive()
3148 if (vha->seconds_since_last_heartbeat == 2) { in qla82xx_check_fw_alive()
3149 vha->seconds_since_last_heartbeat = 0; in qla82xx_check_fw_alive()
3153 vha->seconds_since_last_heartbeat = 0; in qla82xx_check_fw_alive()
3154 vha->fw_heartbeat_counter = fw_heartbeat_counter; in qla82xx_check_fw_alive()
3179 struct qla_hw_data *ha = vha->hw; in qla82xx_device_state_handler()
3183 if (!vha->flags.init_done) { in qla82xx_device_state_handler()
3196 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3221 ha->flags.nic_core_reset_owner = 0; in qla82xx_device_state_handler()
3240 (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3245 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3252 if (ha->flags.quiesce_owner) in qla82xx_device_state_handler()
3260 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3283 struct qla_hw_data *ha = vha->hw; in qla82xx_check_temp()
3308 temp = qla82xx_rd_32(vha->hw, CRB_TEMP_STATE); in qla82xx_read_temperature()
3314 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_pending_mbx()
3316 if (ha->flags.mbox_busy) { in qla82xx_clear_pending_mbx()
3317 ha->flags.mbox_int = 1; in qla82xx_clear_pending_mbx()
3318 ha->flags.mbox_busy = 0; in qla82xx_clear_pending_mbx()
3321 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) in qla82xx_clear_pending_mbx()
3322 complete(&ha->mbx_intr_comp); in qla82xx_clear_pending_mbx()
3329 struct qla_hw_data *ha = vha->hw; in qla82xx_watchdog()
3332 if (!ha->flags.nic_core_reset_hdlr_active) { in qla82xx_watchdog()
3335 set_bit(ISP_UNRECOVERABLE, &vha->dpc_flags); in qla82xx_watchdog()
3336 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3339 !test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) { in qla82xx_watchdog()
3342 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); in qla82xx_watchdog()
3344 !test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags)) { in qla82xx_watchdog()
3347 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); in qla82xx_watchdog()
3349 !test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) && in qla82xx_watchdog()
3350 vha->flags.online == 1) { in qla82xx_watchdog()
3353 set_bit(ISP_UNRECOVERABLE, &vha->dpc_flags); in qla82xx_watchdog()
3354 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3388 &vha->dpc_flags); in qla82xx_watchdog()
3393 &vha->dpc_flags); in qla82xx_watchdog()
3395 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3405 int rval = -1; in qla82xx_load_risc()
3406 struct qla_hw_data *ha = vha->hw; in qla82xx_load_risc()
3423 struct qla_hw_data *ha = vha->hw; in qla82xx_set_reset_owner()
3437 ha->flags.nic_core_reset_owner = 1; in qla82xx_set_reset_owner()
3439 "reset_owner is 0x%x\n", ha->portnum); in qla82xx_set_reset_owner()
3463 int rval = -1; in qla82xx_abort_isp()
3464 struct qla_hw_data *ha = vha->hw; in qla82xx_abort_isp()
3466 if (vha->device_flags & DFLG_DEV_FAILED) { in qla82xx_abort_isp()
3471 ha->flags.nic_core_reset_hdlr_active = 1; in qla82xx_abort_isp()
3492 ha->flags.isp82xx_fw_hung = 0; in qla82xx_abort_isp()
3493 ha->flags.nic_core_reset_hdlr_active = 0; in qla82xx_abort_isp()
3498 vha->flags.online = 1; in qla82xx_abort_isp()
3499 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { in qla82xx_abort_isp()
3500 if (ha->isp_abort_cnt == 0) { in qla82xx_abort_isp()
3502 "ISP error recover failed - board " in qla82xx_abort_isp()
3508 ha->isp_ops->reset_adapter(vha); in qla82xx_abort_isp()
3509 vha->flags.online = 0; in qla82xx_abort_isp()
3511 &vha->dpc_flags); in qla82xx_abort_isp()
3514 ha->isp_abort_cnt--; in qla82xx_abort_isp()
3516 "ISP abort - retry remaining %d.\n", in qla82xx_abort_isp()
3517 ha->isp_abort_cnt); in qla82xx_abort_isp()
3521 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; in qla82xx_abort_isp()
3523 "ISP error recovery - retrying (%d) more times.\n", in qla82xx_abort_isp()
3524 ha->isp_abort_cnt); in qla82xx_abort_isp()
3525 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); in qla82xx_abort_isp()
3549 if (vha->flags.online) { in qla82xx_fcoe_ctx_reset()
3583 while ((test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || in qla2x00_wait_for_fcoe_ctx_reset()
3584 test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) in qla2x00_wait_for_fcoe_ctx_reset()
3590 if (!test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) && in qla2x00_wait_for_fcoe_ctx_reset()
3591 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { in qla2x00_wait_for_fcoe_ctx_reset()
3607 struct qla_hw_data *ha = vha->hw; in qla82xx_chip_reset_cleanup()
3613 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3621 ha->flags.isp82xx_fw_hung = 1; in qla82xx_chip_reset_cleanup()
3629 __func__, ha->flags.isp82xx_fw_hung); in qla82xx_chip_reset_cleanup()
3632 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3637 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3638 for (que = 0; que < ha->max_req_queues; que++) { in qla82xx_chip_reset_cleanup()
3639 req = ha->req_q_map[que]; in qla82xx_chip_reset_cleanup()
3642 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) { in qla82xx_chip_reset_cleanup()
3643 sp = req->outstanding_cmds[cnt]; in qla82xx_chip_reset_cleanup()
3645 if ((!sp->u.scmd.crc_ctx || in qla82xx_chip_reset_cleanup()
3646 (sp->flags & in qla82xx_chip_reset_cleanup()
3648 !ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3650 &ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3651 if (ha->isp_ops->abort_command(sp)) { in qla82xx_chip_reset_cleanup()
3660 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3665 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3684 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_control()
3693 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3695 crb_addr = crb_entry->addr; in qla82xx_minidump_process_control()
3697 for (i = 0; i < crb_entry->op_count; i++) { in qla82xx_minidump_process_control()
3698 opcode = crb_entry->crb_ctrl.opcode; in qla82xx_minidump_process_control()
3701 crb_entry->value_1, 1); in qla82xx_minidump_process_control()
3713 read_value &= crb_entry->value_2; in qla82xx_minidump_process_control()
3716 read_value |= crb_entry->value_3; in qla82xx_minidump_process_control()
3724 read_value |= crb_entry->value_3; in qla82xx_minidump_process_control()
3730 poll_time = crb_entry->crb_strd.poll_timeout; in qla82xx_minidump_process_control()
3735 if ((read_value & crb_entry->value_2) in qla82xx_minidump_process_control()
3736 == crb_entry->value_1) in qla82xx_minidump_process_control()
3750 if (crb_entry->crb_strd.state_index_a) { in qla82xx_minidump_process_control()
3751 index = crb_entry->crb_strd.state_index_a; in qla82xx_minidump_process_control()
3752 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3757 index = crb_entry->crb_ctrl.state_index_v; in qla82xx_minidump_process_control()
3758 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
3763 if (crb_entry->crb_strd.state_index_a) { in qla82xx_minidump_process_control()
3764 index = crb_entry->crb_strd.state_index_a; in qla82xx_minidump_process_control()
3765 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3769 if (crb_entry->crb_ctrl.state_index_v) { in qla82xx_minidump_process_control()
3770 index = crb_entry->crb_ctrl.state_index_v; in qla82xx_minidump_process_control()
3772 tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3774 read_value = crb_entry->value_1; in qla82xx_minidump_process_control()
3781 index = crb_entry->crb_ctrl.state_index_v; in qla82xx_minidump_process_control()
3782 read_value = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3783 read_value <<= crb_entry->crb_ctrl.shl; in qla82xx_minidump_process_control()
3784 read_value >>= crb_entry->crb_ctrl.shr; in qla82xx_minidump_process_control()
3785 if (crb_entry->value_2) in qla82xx_minidump_process_control()
3786 read_value &= crb_entry->value_2; in qla82xx_minidump_process_control()
3787 read_value |= crb_entry->value_3; in qla82xx_minidump_process_control()
3788 read_value += crb_entry->value_1; in qla82xx_minidump_process_control()
3789 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
3792 crb_addr += crb_entry->crb_strd.addr_stride; in qla82xx_minidump_process_control()
3801 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdocm()
3807 r_addr = ocm_hdr->read_addr; in qla82xx_minidump_process_rdocm()
3808 r_stride = ocm_hdr->read_addr_stride; in qla82xx_minidump_process_rdocm()
3809 loop_cnt = ocm_hdr->op_count; in qla82xx_minidump_process_rdocm()
3812 r_value = rd_reg_dword(r_addr + ha->nx_pcibase); in qla82xx_minidump_process_rdocm()
3823 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmux()
3829 r_addr = mux_hdr->read_addr; in qla82xx_minidump_process_rdmux()
3830 s_addr = mux_hdr->select_addr; in qla82xx_minidump_process_rdmux()
3831 s_stride = mux_hdr->select_value_stride; in qla82xx_minidump_process_rdmux()
3832 s_value = mux_hdr->select_value; in qla82xx_minidump_process_rdmux()
3833 loop_cnt = mux_hdr->op_count; in qla82xx_minidump_process_rdmux()
3849 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdcrb()
3855 r_addr = crb_hdr->addr; in qla82xx_minidump_process_rdcrb()
3856 r_stride = crb_hdr->crb_strd.addr_stride; in qla82xx_minidump_process_rdcrb()
3857 loop_cnt = crb_hdr->op_count; in qla82xx_minidump_process_rdcrb()
3872 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l2tag()
3882 loop_count = cache_hdr->op_count; in qla82xx_minidump_process_l2tag()
3883 r_addr = cache_hdr->read_addr; in qla82xx_minidump_process_l2tag()
3884 c_addr = cache_hdr->control_addr; in qla82xx_minidump_process_l2tag()
3885 c_value_w = cache_hdr->cache_ctrl.write_value; in qla82xx_minidump_process_l2tag()
3887 t_r_addr = cache_hdr->tag_reg_addr; in qla82xx_minidump_process_l2tag()
3888 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla82xx_minidump_process_l2tag()
3889 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla82xx_minidump_process_l2tag()
3890 p_wait = cache_hdr->cache_ctrl.poll_wait; in qla82xx_minidump_process_l2tag()
3891 p_mask = cache_hdr->cache_ctrl.poll_mask; in qla82xx_minidump_process_l2tag()
3919 addr += cache_hdr->read_ctrl.read_addr_stride; in qla82xx_minidump_process_l2tag()
3921 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla82xx_minidump_process_l2tag()
3931 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l1cache()
3939 loop_count = cache_hdr->op_count; in qla82xx_minidump_process_l1cache()
3940 r_addr = cache_hdr->read_addr; in qla82xx_minidump_process_l1cache()
3941 c_addr = cache_hdr->control_addr; in qla82xx_minidump_process_l1cache()
3942 c_value_w = cache_hdr->cache_ctrl.write_value; in qla82xx_minidump_process_l1cache()
3944 t_r_addr = cache_hdr->tag_reg_addr; in qla82xx_minidump_process_l1cache()
3945 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla82xx_minidump_process_l1cache()
3946 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla82xx_minidump_process_l1cache()
3955 addr += cache_hdr->read_ctrl.read_addr_stride; in qla82xx_minidump_process_l1cache()
3957 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla82xx_minidump_process_l1cache()
3966 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_queue()
3974 s_addr = q_hdr->select_addr; in qla82xx_minidump_process_queue()
3975 r_cnt = q_hdr->rd_strd.read_addr_cnt; in qla82xx_minidump_process_queue()
3976 r_stride = q_hdr->rd_strd.read_addr_stride; in qla82xx_minidump_process_queue()
3977 loop_cnt = q_hdr->op_count; in qla82xx_minidump_process_queue()
3981 r_addr = q_hdr->read_addr; in qla82xx_minidump_process_queue()
3987 qid += q_hdr->q_strd.queue_id_stride; in qla82xx_minidump_process_queue()
3996 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdrom()
4003 r_addr = rom_hdr->read_addr; in qla82xx_minidump_process_rdrom()
4004 loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t); in qla82xx_minidump_process_rdrom()
4022 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmem()
4031 r_addr = m_hdr->read_addr; in qla82xx_minidump_process_rdmem()
4032 loop_cnt = m_hdr->read_data_size/16; in qla82xx_minidump_process_rdmem()
4040 if (m_hdr->read_data_size % 16) { in qla82xx_minidump_process_rdmem()
4043 m_hdr->read_data_size); in qla82xx_minidump_process_rdmem()
4049 __func__, r_addr, m_hdr->read_data_size, loop_cnt); in qla82xx_minidump_process_rdmem()
4051 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4071 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4082 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4090 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_template_chksum()
4092 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; in qla82xx_validate_template_chksum()
4093 int count = ha->md_template_size/sizeof(uint32_t); in qla82xx_validate_template_chksum()
4095 while (count-- > 0) in qla82xx_validate_template_chksum()
4106 entry_hdr->d_ctrl.driver_flags |= QLA82XX_DBG_SKIPPED_FLAG; in qla82xx_mark_entry_skipped()
4109 "ETYPE[0x%x]-ELEVEL[0x%x]\n", in qla82xx_mark_entry_skipped()
4110 index, entry_hdr->entry_type, in qla82xx_mark_entry_skipped()
4111 entry_hdr->d_ctrl.entry_capture_mask); in qla82xx_mark_entry_skipped()
4117 struct qla_hw_data *ha = vha->hw; in qla82xx_md_collect()
4125 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4126 data_ptr = ha->md_dump; in qla82xx_md_collect()
4128 if (ha->fw_dumped) { in qla82xx_md_collect()
4131 "-- ignoring request.\n", ha->fw_dump); in qla82xx_md_collect()
4135 ha->fw_dumped = false; in qla82xx_md_collect()
4137 if (!ha->md_tmplt_hdr || !ha->md_dump) { in qla82xx_md_collect()
4143 if (ha->flags.isp82xx_no_md_cap) { in qla82xx_md_collect()
4147 ha->flags.isp82xx_no_md_cap = 0; in qla82xx_md_collect()
4157 no_entry_hdr = tmplt_hdr->num_of_entries; in qla82xx_md_collect()
4162 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level); in qla82xx_md_collect()
4164 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_collect()
4173 tmplt_hdr->driver_capture_mask = ql2xmdcapmask; in qla82xx_md_collect()
4175 tmplt_hdr->driver_info[0] = vha->host_no; in qla82xx_md_collect()
4176 tmplt_hdr->driver_info[1] = (QLA_DRIVER_MAJOR_VER << 24) | in qla82xx_md_collect()
4180 total_data_size = ha->md_dump_size; in qla82xx_md_collect()
4186 if (tmplt_hdr->entry_type != QLA82XX_TLHDR) { in qla82xx_md_collect()
4189 tmplt_hdr->entry_type); in qla82xx_md_collect()
4194 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4206 if (!(entry_hdr->d_ctrl.entry_capture_mask & in qla82xx_md_collect()
4208 entry_hdr->d_ctrl.driver_flags |= in qla82xx_md_collect()
4212 "ETYPE[0x%x]-ELEVEL[0x%x]\n", in qla82xx_md_collect()
4213 i, entry_hdr->entry_type, in qla82xx_md_collect()
4214 entry_hdr->d_ctrl.entry_capture_mask); in qla82xx_md_collect()
4222 entry_hdr->entry_type, in qla82xx_md_collect()
4223 entry_hdr->d_ctrl.entry_capture_mask); in qla82xx_md_collect()
4227 data_collected, (ha->md_dump_size - data_collected)); in qla82xx_md_collect()
4231 switch (entry_hdr->entry_type) { in qla82xx_md_collect()
4297 data_collected = (uint8_t *)data_ptr - in qla82xx_md_collect()
4298 (uint8_t *)ha->md_dump; in qla82xx_md_collect()
4301 (((uint8_t *)entry_hdr) + entry_hdr->entry_size); in qla82xx_md_collect()
4314 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); in qla82xx_md_collect()
4315 ha->fw_dumped = true; in qla82xx_md_collect()
4325 struct qla_hw_data *ha = vha->hw; in qla82xx_md_alloc()
4329 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4332 ql2xmdcapmask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_alloc()
4340 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()
4343 if (ha->md_dump) { in qla82xx_md_alloc()
4349 ha->md_dump = vmalloc(ha->md_dump_size); in qla82xx_md_alloc()
4350 if (ha->md_dump == NULL) { in qla82xx_md_alloc()
4353 "(0x%x).\n", ha->md_dump_size); in qla82xx_md_alloc()
4362 struct qla_hw_data *ha = vha->hw; in qla82xx_md_free()
4365 if (ha->md_tmplt_hdr) { in qla82xx_md_free()
4368 ha->md_tmplt_hdr, ha->md_template_size / 1024); in qla82xx_md_free()
4369 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, in qla82xx_md_free()
4370 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_free()
4371 ha->md_tmplt_hdr = NULL; in qla82xx_md_free()
4375 if (ha->md_dump) { in qla82xx_md_free()
4378 ha->md_dump, ha->md_dump_size / 1024); in qla82xx_md_free()
4379 vfree(ha->md_dump); in qla82xx_md_free()
4380 ha->md_dump_size = 0; in qla82xx_md_free()
4381 ha->md_dump = NULL; in qla82xx_md_free()
4388 struct qla_hw_data *ha = vha->hw; in qla82xx_md_prep()
4396 ha->md_template_size / 1024); in qla82xx_md_prep()
4413 ha->md_dump_size / 1024); in qla82xx_md_prep()
4417 ha->md_tmplt_hdr, in qla82xx_md_prep()
4418 ha->md_template_size / 1024); in qla82xx_md_prep()
4419 dma_free_coherent(&ha->pdev->dev, in qla82xx_md_prep()
4420 ha->md_template_size, in qla82xx_md_prep()
4421 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_prep()
4422 ha->md_tmplt_hdr = NULL; in qla82xx_md_prep()
4434 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_on()
4444 ha->beacon_blink_led = 1; in qla82xx_beacon_on()
4455 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_off()
4465 ha->beacon_blink_led = 0; in qla82xx_beacon_off()
4474 struct qla_hw_data *ha = vha->hw; in qla82xx_fw_dump()
4476 if (!ha->allow_cna_fw_dump) in qla82xx_fw_dump()
4479 scsi_block_requests(vha->host); in qla82xx_fw_dump()
4480 ha->flags.isp82xx_no_md_cap = 1; in qla82xx_fw_dump()
4485 scsi_unblock_requests(vha->host); in qla82xx_fw_dump()