Lines Matching full:cores

74  * @cores: list of R5 cores within the cluster
79 struct list_head cores; member
254 /* assert local reset on all applicable cores */ in k3_r5_lockstep_reset()
255 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
265 /* disable PSC modules on all applicable cores */ in k3_r5_lockstep_reset()
266 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
279 list_for_each_entry_continue_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
284 core = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_reset()
286 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
299 /* enable PSC modules on all applicable cores */ in k3_r5_lockstep_release()
300 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
311 /* deassert local reset on all applicable cores */ in k3_r5_lockstep_release()
312 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
324 list_for_each_entry_continue(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
328 core = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_release()
330 list_for_each_entry_from(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
352 * The R5F cores have controls for both a reset and a halt/run. The code
355 * applicable cores to allow loading into the TCMs. The .prepare() ops is
357 * by the .start() ops after loading to actually let the R5 cores run.
370 dev_err(dev, "unable to enable cores for TCM loading, ret = %d\n", in k3_r5_rproc_prepare()
392 * resets on all applicable cores for the rproc device (depending on LockStep
394 * cores. The cores themselves are only halted in the .stop() ops, and the
409 dev_err(dev, "unable to disable cores, ret = %d\n", ret); in k3_r5_rproc_unprepare()
421 * unhalt both the cores to start the execution - Core1 needs to be unhalted
473 /* unhalt/run all applicable cores */ in k3_r5_rproc_start()
475 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_rproc_start()
489 list_for_each_entry_continue(core, &cluster->cores, elem) { in k3_r5_rproc_start()
503 * of cores the operations are performed are also in general reverse to that
524 /* halt all applicable cores */ in k3_r5_rproc_stop()
526 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_rproc_stop()
544 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_rproc_stop()
644 * the cores are halted before the .prepare() step.
653 * The function behavior is different based on the cluster mode. The R5F cores
658 * both the cores with the same settings, before reconfiguing again for
672 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_rproc_configure()
720 * cores are programmed symmetrically in LockStep. LockStep in k3_r5_rproc_configure()
723 list_for_each_entry(temp, &cluster->cores, elem) { in k3_r5_rproc_configure()
813 * RAT is programmable only by the R5F cores. Support for RAT in k3_r5_reserved_mem_init()
869 core1 = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_cluster_rproc_init()
870 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_cluster_rproc_init()
956 list_first_entry(&cluster->cores, struct k3_r5_core, elem) : in k3_r5_cluster_rproc_exit()
957 list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_cluster_rproc_exit()
959 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_cluster_rproc_exit()
1021 * The R5F cores can place ATCM & BTCM anywhere in its address in k3_r5_core_of_get_internal_memories()
1264 list_for_each_entry_safe_reverse(core, temp, &cluster->cores, elem) { in k3_r5_cluster_of_exit()
1299 list_add_tail(&core->elem, &cluster->cores); in k3_r5_cluster_of_init()
1323 INIT_LIST_HEAD(&cluster->cores); in k3_r5_probe()
1334 dev_err(dev, "MCU cluster requires both R5F cores to be enabled, num_cores = %d\n", in k3_r5_probe()