1 // SPDX-License-Identifier: GPL-2.0
3  * simple driver for PWM (Pulse Width Modulator) controller
5  * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
19 #include <linux/pwm.h>
22 #define MX1_PWMC			0x00   /* PWM Control Register */
23 #define MX1_PWMS			0x04   /* PWM Sample Register */
24 #define MX1_PWMP			0x08   /* PWM Period Register */
42 	ret = clk_prepare_enable(imx->clk_ipg);  in pwm_imx1_clk_prepare_enable()
46 	ret = clk_prepare_enable(imx->clk_per);  in pwm_imx1_clk_prepare_enable()
48 		clk_disable_unprepare(imx->clk_ipg);  in pwm_imx1_clk_prepare_enable()
59 	clk_disable_unprepare(imx->clk_per);  in pwm_imx1_clk_disable_unprepare()
60 	clk_disable_unprepare(imx->clk_ipg);  in pwm_imx1_clk_disable_unprepare()
64 			   struct pwm_device *pwm, int duty_ns, int period_ns)  in pwm_imx1_config()  argument
70 	 * The PWM subsystem allows for exact frequencies. However,  in pwm_imx1_config()
71 	 * I cannot connect a scope on my device to the PWM line and  in pwm_imx1_config()
72 	 * thus cannot provide the program the PWM controller  in pwm_imx1_config()
74 	 * Bootloader (u-boot or WinCE+haret) has programmed the PWM  in pwm_imx1_config()
75 	 * function group already. So I'll just modify the PWM sample  in pwm_imx1_config()
86 	max = readl(imx->mmio_base + MX1_PWMP);  in pwm_imx1_config()
89 	writel(max - p, imx->mmio_base + MX1_PWMS);  in pwm_imx1_config()
94 static int pwm_imx1_enable(struct pwm_chip *chip, struct pwm_device *pwm)  in pwm_imx1_enable()  argument
104 	value = readl(imx->mmio_base + MX1_PWMC);  in pwm_imx1_enable()
106 	writel(value, imx->mmio_base + MX1_PWMC);  in pwm_imx1_enable()
111 static void pwm_imx1_disable(struct pwm_chip *chip, struct pwm_device *pwm)  in pwm_imx1_disable()  argument
116 	value = readl(imx->mmio_base + MX1_PWMC);  in pwm_imx1_disable()
118 	writel(value, imx->mmio_base + MX1_PWMC);  in pwm_imx1_disable()
131 	{ .compatible = "fsl,imx1-pwm", },
141 	imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);  in pwm_imx1_probe()
143 		return -ENOMEM;  in pwm_imx1_probe()
147 	imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");  in pwm_imx1_probe()
148 	if (IS_ERR(imx->clk_ipg)) {  in pwm_imx1_probe()
149 		dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",  in pwm_imx1_probe()
150 				PTR_ERR(imx->clk_ipg));  in pwm_imx1_probe()
151 		return PTR_ERR(imx->clk_ipg);  in pwm_imx1_probe()
154 	imx->clk_per = devm_clk_get(&pdev->dev, "per");  in pwm_imx1_probe()
155 	if (IS_ERR(imx->clk_per)) {  in pwm_imx1_probe()
156 		int ret = PTR_ERR(imx->clk_per);  in pwm_imx1_probe()
158 		if (ret != -EPROBE_DEFER)  in pwm_imx1_probe()
159 			dev_err(&pdev->dev,  in pwm_imx1_probe()
166 	imx->chip.ops = &pwm_imx1_ops;  in pwm_imx1_probe()
167 	imx->chip.dev = &pdev->dev;  in pwm_imx1_probe()
168 	imx->chip.base = -1;  in pwm_imx1_probe()
169 	imx->chip.npwm = 1;  in pwm_imx1_probe()
172 	imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);  in pwm_imx1_probe()
173 	if (IS_ERR(imx->mmio_base))  in pwm_imx1_probe()
174 		return PTR_ERR(imx->mmio_base);  in pwm_imx1_probe()
176 	return pwmchip_add(&imx->chip);  in pwm_imx1_probe()
183 	pwm_imx1_clk_disable_unprepare(&imx->chip);  in pwm_imx1_remove()
185 	return pwmchip_remove(&imx->chip);  in pwm_imx1_remove()
190 		.name = "pwm-imx1",