18  * - Instead of sleeping to wait for a completed period, the interrupt
66 	u8 period;  member
131 	unsigned long long cycles = state->period;  in atmel_pwm_calculate_cprd_and_pres()
134 	/* Calculate the period cycles and prescale value */  in atmel_pwm_calculate_cprd_and_pres()
139 	 * The register for the period length is cfg.period_bits bits wide.  in atmel_pwm_calculate_cprd_and_pres()
166 	do_div(cycles, state->period);  in atmel_pwm_calculate_cdty()
196 			    atmel_pwm->data->regs.period, cprd);  in atmel_pwm_set_cprd_cdty()
206 	 * Wait for at least a complete period to have passed before disabling a  in atmel_pwm_disable()
249 		    cstate.period == state->period) {  in atmel_pwm_apply()
251 						  atmel_pwm->data->regs.period);  in atmel_pwm_apply()
315 					  atmel_pwm->data->regs.period);  in atmel_pwm_get_state()
318 		state->period = DIV64_U64_ROUND_UP(tmp, rate);  in atmel_pwm_get_state()
345 		.period		= PWMV1_CPRD,
351 		/* 16 bits to keep period and duty. */
358 		.period		= PWMV2_CPRD,
364 		/* 16 bits to keep period and duty. */
371 		.period		= PWMV1_CPRD,
377 		/* 32 bits to keep period and duty. */