Lines Matching full:channel
38 struct idtcm_channel *channel = in set_write_phase_ready() local
41 channel->write_phase_ready = 1; in set_write_phase_ready()
264 static int _idtcm_gettime(struct idtcm_channel *channel, in _idtcm_gettime() argument
267 struct idtcm *idtcm = channel->idtcm; in _idtcm_gettime()
273 err = idtcm_read(idtcm, channel->tod_read_primary, in _idtcm_gettime()
282 err = idtcm_write(idtcm, channel->tod_read_primary, in _idtcm_gettime()
293 err = idtcm_read(idtcm, channel->tod_read_primary, in _idtcm_gettime()
304 err = idtcm_read(idtcm, channel->tod_read_primary, in _idtcm_gettime()
466 static int idtcm_sync_pps_output(struct idtcm_channel *channel) in idtcm_sync_pps_output() argument
468 struct idtcm *idtcm = channel->idtcm; in idtcm_sync_pps_output()
479 u16 output_mask = channel->output_mask; in idtcm_sync_pps_output()
481 err = sync_source_dpll_tod_pps(channel->tod_n, &sync_src); in idtcm_sync_pps_output()
550 static int _idtcm_set_dpll_hw_tod(struct idtcm_channel *channel, in _idtcm_set_dpll_hw_tod() argument
554 struct idtcm *idtcm = channel->idtcm; in _idtcm_set_dpll_hw_tod()
563 err = idtcm_read(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_CTRL_1, in _idtcm_set_dpll_hw_tod()
572 err = idtcm_write(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_CTRL_1, in _idtcm_set_dpll_hw_tod()
585 err = idtcm_write(idtcm, channel->hw_dpll_n, in _idtcm_set_dpll_hw_tod()
595 err = idtcm_write(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_CTRL_1, in _idtcm_set_dpll_hw_tod()
617 err = idtcm_write(idtcm, channel->hw_dpll_n, in _idtcm_set_dpll_hw_tod()
624 static int _idtcm_set_dpll_scsr_tod(struct idtcm_channel *channel, in _idtcm_set_dpll_scsr_tod() argument
629 struct idtcm *idtcm = channel->idtcm; in _idtcm_set_dpll_scsr_tod()
641 err = idtcm_write(idtcm, channel->tod_write, TOD_WRITE, in _idtcm_set_dpll_scsr_tod()
647 err = idtcm_read(idtcm, channel->tod_write, TOD_WRITE_CMD, in _idtcm_set_dpll_scsr_tod()
657 err = idtcm_write(idtcm, channel->tod_write, TOD_WRITE_CMD, in _idtcm_set_dpll_scsr_tod()
668 err = idtcm_read(idtcm, channel->tod_write, TOD_WRITE_CMD, in _idtcm_set_dpll_scsr_tod()
686 static int _idtcm_settime(struct idtcm_channel *channel, in _idtcm_settime() argument
690 struct idtcm *idtcm = channel->idtcm; in _idtcm_settime()
695 err = _idtcm_set_dpll_hw_tod(channel, ts, wr_trig); in _idtcm_settime()
702 err = idtcm_read(idtcm, channel->hw_dpll_n, in _idtcm_settime()
723 return idtcm_sync_pps_output(channel); in _idtcm_settime()
726 static int _idtcm_settime_v487(struct idtcm_channel *channel, in _idtcm_settime_v487() argument
730 return _idtcm_set_dpll_scsr_tod(channel, ts, in _idtcm_settime_v487()
735 static int idtcm_set_phase_pull_in_offset(struct idtcm_channel *channel, in idtcm_set_phase_pull_in_offset() argument
740 struct idtcm *idtcm = channel->idtcm; in idtcm_set_phase_pull_in_offset()
749 err = idtcm_write(idtcm, channel->dpll_phase_pull_in, PULL_IN_OFFSET, in idtcm_set_phase_pull_in_offset()
755 static int idtcm_set_phase_pull_in_slope_limit(struct idtcm_channel *channel, in idtcm_set_phase_pull_in_slope_limit() argument
760 struct idtcm *idtcm = channel->idtcm; in idtcm_set_phase_pull_in_slope_limit()
772 err = idtcm_write(idtcm, channel->dpll_phase_pull_in, in idtcm_set_phase_pull_in_slope_limit()
778 static int idtcm_start_phase_pull_in(struct idtcm_channel *channel) in idtcm_start_phase_pull_in() argument
781 struct idtcm *idtcm = channel->idtcm; in idtcm_start_phase_pull_in()
785 err = idtcm_read(idtcm, channel->dpll_phase_pull_in, PULL_IN_CTRL, in idtcm_start_phase_pull_in()
793 err = idtcm_write(idtcm, channel->dpll_phase_pull_in, in idtcm_start_phase_pull_in()
802 static int idtcm_do_phase_pull_in(struct idtcm_channel *channel, in idtcm_do_phase_pull_in() argument
808 err = idtcm_set_phase_pull_in_offset(channel, -offset_ns); in idtcm_do_phase_pull_in()
813 err = idtcm_set_phase_pull_in_slope_limit(channel, max_ffo_ppb); in idtcm_do_phase_pull_in()
818 err = idtcm_start_phase_pull_in(channel); in idtcm_do_phase_pull_in()
823 static int set_tod_write_overhead(struct idtcm_channel *channel) in set_tod_write_overhead() argument
825 struct idtcm *idtcm = channel->idtcm; in set_tod_write_overhead()
837 idtcm_write(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_OVR__0, in set_tod_write_overhead()
844 err = idtcm_write(idtcm, channel->hw_dpll_n, in set_tod_write_overhead()
867 static int _idtcm_adjtime(struct idtcm_channel *channel, s64 delta) in _idtcm_adjtime() argument
870 struct idtcm *idtcm = channel->idtcm; in _idtcm_adjtime()
875 err = idtcm_do_phase_pull_in(channel, delta, 0); in _idtcm_adjtime()
879 err = set_tod_write_overhead(channel); in _idtcm_adjtime()
884 err = _idtcm_gettime(channel, &ts); in _idtcm_adjtime()
894 err = _idtcm_settime(channel, &ts, HW_TOD_WR_TRIG_SEL_MSB); in _idtcm_adjtime()
969 SET_U16_LSB(idtcm->channel[0].output_mask, val); in set_pll_output_mask()
972 SET_U16_MSB(idtcm->channel[0].output_mask, val); in set_pll_output_mask()
975 SET_U16_LSB(idtcm->channel[1].output_mask, val); in set_pll_output_mask()
978 SET_U16_MSB(idtcm->channel[1].output_mask, val); in set_pll_output_mask()
981 SET_U16_LSB(idtcm->channel[2].output_mask, val); in set_pll_output_mask()
984 SET_U16_MSB(idtcm->channel[2].output_mask, val); in set_pll_output_mask()
987 SET_U16_LSB(idtcm->channel[3].output_mask, val); in set_pll_output_mask()
990 SET_U16_MSB(idtcm->channel[3].output_mask, val); in set_pll_output_mask()
1012 idtcm->channel[index].pll = pll; in set_tod_ptp_pll()
1066 i, idtcm->channel[i].pll, in display_pll_and_masks()
1067 idtcm->channel[i].output_mask); in display_pll_and_masks()
1150 static int idtcm_output_enable(struct idtcm_channel *channel, in idtcm_output_enable() argument
1153 struct idtcm *idtcm = channel->idtcm; in idtcm_output_enable()
1172 static int idtcm_output_mask_enable(struct idtcm_channel *channel, in idtcm_output_mask_enable() argument
1179 mask = channel->output_mask; in idtcm_output_mask_enable()
1186 err = idtcm_output_enable(channel, enable, outn); in idtcm_output_mask_enable()
1199 static int idtcm_perout_enable(struct idtcm_channel *channel, in idtcm_perout_enable() argument
1206 return idtcm_output_mask_enable(channel, enable); in idtcm_perout_enable()
1209 return idtcm_output_enable(channel, enable, perout->index); in idtcm_perout_enable()
1212 static int idtcm_set_pll_mode(struct idtcm_channel *channel, in idtcm_set_pll_mode() argument
1215 struct idtcm *idtcm = channel->idtcm; in idtcm_set_pll_mode()
1219 err = idtcm_read(idtcm, channel->dpll_n, DPLL_MODE, in idtcm_set_pll_mode()
1228 channel->pll_mode = pll_mode; in idtcm_set_pll_mode()
1230 err = idtcm_write(idtcm, channel->dpll_n, DPLL_MODE, in idtcm_set_pll_mode()
1247 static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns) in _idtcm_adjphase() argument
1249 struct idtcm *idtcm = channel->idtcm; in _idtcm_adjphase()
1257 if (channel->pll_mode != PLL_MODE_WRITE_PHASE) { in _idtcm_adjphase()
1259 err = idtcm_set_pll_mode(channel, PLL_MODE_WRITE_PHASE); in _idtcm_adjphase()
1264 channel->write_phase_ready = 0; in _idtcm_adjphase()
1266 ptp_schedule_worker(channel->ptp_clock, in _idtcm_adjphase()
1270 if (!channel->write_phase_ready) in _idtcm_adjphase()
1292 err = idtcm_write(idtcm, channel->dpll_phase, DPLL_WR_PHASE, in _idtcm_adjphase()
1298 static int _idtcm_adjfine(struct idtcm_channel *channel, long scaled_ppm) in _idtcm_adjfine() argument
1300 struct idtcm *idtcm = channel->idtcm; in _idtcm_adjfine()
1307 if (channel->pll_mode != PLL_MODE_WRITE_FREQUENCY) { in _idtcm_adjfine()
1308 err = idtcm_set_pll_mode(channel, PLL_MODE_WRITE_FREQUENCY); in _idtcm_adjfine()
1344 err = idtcm_write(idtcm, channel->dpll_freq, DPLL_WR_FREQ, in _idtcm_adjfine()
1352 struct idtcm_channel *channel = in idtcm_gettime() local
1354 struct idtcm *idtcm = channel->idtcm; in idtcm_gettime()
1359 err = _idtcm_gettime(channel, ts); in idtcm_gettime()
1375 struct idtcm_channel *channel = in idtcm_settime() local
1377 struct idtcm *idtcm = channel->idtcm; in idtcm_settime()
1382 err = _idtcm_settime(channel, ts, HW_TOD_WR_TRIG_SEL_MSB); in idtcm_settime()
1398 struct idtcm_channel *channel = in idtcm_settime_v487() local
1400 struct idtcm *idtcm = channel->idtcm; in idtcm_settime_v487()
1405 err = _idtcm_settime_v487(channel, ts, SCSR_TOD_WR_TYPE_SEL_ABSOLUTE); in idtcm_settime_v487()
1420 struct idtcm_channel *channel = in idtcm_adjtime() local
1422 struct idtcm *idtcm = channel->idtcm; in idtcm_adjtime()
1427 err = _idtcm_adjtime(channel, delta); in idtcm_adjtime()
1442 struct idtcm_channel *channel = in idtcm_adjtime_v487() local
1444 struct idtcm *idtcm = channel->idtcm; in idtcm_adjtime_v487()
1450 err = idtcm_do_phase_pull_in(channel, delta, 0); in idtcm_adjtime_v487()
1469 err = _idtcm_settime_v487(channel, &ts, type); in idtcm_adjtime_v487()
1484 struct idtcm_channel *channel = in idtcm_adjphase() local
1487 struct idtcm *idtcm = channel->idtcm; in idtcm_adjphase()
1493 err = _idtcm_adjphase(channel, delta); in idtcm_adjphase()
1508 struct idtcm_channel *channel = in idtcm_adjfine() local
1511 struct idtcm *idtcm = channel->idtcm; in idtcm_adjfine()
1517 err = _idtcm_adjfine(channel, scaled_ppm); in idtcm_adjfine()
1535 struct idtcm_channel *channel = in idtcm_enable() local
1541 err = idtcm_perout_enable(channel, false, &rq->perout); in idtcm_enable()
1543 dev_err(&channel->idtcm->client->dev, in idtcm_enable()
1555 err = idtcm_perout_enable(channel, true, &rq->perout); in idtcm_enable()
1557 dev_err(&channel->idtcm->client->dev, in idtcm_enable()
1683 static int idtcm_enable_tod_sync(struct idtcm_channel *channel) in idtcm_enable_tod_sync() argument
1685 struct idtcm *idtcm = channel->idtcm; in idtcm_enable_tod_sync()
1693 u16 output_mask = channel->output_mask; in idtcm_enable_tod_sync()
1701 err = idtcm_read(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg)); in idtcm_enable_tod_sync()
1707 err = idtcm_write(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg)); in idtcm_enable_tod_sync()
1711 switch (channel->tod_n) { in idtcm_enable_tod_sync()
1793 static int idtcm_enable_tod(struct idtcm_channel *channel) in idtcm_enable_tod() argument
1795 struct idtcm *idtcm = channel->idtcm; in idtcm_enable_tod()
1803 err = idtcm_read(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg)); in idtcm_enable_tod()
1809 err = idtcm_write(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg)); in idtcm_enable_tod()
1813 return _idtcm_settime(channel, &ts, HW_TOD_WR_TRIG_SEL_MSB); in idtcm_enable_tod()
1868 static int configure_channel_pll(struct idtcm_channel *channel) in configure_channel_pll() argument
1872 switch (channel->pll) { in configure_channel_pll()
1874 channel->dpll_freq = DPLL_FREQ_0; in configure_channel_pll()
1875 channel->dpll_n = DPLL_0; in configure_channel_pll()
1876 channel->hw_dpll_n = HW_DPLL_0; in configure_channel_pll()
1877 channel->dpll_phase = DPLL_PHASE_0; in configure_channel_pll()
1878 channel->dpll_ctrl_n = DPLL_CTRL_0; in configure_channel_pll()
1879 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_0; in configure_channel_pll()
1882 channel->dpll_freq = DPLL_FREQ_1; in configure_channel_pll()
1883 channel->dpll_n = DPLL_1; in configure_channel_pll()
1884 channel->hw_dpll_n = HW_DPLL_1; in configure_channel_pll()
1885 channel->dpll_phase = DPLL_PHASE_1; in configure_channel_pll()
1886 channel->dpll_ctrl_n = DPLL_CTRL_1; in configure_channel_pll()
1887 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_1; in configure_channel_pll()
1890 channel->dpll_freq = DPLL_FREQ_2; in configure_channel_pll()
1891 channel->dpll_n = DPLL_2; in configure_channel_pll()
1892 channel->hw_dpll_n = HW_DPLL_2; in configure_channel_pll()
1893 channel->dpll_phase = DPLL_PHASE_2; in configure_channel_pll()
1894 channel->dpll_ctrl_n = DPLL_CTRL_2; in configure_channel_pll()
1895 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_2; in configure_channel_pll()
1898 channel->dpll_freq = DPLL_FREQ_3; in configure_channel_pll()
1899 channel->dpll_n = DPLL_3; in configure_channel_pll()
1900 channel->hw_dpll_n = HW_DPLL_3; in configure_channel_pll()
1901 channel->dpll_phase = DPLL_PHASE_3; in configure_channel_pll()
1902 channel->dpll_ctrl_n = DPLL_CTRL_3; in configure_channel_pll()
1903 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_3; in configure_channel_pll()
1906 channel->dpll_freq = DPLL_FREQ_4; in configure_channel_pll()
1907 channel->dpll_n = DPLL_4; in configure_channel_pll()
1908 channel->hw_dpll_n = HW_DPLL_4; in configure_channel_pll()
1909 channel->dpll_phase = DPLL_PHASE_4; in configure_channel_pll()
1910 channel->dpll_ctrl_n = DPLL_CTRL_4; in configure_channel_pll()
1911 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_4; in configure_channel_pll()
1914 channel->dpll_freq = DPLL_FREQ_5; in configure_channel_pll()
1915 channel->dpll_n = DPLL_5; in configure_channel_pll()
1916 channel->hw_dpll_n = HW_DPLL_5; in configure_channel_pll()
1917 channel->dpll_phase = DPLL_PHASE_5; in configure_channel_pll()
1918 channel->dpll_ctrl_n = DPLL_CTRL_5; in configure_channel_pll()
1919 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_5; in configure_channel_pll()
1922 channel->dpll_freq = DPLL_FREQ_6; in configure_channel_pll()
1923 channel->dpll_n = DPLL_6; in configure_channel_pll()
1924 channel->hw_dpll_n = HW_DPLL_6; in configure_channel_pll()
1925 channel->dpll_phase = DPLL_PHASE_6; in configure_channel_pll()
1926 channel->dpll_ctrl_n = DPLL_CTRL_6; in configure_channel_pll()
1927 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_6; in configure_channel_pll()
1930 channel->dpll_freq = DPLL_FREQ_7; in configure_channel_pll()
1931 channel->dpll_n = DPLL_7; in configure_channel_pll()
1932 channel->hw_dpll_n = HW_DPLL_7; in configure_channel_pll()
1933 channel->dpll_phase = DPLL_PHASE_7; in configure_channel_pll()
1934 channel->dpll_ctrl_n = DPLL_CTRL_7; in configure_channel_pll()
1935 channel->dpll_phase_pull_in = DPLL_PHASE_PULL_IN_7; in configure_channel_pll()
1946 struct idtcm_channel *channel; in idtcm_enable_channel() local
1952 channel = &idtcm->channel[index]; in idtcm_enable_channel()
1955 err = configure_channel_pll(channel); in idtcm_enable_channel()
1962 channel->tod_read_primary = TOD_READ_PRIMARY_0; in idtcm_enable_channel()
1963 channel->tod_write = TOD_WRITE_0; in idtcm_enable_channel()
1964 channel->tod_n = TOD_0; in idtcm_enable_channel()
1967 channel->tod_read_primary = TOD_READ_PRIMARY_1; in idtcm_enable_channel()
1968 channel->tod_write = TOD_WRITE_1; in idtcm_enable_channel()
1969 channel->tod_n = TOD_1; in idtcm_enable_channel()
1972 channel->tod_read_primary = TOD_READ_PRIMARY_2; in idtcm_enable_channel()
1973 channel->tod_write = TOD_WRITE_2; in idtcm_enable_channel()
1974 channel->tod_n = TOD_2; in idtcm_enable_channel()
1977 channel->tod_read_primary = TOD_READ_PRIMARY_3; in idtcm_enable_channel()
1978 channel->tod_write = TOD_WRITE_3; in idtcm_enable_channel()
1979 channel->tod_n = TOD_3; in idtcm_enable_channel()
1985 channel->idtcm = idtcm; in idtcm_enable_channel()
1988 channel->caps = idtcm_caps_v487; in idtcm_enable_channel()
1990 channel->caps = idtcm_caps; in idtcm_enable_channel()
1992 snprintf(channel->caps.name, sizeof(channel->caps.name), in idtcm_enable_channel()
1996 err = idtcm_enable_tod_sync(channel); in idtcm_enable_channel()
2006 err = idtcm_set_pll_mode(channel, PLL_MODE_WRITE_FREQUENCY); in idtcm_enable_channel()
2015 err = idtcm_enable_tod(channel); in idtcm_enable_channel()
2024 channel->ptp_clock = ptp_clock_register(&channel->caps, NULL); in idtcm_enable_channel()
2026 if (IS_ERR(channel->ptp_clock)) { in idtcm_enable_channel()
2027 err = PTR_ERR(channel->ptp_clock); in idtcm_enable_channel()
2028 channel->ptp_clock = NULL; in idtcm_enable_channel()
2032 if (!channel->ptp_clock) in idtcm_enable_channel()
2035 channel->write_phase_ready = 0; in idtcm_enable_channel()
2038 index, channel->ptp_clock->index); in idtcm_enable_channel()
2046 struct idtcm_channel *channel; in ptp_clock_unregister_all() local
2050 channel = &idtcm->channel[i]; in ptp_clock_unregister_all()
2052 if (channel->ptp_clock) in ptp_clock_unregister_all()
2053 ptp_clock_unregister(channel->ptp_clock); in ptp_clock_unregister_all()
2061 idtcm->channel[0].pll = DEFAULT_TOD0_PTP_PLL; in set_default_masks()
2062 idtcm->channel[1].pll = DEFAULT_TOD1_PTP_PLL; in set_default_masks()
2063 idtcm->channel[2].pll = DEFAULT_TOD2_PTP_PLL; in set_default_masks()
2064 idtcm->channel[3].pll = DEFAULT_TOD3_PTP_PLL; in set_default_masks()
2066 idtcm->channel[0].output_mask = DEFAULT_OUTPUT_MASK_PLL0; in set_default_masks()
2067 idtcm->channel[1].output_mask = DEFAULT_OUTPUT_MASK_PLL1; in set_default_masks()
2068 idtcm->channel[2].output_mask = DEFAULT_OUTPUT_MASK_PLL2; in set_default_masks()
2069 idtcm->channel[3].output_mask = DEFAULT_OUTPUT_MASK_PLL3; in set_default_masks()
2078 char *fmt = "Failed at %d in line %s with channel output %d!\n"; in idtcm_probe()