30 #define N 0
33 #define BANK_DS	0
36 #define CLR_REG(r)	((r) + 0x04)
39 #define FUNC_CLEAR_MASK		0x7
40 #define FUNC_GPIO		0
41 #define FUNC_ANALOGUE		0x8
42 #define ANA_CLEAR_MASK		0x1
46 	PAD_T_4WE_PD = 0,	/* ZIO_PAD3V_4WE_PD */
60 #define DS0	BIT(0)
61 #define DSZ	0
66 #define DS_1BIT_MASK	0x1
68 #define DS_2BIT_MASK	0x3
70 #define DS_4BIT_MASK	0xf
72 /* The Drive-Strength of 4WE Pad		 DS1  0  CO */
74 #define DS_4WE_2   (DS1)			/* 1  0  2  */
75 #define DS_4WE_1   (DS0)			/* 0  1  1  */
76 #define DS_4WE_0   (DSZ)			/* 0  0  0  */
78 /* The Drive-Strength of 16st Pad		 DS3  2  1  0  CO */
80 #define DS_16ST_14  (DS3 | DS2 | DS0)		/* 1  1  0  1  13 */
81 #define DS_16ST_13  (DS3 | DS2 | DS1)		/* 1  1  1  0  14 */
82 #define DS_16ST_12  (DS2 | DS1 | DS0)		/* 0  1  1  1  7  */
83 #define DS_16ST_11  (DS2 | DS0)			/* 0  1  0  1  5  */
84 #define DS_16ST_10  (DS3 | DS1 | DS0)		/* 1  0  1  1  11 */
85 #define DS_16ST_9   (DS3 | DS0)			/* 1  0  0  1  9  */
86 #define DS_16ST_8   (DS1 | DS0)			/* 0  0  1  1  3  */
87 #define DS_16ST_7   (DS2 | DS1)			/* 0  1  1  0  6  */
88 #define DS_16ST_6   (DS3 | DS2)			/* 1  1  0  0  12 */
89 #define DS_16ST_5   (DS2)			/* 0  1  0  0  4  */
90 #define DS_16ST_4   (DS3 | DS1)			/* 1  0  1  0  10 */
91 #define DS_16ST_3   (DS1)			/* 0  0  1  0  2  */
92 #define DS_16ST_2   (DS0)			/* 0  0  0  1  1  */
93 #define DS_16ST_1   (DSZ)			/* 0  0  0  0  0  */
94 #define DS_16ST_0   (DS3)			/* 1  0  0  0  8  */
97 #define DS_M31_0   (DSZ)			/* 0  0  */
102 #define PD	BIT(0)
103 #define PE	BIT(0)
104 #define PZ	0
107 #define PULL_UP		0
116 #define P4WE_PULL_MASK		0x3
118 #define P4WE_HIGH_Z		(PUN)		/* 1   0   2  */
119 #define P4WE_HIGH_HYSTERESIS	(PD)		/* 0   1   1  */
120 #define P4WE_PULL_UP		(PZ)		/* 0   0   0  */
123 #define P16ST_PULL_MASK		0x3
125 #define P16ST_HIGH_Z		(PUN)		/* 1   0   2  */
126 #define P16ST_PULL_UP		(PZ)		/* 0   0   0  */
129 #define PM31_PULL_MASK		0x1
131 #define PM31_PULL_DISABLED	(PZ)		/* 0 */
134 #define PANGD_PULL_MASK		0x3
136 #define PANGD_HIGH_Z		(PUN)		/* 1   0   2  */
137 #define PANGD_PULL_UP		(PZ)		/* 0   0   0  */
140 #define DI_MASK		0x1
141 #define DI_DISABLE	0x1
142 #define DI_ENABLE	0x0
145 #define DIV_MASK	0x1
146 #define DIV_DISABLE	0x1
147 #define DIV_ENABLE	0x0
150 #define NUM_OF_IN_DISABLE_REG	0x2
153 #define IN_DISABLE_0_REG_SET		0x0A00
154 #define IN_DISABLE_0_REG_CLR		0x0A04
155 #define IN_DISABLE_1_REG_SET		0x0A08
156 #define IN_DISABLE_1_REG_CLR		0x0A0C
157 #define IN_DISABLE_VAL_0_REG_SET	0x0A80
158 #define IN_DISABLE_VAL_0_REG_CLR	0x0A84
159 #define IN_DISABLE_VAL_1_REG_SET	0x0A88
160 #define IN_DISABLE_VAL_1_REG_CLR	0x0A8C
163 #define SYS2PCI_SDIO9SEL 0x14
324 #define ATLAS7_GPIO_BASE(g, b)		((g)->reg + 0x100 * (b))
326 #define ATLAS7_GPIO_INT_STATUS(b)	((b)->base + 0x8C)
329 #define ATLAS7_GPIO_CTL_INTR_LOW_MASK		BIT(0)
378 	PINCTRL_PIN(0, "rtc_gpio_0"),
548 	PADCONF(0, 3, 0x0, 0x100, 0x200, -1, 0, 0, 0, 0),
549 	PADCONF(1, 3, 0x0, 0x100, 0x200, -1, 4, 2, 2, 0),
550 	PADCONF(2, 3, 0x0, 0x100, 0x200, -1, 8, 4, 4, 0),
551 	PADCONF(3, 5, 0x0, 0x100, 0x200, -1, 12, 6, 6, 0),
552 	PADCONF(4, 4, 0x0, 0x100, 0x200, -1, 16, 8, 8, 0),
553 	PADCONF(5, 4, 0x0, 0x100, 0x200, -1, 20, 10, 10, 0),
554 	PADCONF(6, 3, 0x0, 0x100, 0x200, -1, 24, 12, 12, 0),
555 	PADCONF(7, 3, 0x0, 0x100, 0x200, -1, 28, 14, 14, 0),
556 	PADCONF(8, 3, 0x8, 0x100, 0x200, -1, 0, 16, 16, 0),
557 	PADCONF(9, 3, 0x8, 0x100, 0x200, -1, 4, 18, 18, 0),
558 	PADCONF(10, 4, 0x8, 0x100, 0x200, -1, 8, 20, 20, 0),
559 	PADCONF(11, 4, 0x8, 0x100, 0x200, -1, 12, 22, 22, 0),
560 	PADCONF(12, 5, 0x8, 0x100, 0x200, -1, 16, 24, 24, 0),
561 	PADCONF(13, 6, 0x8, 0x100, 0x200, -1, 20, 26, 26, 0),
562 	PADCONF(14, 5, 0x8, 0x100, 0x200, -1, 24, 28, 28, 0),
563 	PADCONF(15, 5, 0x8, 0x100, 0x200, -1, 28, 30, 30, 0),
564 	PADCONF(16, 5, 0x10, 0x108, 0x208, -1, 0, 0, 0, 0),
565 	PADCONF(17, 5, 0x10, 0x108, 0x208, -1, 4, 2, 2, 0),
567 	PADCONF(18, 5, 0x80, 0x180, 0x300, -1, 0, 0, 0, 0),
568 	PADCONF(19, 5, 0x80, 0x180, 0x300, -1, 4, 2, 2, 0),
569 	PADCONF(20, 5, 0x80, 0x180, 0x300, -1, 8, 4, 4, 0),
570 	PADCONF(21, 5, 0x80, 0x180, 0x300, -1, 12, 6, 6, 0),
571 	PADCONF(22, 5, 0x88, 0x188, 0x308, -1, 0, 0, 0, 0),
572 	PADCONF(23, 5, 0x88, 0x188, 0x308, -1, 4, 2, 2, 0),
573 	PADCONF(24, 5, 0x88, 0x188, 0x308, -1, 8, 4, 4, 0),
574 	PADCONF(25, 6, 0x88, 0x188, 0x308, -1, 12, 6, 6, 0),
575 	PADCONF(26, 5, 0x88, 0x188, 0x308, -1, 16, 8, 8, 0),
576 	PADCONF(27, 6, 0x88, 0x188, 0x308, -1, 20, 10, 10, 0),
577 	PADCONF(28, 5, 0x88, 0x188, 0x308, -1, 24, 12, 12, 0),
578 	PADCONF(29, 5, 0x88, 0x188, 0x308, -1, 28, 14, 14, 0),
579 	PADCONF(30, 5, 0x90, 0x188, 0x308, -1, 0, 16, 16, 0),
580 	PADCONF(31, 2, 0x98, 0x190, 0x310, -1, 0, 0, 0, 0),
581 	PADCONF(32, 1, 0x98, 0x190, 0x310, -1, 4, 2, 4, 0),
582 	PADCONF(33, 1, 0x98, 0x190, 0x310, -1, 8, 4, 6, 0),
583 	PADCONF(34, 1, 0x98, 0x190, 0x310, -1, 12, 6, 8, 0),
584 	PADCONF(35, 1, 0x98, 0x190, 0x310, -1, 16, 8, 10, 0),
585 	PADCONF(36, 1, 0x98, 0x190, 0x310, -1, 20, 10, 12, 0),
586 	PADCONF(37, 1, 0xa0, 0x198, 0x318, -1, 0, 0, 0, 0),
587 	PADCONF(38, 1, 0xa0, 0x198, 0x318, -1, 4, 2, 2, 0),
588 	PADCONF(39, 1, 0xa0, 0x198, 0x318, -1, 8, 4, 4, 0),
589 	PADCONF(40, 1, 0xa0, 0x198, 0x318, -1, 12, 6, 6, 0),
590 	PADCONF(41, 1, 0xa0, 0x198, 0x318, -1, 16, 8, 8, 0),
591 	PADCONF(42, 1, 0xa0, 0x198, 0x318, -1, 20, 10, 10, 0),
592 	PADCONF(43, 1, 0xa0, 0x198, 0x318, -1, 24, 12, 12, 0),
593 	PADCONF(44, 1, 0xa0, 0x198, 0x318, -1, 28, 14, 14, 0),
594 	PADCONF(45, 0, 0xa8, 0x198, 0x318, -1, 0, 16, 16, 0),
595 	PADCONF(46, 0, 0xa8, 0x198, 0x318, -1, 4, 18, 18, 0),
596 	PADCONF(47, 1, 0xa8, 0x198, 0x318, -1, 8, 20, 20, 0),
597 	PADCONF(48, 1, 0xa8, 0x198, 0x318, -1, 12, 22, 22, 0),
598 	PADCONF(49, 1, 0xa8, 0x198, 0x318, -1, 16, 24, 24, 0),
599 	PADCONF(50, 1, 0xa8, 0x198, 0x318, -1, 20, 26, 26, 0),
600 	PADCONF(51, 1, 0xa8, 0x198, 0x318, -1, 24, 28, 28, 0),
601 	PADCONF(52, 1, 0xa8, 0x198, 0x318, -1, 28, 30, 30, 0),
602 	PADCONF(53, 0, 0xb0, 0x1a0, 0x320, -1, 0, 0, 0, 0),
603 	PADCONF(54, 0, 0xb0, 0x1a0, 0x320, -1, 4, 2, 2, 0),
604 	PADCONF(55, 0, 0xb0, 0x1a0, 0x320, -1, 8, 4, 4, 0),
605 	PADCONF(56, 0, 0xb0, 0x1a0, 0x320, -1, 12, 6, 6, 0),
606 	PADCONF(57, 0, 0xb0, 0x1a0, 0x320, -1, 16, 8, 8, 0),
607 	PADCONF(58, 0, 0xb0, 0x1a0, 0x320, -1, 20, 10, 10, 0),
608 	PADCONF(59, 0, 0xb0, 0x1a0, 0x320, -1, 24, 12, 12, 0),
609 	PADCONF(60, 0, 0xb0, 0x1a0, 0x320, -1, 28, 14, 14, 0),
610 	PADCONF(61, 0, 0xb8, 0x1a0, 0x320, -1, 0, 16, 16, 0),
611 	PADCONF(62, 0, 0xb8, 0x1a0, 0x320, -1, 4, 18, 18, 0),
612 	PADCONF(63, 0, 0xb8, 0x1a0, 0x320, -1, 8, 20, 20, 0),
613 	PADCONF(64, 0, 0xb8, 0x1a0, 0x320, -1, 12, 22, 22, 0),
614 	PADCONF(65, 0, 0xb8, 0x1a0, 0x320, -1, 16, 24, 24, 0),
615 	PADCONF(66, 0, 0xb8, 0x1a0, 0x320, -1, 20, 26, 26, 0),
616 	PADCONF(67, 0, 0xb8, 0x1a0, 0x320, -1, 24, 28, 28, 0),
617 	PADCONF(68, 0, 0xb8, 0x1a0, 0x320, -1, 28, 30, 30, 0),
618 	PADCONF(69, 0, 0xc0, 0x1a8, 0x328, -1, 0, 0, 0, 0),
619 	PADCONF(70, 0, 0xc0, 0x1a8, 0x328, -1, 4, 2, 2, 0),
620 	PADCONF(71, 0, 0xc0, 0x1a8, 0x328, -1, 8, 4, 4, 0),
621 	PADCONF(72, 0, 0xc0, 0x1a8, 0x328, -1, 12, 6, 6, 0),
622 	PADCONF(73, 0, 0xc0, 0x1a8, 0x328, -1, 16, 8, 8, 0),
623 	PADCONF(74, 0, 0xc8, 0x1b0, 0x330, -1, 0, 0, 0, 0),
624 	PADCONF(75, 0, 0xc8, 0x1b0, 0x330, -1, 4, 2, 2, 0),
625 	PADCONF(76, 0, 0xc8, 0x1b0, 0x330, -1, 8, 4, 4, 0),
626 	PADCONF(77, 0, 0xc8, 0x1b0, 0x330, -1, 12, 6, 6, 0),
627 	PADCONF(78, 0, 0xc8, 0x1b0, 0x330, -1, 16, 8, 8, 0),
628 	PADCONF(79, 0, 0xc8, 0x1b0, 0x330, -1, 20, 10, 10, 0),
629 	PADCONF(80, 0, 0xc8, 0x1b0, 0x330, -1, 24, 12, 12, 0),
630 	PADCONF(81, 0, 0xc8, 0x1b0, 0x330, -1, 28, 14, 14, 0),
631 	PADCONF(82, 0, 0xd0, 0x1b0, 0x330, -1, 0, 16, 16, 0),
632 	PADCONF(83, 0, 0xd0, 0x1b0, 0x330, -1, 4, 18, 18, 0),
633 	PADCONF(84, 0, 0xd0, 0x1b0, 0x330, -1, 8, 20, 20, 0),
634 	PADCONF(85, 2, 0xd8, 0x1b8, 0x338, -1, 0, 0, 0, 0),
635 	PADCONF(86, 1, 0xd8, 0x1b8, 0x338, -1, 4, 4, 4, 0),
636 	PADCONF(87, 1, 0xd8, 0x1b8, 0x338, -1, 8, 6, 6, 0),
637 	PADCONF(88, 1, 0xd8, 0x1b8, 0x338, -1, 12, 8, 8, 0),
638 	PADCONF(89, 1, 0xd8, 0x1b8, 0x338, -1, 16, 10, 10, 0),
639 	PADCONF(90, 1, 0xd8, 0x1b8, 0x338, -1, 20, 12, 12, 0),
640 	PADCONF(91, 2, 0xe0, 0x1c0, 0x340, -1, 0, 0, 0, 0),
641 	PADCONF(92, 1, 0xe0, 0x1c0, 0x340, -1, 4, 4, 4, 0),
642 	PADCONF(93, 1, 0xe0, 0x1c0, 0x340, -1, 8, 6, 6, 0),
643 	PADCONF(94, 1, 0xe0, 0x1c0, 0x340, -1, 12, 8, 8, 0),
644 	PADCONF(95, 1, 0xe0, 0x1c0, 0x340, -1, 16, 10, 10, 0),
645 	PADCONF(96, 1, 0xe0, 0x1c0, 0x340, -1, 20, 12, 12, 0),
646 	PADCONF(97, 0, 0xe8, 0x1c8, 0x348, -1, 0, 0, 0, 0),
647 	PADCONF(98, 0, 0xe8, 0x1c8, 0x348, -1, 4, 2, 2, 0),
648 	PADCONF(99, 0, 0xe8, 0x1c8, 0x348, -1, 8, 4, 4, 0),
649 	PADCONF(100, 0, 0xe8, 0x1c8, 0x348, -1, 12, 6, 6, 0),
650 	PADCONF(101, 2, 0xe8, 0x1c8, 0x348, -1, 16, 8, 8, 0),
651 	PADCONF(102, 0, 0xe8, 0x1c8, 0x348, -1, 20, 12, 12, 0),
652 	PADCONF(103, 0, 0xe8, 0x1c8, 0x348, -1, 24, 14, 14, 0),
653 	PADCONF(104, 0, 0xe8, 0x1c8, 0x348, -1, 28, 16, 16, 0),
654 	PADCONF(105, 0, 0xf0, 0x1c8, 0x348, -1, 0, 18, 18, 0),
655 	PADCONF(106, 0, 0xf0, 0x1c8, 0x348, -1, 4, 20, 20, 0),
656 	PADCONF(107, 0, 0xf0, 0x1c8, 0x348, -1, 8, 22, 22, 0),
657 	PADCONF(108, 0, 0xf0, 0x1c8, 0x348, -1, 12, 24, 24, 0),
658 	PADCONF(109, 1, 0xf0, 0x1c8, 0x348, -1, 16, 26, 26, 0),
659 	PADCONF(110, 0, 0xf0, 0x1c8, 0x348, -1, 20, 28, 28, 0),
660 	PADCONF(111, 1, 0xf0, 0x1c8, 0x348, -1, 24, 30, 30, 0),
661 	PADCONF(112, 5, 0xf8, 0x200, 0x350, -1, 0, 0, 0, 0),
662 	PADCONF(113, 5, 0xf8, 0x200, 0x350, -1, 4, 2, 2, 0),
663 	PADCONF(114, 5, 0xf8, 0x200, 0x350, -1, 8, 4, 4, 0),
664 	PADCONF(115, 5, 0xf8, 0x200, 0x350, -1, 12, 6, 6, 0),
665 	PADCONF(116, 5, 0xf8, 0x200, 0x350, -1, 16, 8, 8, 0),
666 	PADCONF(117, 5, 0xf8, 0x200, 0x350, -1, 20, 10, 10, 0),
667 	PADCONF(118, 5, 0xf8, 0x200, 0x350, -1, 24, 12, 12, 0),
668 	PADCONF(119, 5, 0x100, 0x250, 0x358, -1, 0, 0, 0, 0),
669 	PADCONF(120, 5, 0x100, 0x250, 0x358, -1, 4, 2, 2, 0),
670 	PADCONF(121, 5, 0x100, 0x250, 0x358, -1, 8, 4, 4, 0),
671 	PADCONF(122, 5, 0x100, 0x250, 0x358, -1, 12, 6, 6, 0),
672 	PADCONF(123, 6, 0x100, 0x250, 0x358, -1, 16, 8, 8, 0),
673 	PADCONF(124, 6, 0x100, 0x250, 0x358, -1, 20, 10, 10, 0),
674 	PADCONF(125, 6, 0x100, 0x250, 0x358, -1, 24, 12, 12, 0),
675 	PADCONF(126, 6, 0x100, 0x250, 0x358, -1, 28, 14, 14, 0),
676 	PADCONF(127, 6, 0x108, 0x250, 0x358, -1, 16, 24, 24, 0),
677 	PADCONF(128, 6, 0x108, 0x250, 0x358, -1, 20, 26, 26, 0),
678 	PADCONF(129, 0, 0x110, 0x258, 0x360, -1, 0, 0, 0, 0),
679 	PADCONF(130, 0, 0x110, 0x258, 0x360, -1, 4, 2, 2, 0),
680 	PADCONF(131, 0, 0x110, 0x258, 0x360, -1, 8, 4, 4, 0),
681 	PADCONF(132, 0, 0x110, 0x258, 0x360, -1, 12, 6, 6, 0),
682 	PADCONF(133, 6, 0x118, 0x260, 0x368, -1, 0, 0, 0, 0),
683 	PADCONF(134, 6, 0x118, 0x260, 0x368, -1, 4, 2, 2, 0),
684 	PADCONF(135, 6, 0x118, 0x260, 0x368, -1, 16, 8, 8, 0),
685 	PADCONF(136, 6, 0x118, 0x260, 0x368, -1, 20, 10, 10, 0),
686 	PADCONF(137, 6, 0x118, 0x260, 0x368, -1, 24, 12, 12, 0),
687 	PADCONF(138, 6, 0x118, 0x260, 0x368, -1, 28, 14, 14, 0),
688 	PADCONF(139, 6, 0x120, 0x260, 0x368, -1, 0, 16, 16, 0),
689 	PADCONF(140, 6, 0x120, 0x260, 0x368, -1, 4, 18, 18, 0),
690 	PADCONF(141, 5, 0x128, 0x268, 0x378, -1, 0, 0, 0, 0),
691 	PADCONF(142, 5, 0x128, 0x268, 0x378, -1, 4, 2, 2, 0),
692 	PADCONF(143, 5, 0x128, 0x268, 0x378, -1, 8, 4, 4, 0),
693 	PADCONF(144, 5, 0x128, 0x268, 0x378, -1, 12, 6, 6, 0),
694 	PADCONF(145, 5, 0x128, 0x268, 0x378, -1, 16, 8, 8, 0),
695 	PADCONF(146, 5, 0x128, 0x268, 0x378, -1, 20, 10, 10, 0),
696 	PADCONF(147, 5, 0x128, 0x268, 0x378, -1, 24, 12, 12, 0),
697 	PADCONF(148, 5, 0x128, 0x268, 0x378, -1, 28, 14, 14, 0),
698 	PADCONF(149, 7, 0x130, 0x270, -1, 0x480, 0, 0, 0, 0),
699 	PADCONF(150, 7, 0x130, 0x270, -1, 0x480, 4, 2, 0, 1),
700 	PADCONF(151, 7, 0x130, 0x270, -1, 0x480, 8, 4, 0, 2),
701 	PADCONF(152, 7, 0x130, 0x270, -1, 0x480, 12, 6, 0, 3),
702 	PADCONF(153, 7, 0x130, 0x270, -1, 0x480, 16, 8, 0, 4),
703 	PADCONF(154, 7, 0x130, 0x270, -1, 0x480, 20, 10, 0, 5),
704 	PADCONF(155, 7, 0x130, 0x270, -1, 0x480, 24, 12, 0, 6),
705 	PADCONF(156, 7, 0x130, 0x270, -1, 0x480, 28, 14, 0, 7),
706 	PADCONF(157, 7, 0x138, 0x278, -1, 0x480, 0, 0, 0, 8),
707 	PADCONF(158, 7, 0x138, 0x278, -1, 0x480, 4, 2, 0, 9),
708 	PADCONF(159, 5, 0x140, 0x280, 0x380, -1, 0, 0, 0, 0),
709 	PADCONF(160, 6, 0x140, 0x280, 0x380, -1, 4, 2, 2, 0),
710 	PADCONF(161, 5, 0x140, 0x280, 0x380, -1, 8, 4, 4, 0),
711 	PADCONF(162, 6, 0x140, 0x280, 0x380, -1, 12, 6, 6, 0),
712 	PADCONF(163, 6, 0x140, 0x280, 0x380, -1, 16, 8, 8, 0),
732 static const unsigned int rtc_gpio_pins[] = { 0, 1, 2, 3, 4, 10, 11, 12, 13,
773 static const unsigned int c_can_trnsvr_en_pins1[] = { 0, };
862 static const unsigned int jtag_tck_pins0[] = { 0, };
893 static const unsigned int pwc_wakeup_src0_pins[] = { 0, };
1529 	MUX(1, 119, 0, N, N, N, N),
1530 	MUX(1, 120, 0, N, N, N, N),
1531 	MUX(1, 121, 0, N, N, N, N),
1532 	MUX(1, 122, 0, N, N, N, N),
1533 	MUX(1, 123, 0, N, N, N, N),
1534 	MUX(1, 124, 0, N, N, N, N),
1535 	MUX(1, 125, 0, N, N, N, N),
1536 	MUX(1, 126, 0, N, N, N, N),
1537 	MUX(1, 127, 0, N, N, N, N),
1538 	MUX(1, 128, 0, N, N, N, N),
1539 	MUX(1, 22, 0, N, N, N, N),
1540 	MUX(1, 23, 0, N, N, N, N),
1541 	MUX(1, 24, 0, N, N, N, N),
1542 	MUX(1, 25, 0, N, N, N, N),
1543 	MUX(1, 26, 0, N, N, N, N),
1544 	MUX(1, 27, 0, N, N, N, N),
1545 	MUX(1, 28, 0, N, N, N, N),
1546 	MUX(1, 29, 0, N, N, N, N),
1547 	MUX(1, 30, 0, N, N, N, N),
1556 	MUX(1, 74, 0, N, N, N, N),
1557 	MUX(1, 75, 0, N, N, N, N),
1558 	MUX(1, 76, 0, N, N, N, N),
1559 	MUX(1, 77, 0, N, N, N, N),
1560 	MUX(1, 78, 0, N, N, N, N),
1561 	MUX(1, 79, 0, N, N, N, N),
1562 	MUX(1, 80, 0, N, N, N, N),
1563 	MUX(1, 81, 0, N, N, N, N),
1564 	MUX(1, 82, 0, N, N, N, N),
1565 	MUX(1, 83, 0, N, N, N, N),
1566 	MUX(1, 84, 0, N, N, N, N),
1567 	MUX(1, 53, 0, N, N, N, N),
1568 	MUX(1, 54, 0, N, N, N, N),
1569 	MUX(1, 55, 0, N, N, N, N),
1570 	MUX(1, 56, 0, N, N, N, N),
1571 	MUX(1, 57, 0, N, N, N, N),
1572 	MUX(1, 58, 0, N, N, N, N),
1573 	MUX(1, 59, 0, N, N, N, N),
1574 	MUX(1, 60, 0, N, N, N, N),
1575 	MUX(1, 61, 0, N, N, N, N),
1576 	MUX(1, 62, 0, N, N, N, N),
1577 	MUX(1, 63, 0, N, N, N, N),
1578 	MUX(1, 64, 0, N, N, N, N),
1579 	MUX(1, 65, 0, N, N, N, N),
1580 	MUX(1, 66, 0, N, N, N, N),
1581 	MUX(1, 67, 0, N, N, N, N),
1582 	MUX(1, 68, 0, N, N, N, N),
1583 	MUX(1, 69, 0, N, N, N, N),
1584 	MUX(1, 70, 0, N, N, N, N),
1585 	MUX(1, 71, 0, N, N, N, N),
1586 	MUX(1, 72, 0, N, N, N, N),
1587 	MUX(1, 73, 0, N, N, N, N),
1596 	MUX(1, 31, 0, N, N, N, N),
1597 	MUX(1, 32, 0, N, N, N, N),
1598 	MUX(1, 33, 0, N, N, N, N),
1599 	MUX(1, 34, 0, N, N, N, N),
1600 	MUX(1, 35, 0, N, N, N, N),
1601 	MUX(1, 36, 0, N, N, N, N),
1602 	MUX(1, 85, 0, N, N, N, N),
1603 	MUX(1, 86, 0, N, N, N, N),
1604 	MUX(1, 87, 0, N, N, N, N),
1605 	MUX(1, 88, 0, N, N, N, N),
1606 	MUX(1, 89, 0, N, N, N, N),
1607 	MUX(1, 90, 0, N, N, N, N),
1608 	MUX(1, 129, 0, N, N, N, N),
1609 	MUX(1, 130, 0, N, N, N, N),
1610 	MUX(1, 131, 0, N, N, N, N),
1611 	MUX(1, 132, 0, N, N, N, N),
1612 	MUX(1, 91, 0, N, N, N, N),
1613 	MUX(1, 92, 0, N, N, N, N),
1614 	MUX(1, 93, 0, N, N, N, N),
1615 	MUX(1, 94, 0, N, N, N, N),
1616 	MUX(1, 95, 0, N, N, N, N),
1617 	MUX(1, 96, 0, N, N, N, N),
1618 	MUX(1, 112, 0, N, N, N, N),
1619 	MUX(1, 113, 0, N, N, N, N),
1620 	MUX(1, 114, 0, N, N, N, N),
1621 	MUX(1, 115, 0, N, N, N, N),
1622 	MUX(1, 116, 0, N, N, N, N),
1623 	MUX(1, 117, 0, N, N, N, N),
1624 	MUX(1, 118, 0, N, N, N, N),
1633 	MUX(1, 97, 0, N, N, N, N),
1634 	MUX(1, 98, 0, N, N, N, N),
1635 	MUX(1, 99, 0, N, N, N, N),
1636 	MUX(1, 100, 0, N, N, N, N),
1637 	MUX(1, 101, 0, N, N, N, N),
1638 	MUX(1, 102, 0, N, N, N, N),
1639 	MUX(1, 103, 0, N, N, N, N),
1640 	MUX(1, 104, 0, N, N, N, N),
1641 	MUX(1, 105, 0, N, N, N, N),
1642 	MUX(1, 106, 0, N, N, N, N),
1643 	MUX(1, 107, 0, N, N, N, N),
1644 	MUX(1, 108, 0, N, N, N, N),
1645 	MUX(1, 109, 0, N, N, N, N),
1646 	MUX(1, 110, 0, N, N, N, N),
1647 	MUX(1, 111, 0, N, N, N, N),
1648 	MUX(1, 18, 0, N, N, N, N),
1649 	MUX(1, 19, 0, N, N, N, N),
1650 	MUX(1, 20, 0, N, N, N, N),
1651 	MUX(1, 21, 0, N, N, N, N),
1652 	MUX(1, 141, 0, N, N, N, N),
1653 	MUX(1, 142, 0, N, N, N, N),
1654 	MUX(1, 143, 0, N, N, N, N),
1655 	MUX(1, 144, 0, N, N, N, N),
1656 	MUX(1, 145, 0, N, N, N, N),
1657 	MUX(1, 146, 0, N, N, N, N),
1658 	MUX(1, 147, 0, N, N, N, N),
1659 	MUX(1, 148, 0, N, N, N, N),
1668 	MUX(1, 157, 0, N, N, N, N),
1669 	MUX(1, 158, 0, N, N, N, N),
1670 	MUX(1, 155, 0, N, N, N, N),
1671 	MUX(1, 156, 0, N, N, N, N),
1672 	MUX(1, 153, 0, N, N, N, N),
1673 	MUX(1, 154, 0, N, N, N, N),
1674 	MUX(1, 151, 0, N, N, N, N),
1675 	MUX(1, 152, 0, N, N, N, N),
1676 	MUX(1, 149, 0, N, N, N, N),
1677 	MUX(1, 150, 0, N, N, N, N),
1686 	MUX(1, 44, 0, N, N, N, N),
1687 	MUX(1, 43, 0, N, N, N, N),
1688 	MUX(1, 42, 0, N, N, N, N),
1689 	MUX(1, 41, 0, N, N, N, N),
1690 	MUX(1, 40, 0, N, N, N, N),
1691 	MUX(1, 39, 0, N, N, N, N),
1692 	MUX(1, 38, 0, N, N, N, N),
1693 	MUX(1, 37, 0, N, N, N, N),
1694 	MUX(1, 46, 0, N, N, N, N),
1695 	MUX(1, 47, 0, N, N, N, N),
1696 	MUX(1, 48, 0, N, N, N, N),
1697 	MUX(1, 49, 0, N, N, N, N),
1698 	MUX(1, 50, 0, N, N, N, N),
1699 	MUX(1, 52, 0, N, N, N, N),
1700 	MUX(1, 51, 0, N, N, N, N),
1701 	MUX(1, 45, 0, N, N, N, N),
1702 	MUX(1, 133, 0, N, N, N, N),
1703 	MUX(1, 134, 0, N, N, N, N),
1704 	MUX(1, 135, 0, N, N, N, N),
1705 	MUX(1, 136, 0, N, N, N, N),
1706 	MUX(1, 137, 0, N, N, N, N),
1707 	MUX(1, 138, 0, N, N, N, N),
1708 	MUX(1, 139, 0, N, N, N, N),
1709 	MUX(1, 140, 0, N, N, N, N),
1710 	MUX(1, 159, 0, N, N, N, N),
1711 	MUX(1, 160, 0, N, N, N, N),
1712 	MUX(1, 161, 0, N, N, N, N),
1713 	MUX(1, 162, 0, N, N, N, N),
1714 	MUX(1, 163, 0, N, N, N, N),
1723 	MUX(0, 0, 0, N, N, N, N),
1724 	MUX(0, 1, 0, N, N, N, N),
1725 	MUX(0, 2, 0, N, N, N, N),
1726 	MUX(0, 3, 0, N, N, N, N),
1727 	MUX(0, 4, 0, N, N, N, N),
1728 	MUX(0, 10, 0, N, N, N, N),
1729 	MUX(0, 11, 0, N, N, N, N),
1730 	MUX(0, 12, 0, N, N, N, N),
1731 	MUX(0, 13, 0, N, N, N, N),
1732 	MUX(0, 14, 0, N, N, N, N),
1733 	MUX(0, 15, 0, N, N, N, N),
1734 	MUX(0, 16, 0, N, N, N, N),
1735 	MUX(0, 17, 0, N, N, N, N),
1736 	MUX(0, 9, 0, N, N, N, N),
1757 	MUX(1, 51, 3, 0xa10, 20, 0xa90, 20),
1766 	MUX(1, 122, 5, 0xa10, 20, 0xa90, 20),
1775 	MUX(1, 161, 7, 0xa10, 20, 0xa90, 20),
1894 	MUX(1, 117, 5, 0xa10, 28, 0xa90, 28),
1903 	MUX(1, 139, 3, 0xa10, 28, 0xa90, 28),
1912 	MUX(1, 163, 3, 0xa10, 28, 0xa90, 28),
1921 	MUX(1, 162, 6, 0xa10, 28, 0xa90, 28),
1930 	MUX(1, 147, 1, 0xa10, 24, 0xa90, 24),
1931 	MUX(1, 146, 1, 0xa10, 25, 0xa90, 25),
1932 	MUX(1, 145, 1, 0xa10, 23, 0xa90, 23),
1933 	MUX(1, 148, 1, 0xa10, 22, 0xa90, 22),
1942 	MUX(1, 117, 6, 0xa10, 29, 0xa90, 29),
1951 	MUX(1, 140, 3, 0xa10, 29, 0xa90, 29),
1960 	MUX(1, 163, 4, 0xa10, 29, 0xa90, 29),
1969 	MUX(1, 139, 4, 0xa10, 30, 0xa90, 30),
1978 	MUX(1, 163, 6, 0xa10, 30, 0xa90, 30),
1987 	MUX(1, 96, 3, 0xa10, 30, 0xa90, 30),
1996 	MUX(1, 20, 2, 0xa00, 24, 0xa80, 24),
2005 	MUX(1, 109, 2, 0xa00, 24, 0xa80, 24),
2014 	MUX(1, 93, 3, 0xa00, 24, 0xa80, 24),
2023 	MUX(1, 19, 2, 0xa00, 23, 0xa80, 23),
2032 	MUX(1, 101, 2, 0xa00, 23, 0xa80, 23),
2041 	MUX(1, 91, 3, 0xa00, 23, 0xa80, 23),
2050 	MUX(1, 18, 2, 0xa00, 22, 0xa80, 22),
2059 	MUX(1, 111, 2, 0xa00, 22, 0xa80, 22),
2068 	MUX(1, 94, 3, 0xa00, 22, 0xa80, 22),
2077 	MUX(1, 21, 2, 0xa00, 25, 0xa80, 25),
2086 	MUX(1, 110, 2, 0xa00, 25, 0xa80, 25),
2095 	MUX(1, 92, 3, 0xa00, 25, 0xa80, 25),
2104 	MUX(0, 2, 6, N, N, N, N),
2113 	MUX(0, 0, 2, N, N, N, N),
2122 	MUX(0, 1, 2, N, N, N, N),
2131 	MUX(0, 3, 6, N, N, N, N),
2140 	MUX(0, 11, 1, 0xa08, 9, 0xa88, 9),
2149 	MUX(0, 2, 5, 0xa10, 9, 0xa90, 9),
2158 	MUX(0, 10, 1, N, N, N, N),
2167 	MUX(0, 3, 5, N, N, N, N),
2176 	MUX(1, 138, 2, 0xa00, 4, 0xa80, 4),
2185 	MUX(1, 147, 2, 0xa00, 4, 0xa80, 4),
2194 	MUX(0, 2, 2, 0xa00, 4, 0xa80, 4),
2203 	MUX(1, 162, 4, 0xa00, 4, 0xa80, 4),
2230 	MUX(0, 3, 2, N, N, N, N),
2351 	MUX(1, 79, 5, 0xa08, 6, 0xa88, 6),
2392 	MUX(1, 30, 2, 0xa08, 14, 0xa88, 14),
2402 	MUX(1, 78, 3, 0xa08, 14, 0xa88, 14),
2446 	MUX(1, 23, 1, 0xa00, 10, 0xa80, 10),
2458 	MUX(1, 80, 3, 0xa00, 10, 0xa80, 10),
2668 	MUX(1, 56, 7, 0xa08, 12, 0xa88, 12),
2687 	MUX(1, 112, 4, 0xa08, 10, 0xa88, 10),
2696 	MUX(1, 118, 4, 0xa08, 11, 0xa88, 11),
2747 	MUX(1, 29, 1, 0xa00, 6, 0xa80, 6),
2748 	MUX(1, 28, 1, 0xa00, 7, 0xa80, 7),
2749 	MUX(1, 26, 1, 0xa00, 8, 0xa80, 8),
2750 	MUX(1, 27, 1, 0xa00, 9, 0xa80, 9),
2759 	MUX(1, 77, 3, 0xa00, 6, 0xa80, 6),
2760 	MUX(1, 76, 3, 0xa00, 7, 0xa80, 7),
2761 	MUX(1, 74, 3, 0xa00, 8, 0xa80, 8),
2762 	MUX(1, 75, 3, 0xa00, 9, 0xa80, 9),
2827 	MUX(1, 91, 2, 0xa10, 12, 0xa90, 12),
2828 	MUX(1, 93, 2, 0xa10, 13, 0xa90, 13),
2829 	MUX(1, 94, 2, 0xa10, 14, 0xa90, 14),
2830 	MUX(1, 92, 2, 0xa10, 15, 0xa90, 15),
2839 	MUX(1, 95, 2, 0xa10, 16, 0xa90, 16),
2840 	MUX(1, 96, 2, 0xa10, 19, 0xa90, 19),
2849 	MUX(1, 61, 4, 0xa10, 17, 0xa90, 17),
2858 	MUX(1, 131, 4, 0xa10, 17, 0xa90, 17),
2867 	MUX(1, 129, 2, 0xa10, 17, 0xa90, 17),
2876 	MUX(1, 117, 7, 0xa10, 17, 0xa90, 17),
2885 	MUX(1, 83, 4, 0xa10, 17, 0xa90, 17),
2894 	MUX(1, 72, 4, 0xa10, 18, 0xa90, 18),
2903 	MUX(1, 132, 4, 0xa10, 18, 0xa90, 18),
2912 	MUX(1, 130, 2, 0xa10, 18, 0xa90, 18),
2921 	MUX(1, 118, 7, 0xa10, 18, 0xa90, 18),
2930 	MUX(1, 84, 4, 0xa10, 18, 0xa90, 18),
2939 	MUX(1, 125, 5, 0xa08, 2, 0xa88, 2),
2948 	MUX(0, 4, 3, 0xa08, 3, 0xa88, 3),
2957 	MUX(1, 163, 1, 0xa08, 3, 0xa88, 3),
2966 	MUX(0, 2, 3, 0xa10, 10, 0xa90, 10),
2975 	MUX(1, 160, 1, 0xa10, 10, 0xa90, 10),
2984 	MUX(0, 0, 3, 0xa10, 11, 0xa90, 11),
2993 	MUX(1, 161, 1, 0xa10, 11, 0xa90, 11),
3002 	MUX(0, 1, 3, 0xa10, 31, 0xa90, 31),
3011 	MUX(1, 162, 1, 0xa10, 31, 0xa90, 31),
3020 	MUX(0, 3, 3, N, N, N, N),
3039 	MUX(1, 144, 2, 0xa08, 8, 0xa88, 8),
3236 	MUX(0, 8, 1, N, N, N, N),
3245 	MUX(0, 6, 1, N, N, N, N),
3254 	MUX(0, 3, 4, N, N, N, N),
3263 	MUX(0, 9, 1, N, N, N, N),
3272 	MUX(0, 4, 1, 0xa08, 4, 0xa88, 4),
3281 	MUX(0, 7, 1, N, N, N, N),
3290 	MUX(0, 5, 1, 0xa08, 5, 0xa88, 5),
3299 	MUX(0, 0, 1, N, N, N, N),
3308 	MUX(0, 1, 1, N, N, N, N),
3317 	MUX(0, 2, 1, N, N, N, N),
3326 	MUX(0, 3, 1, N, N, N, N),
3580 	MUX(1, 111, 1, 0xa08, 13, 0xa88, 13),
3651 	MUX(1, 44, 3, 0xa00, 0, 0xa80, 0),
3652 	MUX(1, 43, 3, 0xa00, 1, 0xa80, 1),
3653 	MUX(1, 42, 3, 0xa00, 2, 0xa80, 2),
3654 	MUX(1, 41, 3, 0xa00, 3, 0xa80, 3),
3669 	MUX(1, 44, 3, 0xa00, 0, 0xa80, 0),
3670 	MUX(1, 43, 3, 0xa00, 1, 0xa80, 1),
3671 	MUX(1, 42, 3, 0xa00, 2, 0xa80, 2),
3672 	MUX(1, 41, 3, 0xa00, 3, 0xa80, 3),
3683 	MUX(1, 40, 4, 0xa00, 0, 0xa80, 0),
3684 	MUX(1, 39, 4, 0xa00, 1, 0xa80, 1),
3685 	MUX(1, 38, 4, 0xa00, 2, 0xa80, 2),
3686 	MUX(1, 37, 4, 0xa00, 3, 0xa80, 3),
3709 	MUX(1, 124, 2, 0xa08, 7, 0xa88, 7),
3718 	MUX(1, 161, 6, 0xa08, 7, 0xa88, 7),
3727 	MUX(1, 123, 2, 0xa10, 6, 0xa90, 6),
3736 	MUX(1, 163, 7, 0xa10, 6, 0xa90, 6),
3773 	MUX(1, 79, 4, 0xa00, 27, 0xa80, 27),
3774 	MUX(1, 78, 4, 0xa00, 26, 0xa80, 26),
3775 	MUX(1, 74, 4, 0xa00, 28, 0xa80, 28),
3776 	MUX(1, 75, 4, 0xa00, 29, 0xa80, 29),
3777 	MUX(1, 76, 4, 0xa00, 30, 0xa80, 30),
3778 	MUX(1, 77, 4, 0xa00, 31, 0xa80, 31),
3787 	MUX(1, 101, 3, 0xa00, 27, 0xa80, 27),
3788 	MUX(1, 99, 3, 0xa00, 26, 0xa80, 26),
3789 	MUX(1, 100, 3, 0xa00, 28, 0xa80, 28),
3790 	MUX(1, 110, 3, 0xa00, 29, 0xa80, 29),
3791 	MUX(1, 109, 3, 0xa00, 30, 0xa80, 30),
3792 	MUX(1, 111, 3, 0xa00, 31, 0xa80, 31),
3801 	MUX(0, 4, 2, N, N, N, N),
3810 	MUX(0, 12, 1, N, N, N, N),
3811 	MUX(0, 13, 1, N, N, N, N),
3812 	MUX(0, 14, 1, N, N, N, N),
3813 	MUX(0, 15, 1, N, N, N, N),
3814 	MUX(0, 16, 1, N, N, N, N),
3815 	MUX(0, 17, 1, N, N, N, N),
3894 	MUX(1, 132, 3, 0xa10, 2, 0xa90, 2),
3903 	MUX(1, 162, 2, 0xa10, 2, 0xa90, 2),
3930 	MUX(0, 11, 2, 0xa10, 5, 0xa90, 5),
3939 	MUX(1, 160, 2, 0xa10, 5, 0xa90, 5),
3948 	MUX(1, 130, 3, 0xa10, 5, 0xa90, 5),
3957 	MUX(0, 10, 2, N, N, N, N),
3984 	MUX(1, 125, 2, 0xa08, 0, 0xa88, 0),
3993 	MUX(1, 111, 4, 0xa08, 0, 0xa88, 0),
4002 	MUX(1, 140, 2, 0xa08, 0, 0xa88, 0),
4038 	MUX(1, 138, 1, 0xa00, 5, 0xa80, 5),
4047 	MUX(1, 84, 2, 0xa00, 5, 0xa80, 5),
4056 	MUX(1, 162, 3, 0xa00, 5, 0xa80, 5),
4102 	MUX(1, 122, 4, 0xa08, 1, 0xa88, 1),
4111 	MUX(1, 100, 4, 0xa08, 1, 0xa88, 1),
4120 	MUX(1, 117, 2, 0xa08, 1, 0xa88, 1),
4929 	return (pin >= ATLAS7_PINCTRL_BANK_0_PINS) ? 1 : 0;  in atlas7_pin_to_bank()
4956 	return 0;  in atlas7_pmx_get_func_groups()
4965 	 * So the regs bank is always 0.  in __atlas7_pmx_pin_input_disable_set()
5016 	pr_debug("bank:%d reg:0x%04x val:0x%08lx\n",  in __atlas7_pmx_pin_ad_sel()
5018 	return 0;  in __atlas7_pmx_pin_ad_sel()
5028 	return __atlas7_pmx_pin_ad_sel(pmx, conf, bank, 0);  in __atlas7_pmx_pin_analog_enable()
5036 		return 0;  in __atlas7_pmx_pin_digital_enable()
5086 	pr_debug("bank:%d reg:0x%04x val:0x%08lx\n",  in __atlas7_pmx_pin_enable()
5089 	return 0;  in __atlas7_pmx_pin_enable()
5113 			writel(0, pmx->sys2pci_base + SYS2PCI_SDIO9SEL);  in atlas7_pmx_set_mux()
5118 	for (idx = 0; idx < grp_mux->pad_mux_count; idx++) {  in atlas7_pmx_set_mux()
5134 	return 0;  in atlas7_pmx_set_mux()
5141 	for (idx = 0; idx < ARRAY_SIZE(atlas7_ma2ds_map); idx++) {  in convert_current_to_drive_strength()
5181 	return 0;  in altas7_pinctrl_set_pull_sel()
5203 	return 0;  in __altas7_pinctrl_set_drive_strength_sel()
5242 	for (idx = 0; idx < range->npins; idx++) {  in atlas7_pmx_gpio_request_enable()
5256 	return 0;  in atlas7_pmx_gpio_request_enable()
5290 	return 0;  in atlas7_pinctrl_get_group_pins()
5324 	for (idx = 0; idx < num_configs; idx++) {  in atlas7_pin_config_set()
5371 	return 0;  in atlas7_pin_config_set()
5385 	for (i = 0; i < npins; i++) {  in atlas7_pin_config_group_set()
5390 	return 0;  in atlas7_pin_config_group_set()
5420 	ret = of_address_to_resource(sys2pci_np, 0, &res);  in atlas7_pinmux_probe()
5439 	for (idx = 0; idx < banks; idx++) {  in atlas7_pinmux_probe()
5461 	return 0;  in atlas7_pinmux_probe()
5464 	for (idx = 0; idx < banks; idx++) {  in atlas7_pinmux_probe()
5485 	for (idx = 0; idx < pmx->pctl_desc.npins; idx++) {  in atlas7_pinmux_suspend_noirq()
5524 	for (idx = 0; idx < NUM_OF_IN_DISABLE_REG; idx++) {  in atlas7_pinmux_suspend_noirq()
5526 					IN_DISABLE_0_REG_SET + 0x8 * idx);  in atlas7_pinmux_suspend_noirq()
5528 					IN_DISABLE_VAL_0_REG_SET + 0x8 * idx);  in atlas7_pinmux_suspend_noirq()
5531 	return 0;  in atlas7_pinmux_suspend_noirq()
5540 	for (idx = 0; idx < pmx->pctl_desc.npins; idx++) {  in atlas7_pinmux_resume_noirq()
5545 		__atlas7_pmx_pin_enable(pmx, idx, (u32)status->func & 0xff);  in atlas7_pinmux_resume_noirq()
5552 						(u32)status->dstr & 0xff);  in atlas7_pinmux_resume_noirq()
5557 						(u32)status->pull & 0xff);  in atlas7_pinmux_resume_noirq()
5564 	for (idx = 0; idx < NUM_OF_IN_DISABLE_REG; idx++) {  in atlas7_pinmux_resume_noirq()
5565 		writel(~0, pmx->regs[BANK_DS] +  in atlas7_pinmux_resume_noirq()
5566 					IN_DISABLE_0_REG_CLR + 0x8 * idx);  in atlas7_pinmux_resume_noirq()
5568 					IN_DISABLE_0_REG_SET + 0x8 * idx);  in atlas7_pinmux_resume_noirq()
5569 		writel(~0, pmx->regs[BANK_DS] +  in atlas7_pinmux_resume_noirq()
5570 					IN_DISABLE_VAL_0_REG_CLR + 0x8 * idx);  in atlas7_pinmux_resume_noirq()
5572 					IN_DISABLE_VAL_0_REG_SET + 0x8 * idx);  in atlas7_pinmux_resume_noirq()
5575 	return 0;  in atlas7_pinmux_resume_noirq()
5764 	return 0;  in atlas7_gpio_irq_type()
5781 	int pin_in_bank = 0, idx;  in atlas7_gpio_handle_irq()
5785 	for (idx = 0; idx < a7gc->nbank; idx++) {  in atlas7_gpio_handle_irq()
5809 		if ((status & 0x1) && (ctrl & ATLAS7_GPIO_CTL_INTR_EN_MASK)) {  in atlas7_gpio_handle_irq()
5851 	if (ret < 0)  in atlas7_gpio_request()
5868 	return 0;  in atlas7_gpio_request()
5899 	return 0;  in atlas7_gpio_direction_input()
5936 	return 0;  in atlas7_gpio_direction_output()
6013 	a7gc->clk = of_clk_get(np, 0);  in atlas7_gpio_probe()
6024 	a7gc->reg = of_iomap(np, 0);  in atlas7_gpio_probe()
6058 	for (idx = 0; idx < nbank; idx++) {  in atlas7_gpio_probe()
6068 		if (ret <= 0) {  in atlas7_gpio_probe()
6092 	return 0;  in atlas7_gpio_probe()
6105 	for (idx = 0; idx < a7gc->nbank; idx++) {  in atlas7_gpio_suspend_noirq()
6107 		for (pin = 0; pin < bank->ngpio; pin++) {  in atlas7_gpio_suspend_noirq()
6113 	return 0;  in atlas7_gpio_suspend_noirq()
6123 	for (idx = 0; idx < a7gc->nbank; idx++) {  in atlas7_gpio_resume_noirq()
6125 		for (pin = 0; pin < bank->ngpio; pin++) {  in atlas7_gpio_resume_noirq()
6131 	return 0;  in atlas7_gpio_resume_noirq()