Lines Matching +full:gpio +full:- +full:r8a77470
1 // SPDX-License-Identifier: GPL-2.0
3 * Pin Control and GPIO driver for SuperH Pin Function Controller.
8 * Copyright (C) 2009 - 2012 Paul Mundt
11 #define DRV_NAME "sh-pfc"
47 return -EINVAL; in sh_pfc_map_resources()
54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources()
57 return -ENOMEM; in sh_pfc_map_resources()
59 pfc->num_windows = num_windows; in sh_pfc_map_resources()
60 pfc->windows = windows; in sh_pfc_map_resources()
63 irqs = devm_kcalloc(pfc->dev, num_irqs, sizeof(*irqs), in sh_pfc_map_resources()
66 return -ENOMEM; in sh_pfc_map_resources()
68 pfc->num_irqs = num_irqs; in sh_pfc_map_resources()
69 pfc->irqs = irqs; in sh_pfc_map_resources()
75 windows->phys = res->start; in sh_pfc_map_resources()
76 windows->size = resource_size(res); in sh_pfc_map_resources()
77 windows->virt = devm_ioremap_resource(pfc->dev, res); in sh_pfc_map_resources()
78 if (IS_ERR(windows->virt)) in sh_pfc_map_resources()
79 return -ENOMEM; in sh_pfc_map_resources()
95 for (i = 0; i < pfc->num_windows; i++) { in sh_pfc_phys_to_virt()
96 window = pfc->windows + i; in sh_pfc_phys_to_virt()
98 if (address < window->phys) in sh_pfc_phys_to_virt()
101 if (address >= (window->phys + window->size)) in sh_pfc_phys_to_virt()
104 return window->virt + (address - window->phys); in sh_pfc_phys_to_virt()
116 for (i = 0, offset = 0; i < pfc->nr_ranges; ++i) { in sh_pfc_get_pin_index()
117 const struct sh_pfc_pin_range *range = &pfc->ranges[i]; in sh_pfc_get_pin_index()
119 if (pin <= range->end) in sh_pfc_get_pin_index()
120 return pin >= range->start in sh_pfc_get_pin_index()
121 ? offset + pin - range->start : -1; in sh_pfc_get_pin_index()
123 offset += range->end - range->start + 1; in sh_pfc_get_pin_index()
126 return -EINVAL; in sh_pfc_get_pin_index()
131 if (enum_id < r->begin) in sh_pfc_enum_in_range()
134 if (enum_id > r->end) in sh_pfc_enum_in_range()
180 if (pfc->info->unlock_reg) in sh_pfc_write()
182 sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32, in sh_pfc_write()
196 *mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg); in sh_pfc_config_reg_helper()
198 if (crp->field_width) { in sh_pfc_config_reg_helper()
199 *maskp = (1 << crp->field_width) - 1; in sh_pfc_config_reg_helper()
200 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); in sh_pfc_config_reg_helper()
202 *maskp = (1 << crp->var_field_width[in_pos]) - 1; in sh_pfc_config_reg_helper()
203 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
205 *posp -= crp->var_field_width[k]; in sh_pfc_config_reg_helper()
219 dev_dbg(pfc->dev, "write_reg addr = %x, value = 0x%x, field = %u, " in sh_pfc_write_config_reg()
221 crp->reg, value, field, crp->reg_width, hweight32(mask)); in sh_pfc_write_config_reg()
226 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
230 if (pfc->info->unlock_reg) in sh_pfc_write_config_reg()
232 sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32, in sh_pfc_write_config_reg()
235 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); in sh_pfc_write_config_reg()
246 pfc->info->cfg_regs + k; in sh_pfc_get_config_reg()
247 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
248 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
264 curr_width = config_reg->var_field_width[m]; in sh_pfc_get_config_reg()
268 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
281 return -EINVAL; in sh_pfc_get_config_reg()
287 const u16 *data = pfc->info->pinmux_data; in sh_pfc_mark_to_enum()
295 for (k = 0; k < pfc->info->pinmux_data_size; k++) { in sh_pfc_mark_to_enum()
302 dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n", in sh_pfc_mark_to_enum()
304 return -EINVAL; in sh_pfc_mark_to_enum()
319 range = &pfc->info->output; in sh_pfc_config_mux()
323 range = &pfc->info->input; in sh_pfc_config_mux()
327 return -EINVAL; in sh_pfc_config_mux()
350 in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function); in sh_pfc_config_mux()
365 * input-only or output-only pins without in sh_pfc_config_mux()
368 if (in_range && enum_id == range->force) in sh_pfc_config_mux()
393 for (i = 0; pfc->info->bias_regs[i].puen; i++) { in sh_pfc_pin_to_bias_reg()
394 for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) { in sh_pfc_pin_to_bias_reg()
395 if (pfc->info->bias_regs[i].pins[j] == pin) { in sh_pfc_pin_to_bias_reg()
397 return &pfc->info->bias_regs[i]; in sh_pfc_pin_to_bias_reg()
413 if (pfc->info->pins[0].pin == (u16)-1) { in sh_pfc_init_ranges()
414 /* Pin number -1 denotes that the SoC doesn't report pin numbers in sh_pfc_init_ranges()
418 pfc->nr_ranges = 1; in sh_pfc_init_ranges()
419 pfc->ranges = devm_kzalloc(pfc->dev, sizeof(*pfc->ranges), in sh_pfc_init_ranges()
421 if (pfc->ranges == NULL) in sh_pfc_init_ranges()
422 return -ENOMEM; in sh_pfc_init_ranges()
424 pfc->ranges->start = 0; in sh_pfc_init_ranges()
425 pfc->ranges->end = pfc->info->nr_pins - 1; in sh_pfc_init_ranges()
426 pfc->nr_gpio_pins = pfc->info->nr_pins; in sh_pfc_init_ranges()
432 * be sorted by pin numbers, and pins without a GPIO port must come in sh_pfc_init_ranges()
435 for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) { in sh_pfc_init_ranges()
436 if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1) in sh_pfc_init_ranges()
440 pfc->nr_ranges = nr_ranges; in sh_pfc_init_ranges()
441 pfc->ranges = devm_kcalloc(pfc->dev, nr_ranges, sizeof(*pfc->ranges), in sh_pfc_init_ranges()
443 if (pfc->ranges == NULL) in sh_pfc_init_ranges()
444 return -ENOMEM; in sh_pfc_init_ranges()
446 range = pfc->ranges; in sh_pfc_init_ranges()
447 range->start = pfc->info->pins[0].pin; in sh_pfc_init_ranges()
449 for (i = 1; i < pfc->info->nr_pins; ++i) { in sh_pfc_init_ranges()
450 if (pfc->info->pins[i-1].pin == pfc->info->pins[i].pin - 1) in sh_pfc_init_ranges()
453 range->end = pfc->info->pins[i-1].pin; in sh_pfc_init_ranges()
454 if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO)) in sh_pfc_init_ranges()
455 pfc->nr_gpio_pins = range->end + 1; in sh_pfc_init_ranges()
458 range->start = pfc->info->pins[i].pin; in sh_pfc_init_ranges()
461 range->end = pfc->info->pins[i-1].pin; in sh_pfc_init_ranges()
462 if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO)) in sh_pfc_init_ranges()
463 pfc->nr_gpio_pins = range->end + 1; in sh_pfc_init_ranges()
472 .compatible = "renesas,pfc-emev2",
478 .compatible = "renesas,pfc-r8a73a4",
484 .compatible = "renesas,pfc-r8a7740",
490 .compatible = "renesas,pfc-r8a7742",
496 .compatible = "renesas,pfc-r8a7743",
502 .compatible = "renesas,pfc-r8a7744",
508 .compatible = "renesas,pfc-r8a7745",
514 .compatible = "renesas,pfc-r8a77470",
520 .compatible = "renesas,pfc-r8a774a1",
526 .compatible = "renesas,pfc-r8a774b1",
532 .compatible = "renesas,pfc-r8a774c0",
538 .compatible = "renesas,pfc-r8a774e1",
544 .compatible = "renesas,pfc-r8a7778",
550 .compatible = "renesas,pfc-r8a7779",
556 .compatible = "renesas,pfc-r8a7790",
562 .compatible = "renesas,pfc-r8a7791",
568 .compatible = "renesas,pfc-r8a7792",
574 .compatible = "renesas,pfc-r8a7793",
580 .compatible = "renesas,pfc-r8a7794",
587 .compatible = "renesas,pfc-r8a7795",
593 .compatible = "renesas,pfc-r8a7795",
599 .compatible = "renesas,pfc-r8a7796",
605 .compatible = "renesas,pfc-r8a77961",
611 .compatible = "renesas,pfc-r8a77965",
617 .compatible = "renesas,pfc-r8a77970",
623 .compatible = "renesas,pfc-r8a77980",
629 .compatible = "renesas,pfc-r8a77990",
635 .compatible = "renesas,pfc-r8a77995",
641 .compatible = "renesas,pfc-sh73a0",
656 pfc->saved_regs[idx] = sh_pfc_read(pfc, reg); in sh_pfc_save_reg()
661 sh_pfc_write(pfc, reg, pfc->saved_regs[idx]); in sh_pfc_restore_reg()
669 if (pfc->info->cfg_regs) in sh_pfc_walk_regs()
670 for (i = 0; pfc->info->cfg_regs[i].reg; i++) in sh_pfc_walk_regs()
671 do_reg(pfc, pfc->info->cfg_regs[i].reg, n++); in sh_pfc_walk_regs()
673 if (pfc->info->drive_regs) in sh_pfc_walk_regs()
674 for (i = 0; pfc->info->drive_regs[i].reg; i++) in sh_pfc_walk_regs()
675 do_reg(pfc, pfc->info->drive_regs[i].reg, n++); in sh_pfc_walk_regs()
677 if (pfc->info->bias_regs) in sh_pfc_walk_regs()
678 for (i = 0; pfc->info->bias_regs[i].puen; i++) { in sh_pfc_walk_regs()
679 do_reg(pfc, pfc->info->bias_regs[i].puen, n++); in sh_pfc_walk_regs()
680 if (pfc->info->bias_regs[i].pud) in sh_pfc_walk_regs()
681 do_reg(pfc, pfc->info->bias_regs[i].pud, n++); in sh_pfc_walk_regs()
684 if (pfc->info->ioctrl_regs) in sh_pfc_walk_regs()
685 for (i = 0; pfc->info->ioctrl_regs[i].reg; i++) in sh_pfc_walk_regs()
686 do_reg(pfc, pfc->info->ioctrl_regs[i].reg, n++); in sh_pfc_walk_regs()
703 pfc->saved_regs = devm_kmalloc_array(pfc->dev, n, in sh_pfc_suspend_init()
704 sizeof(*pfc->saved_regs), in sh_pfc_suspend_init()
706 if (!pfc->saved_regs) in sh_pfc_suspend_init()
707 return -ENOMEM; in sh_pfc_suspend_init()
709 dev_dbg(pfc->dev, "Allocated space to save %u regs\n", n); in sh_pfc_suspend_init()
717 if (pfc->saved_regs) in sh_pfc_suspend_noirq()
726 if (pfc->saved_regs) in sh_pfc_resume_noirq()
805 return -EINVAL; in sh_pfc_check_enum()
832 const char *drvname = info->name; in sh_pfc_check_pin()
838 for (i = 0; i < info->nr_pins; i++) { in sh_pfc_check_pin()
839 if (pin == info->pins[i].pin) in sh_pfc_check_pin()
851 sh_pfc_check_reg(drvname, cfg_reg->reg); in sh_pfc_check_cfg_reg()
853 if (cfg_reg->field_width) { in sh_pfc_check_cfg_reg()
854 n = cfg_reg->reg_width / cfg_reg->field_width; in sh_pfc_check_cfg_reg()
859 for (i = 0, n = 0, rw = 0; (fw = cfg_reg->var_field_width[i]); i++) { in sh_pfc_check_cfg_reg()
860 if (fw > 3 && is0s(&cfg_reg->enum_ids[n], 1 << fw)) in sh_pfc_check_cfg_reg()
862 cfg_reg->reg, rw, rw + fw - 1); in sh_pfc_check_cfg_reg()
867 if (rw != cfg_reg->reg_width) in sh_pfc_check_cfg_reg()
869 cfg_reg->reg, rw, cfg_reg->reg_width); in sh_pfc_check_cfg_reg()
871 if (n != cfg_reg->nr_enum_ids) in sh_pfc_check_cfg_reg()
873 cfg_reg->reg, cfg_reg->nr_enum_ids, n); in sh_pfc_check_cfg_reg()
876 sh_pfc_check_reg_enums(drvname, cfg_reg->reg, cfg_reg->enum_ids, n); in sh_pfc_check_cfg_reg()
882 const char *drvname = info->name; in sh_pfc_check_drive_reg()
886 sh_pfc_check_reg(info->name, drive->reg); in sh_pfc_check_drive_reg()
887 for (i = 0; i < ARRAY_SIZE(drive->fields); i++) { in sh_pfc_check_drive_reg()
888 const struct pinmux_drive_reg_field *field = &drive->fields[i]; in sh_pfc_check_drive_reg()
890 if (!field->pin && !field->offset && !field->size) in sh_pfc_check_drive_reg()
893 mask = GENMASK(field->offset + field->size, field->offset); in sh_pfc_check_drive_reg()
896 drive->reg, i); in sh_pfc_check_drive_reg()
899 sh_pfc_check_pin(info, drive->reg, field->pin); in sh_pfc_check_drive_reg()
908 sh_pfc_check_reg(info->name, bias->puen); in sh_pfc_check_bias_reg()
909 if (bias->pud) in sh_pfc_check_bias_reg()
910 sh_pfc_check_reg(info->name, bias->pud); in sh_pfc_check_bias_reg()
911 for (i = 0; i < ARRAY_SIZE(bias->pins); i++) in sh_pfc_check_bias_reg()
912 sh_pfc_check_pin(info, bias->puen, bias->pins[i]); in sh_pfc_check_bias_reg()
917 const char *drvname = info->name; in sh_pfc_check_info()
926 for (i = 0; i < info->nr_pins; i++) { in sh_pfc_check_info()
927 const struct sh_pfc_pin *pin = &info->pins[i]; in sh_pfc_check_info()
929 if (!pin->name) { in sh_pfc_check_info()
934 const struct sh_pfc_pin *pin2 = &info->pins[j]; in sh_pfc_check_info()
936 if (same_name(pin->name, pin2->name)) in sh_pfc_check_info()
938 pin->name); in sh_pfc_check_info()
940 if (pin->pin != (u16)-1 && pin->pin == pin2->pin) in sh_pfc_check_info()
942 pin->name, pin2->name, pin->pin); in sh_pfc_check_info()
944 if (pin->enum_id && pin->enum_id == pin2->enum_id) in sh_pfc_check_info()
946 pin->name, pin2->name, in sh_pfc_check_info()
947 pin->enum_id); in sh_pfc_check_info()
952 refcnts = kcalloc(info->nr_groups, sizeof(*refcnts), GFP_KERNEL); in sh_pfc_check_info()
956 for (i = 0; i < info->nr_functions; i++) { in sh_pfc_check_info()
957 const struct sh_pfc_function *func = &info->functions[i]; in sh_pfc_check_info()
959 if (!func->name) { in sh_pfc_check_info()
964 if (same_name(func->name, info->functions[j].name)) in sh_pfc_check_info()
966 func->name); in sh_pfc_check_info()
968 for (j = 0; j < func->nr_groups; j++) { in sh_pfc_check_info()
969 for (k = 0; k < info->nr_groups; k++) { in sh_pfc_check_info()
970 if (same_name(func->groups[j], in sh_pfc_check_info()
971 info->groups[k].name)) { in sh_pfc_check_info()
977 if (k == info->nr_groups) in sh_pfc_check_info()
979 func->name, func->groups[j]); in sh_pfc_check_info()
983 for (i = 0; i < info->nr_groups; i++) { in sh_pfc_check_info()
984 const struct sh_pfc_pin_group *group = &info->groups[i]; in sh_pfc_check_info()
986 if (!group->name) { in sh_pfc_check_info()
991 if (same_name(group->name, info->groups[j].name)) in sh_pfc_check_info()
993 group->name); in sh_pfc_check_info()
996 sh_pfc_err("orphan group %s\n", group->name); in sh_pfc_check_info()
999 group->name, refcnts[i]); in sh_pfc_check_info()
1005 for (i = 0; info->cfg_regs && info->cfg_regs[i].reg; i++) in sh_pfc_check_info()
1006 sh_pfc_check_cfg_reg(drvname, &info->cfg_regs[i]); in sh_pfc_check_info()
1009 for (i = 0; info->drive_regs && info->drive_regs[i].reg; i++) in sh_pfc_check_info()
1010 sh_pfc_check_drive_reg(info, &info->drive_regs[i]); in sh_pfc_check_info()
1013 for (i = 0; info->bias_regs && info->bias_regs[i].puen; i++) in sh_pfc_check_info()
1014 sh_pfc_check_bias_reg(info, &info->bias_regs[i]); in sh_pfc_check_info()
1017 for (i = 0; info->ioctrl_regs && info->ioctrl_regs[i].reg; i++) in sh_pfc_check_info()
1018 sh_pfc_check_reg(drvname, info->ioctrl_regs[i].reg); in sh_pfc_check_info()
1021 for (i = 0; info->data_regs && info->data_regs[i].reg; i++) { in sh_pfc_check_info()
1022 sh_pfc_check_reg(drvname, info->data_regs[i].reg); in sh_pfc_check_info()
1023 sh_pfc_check_reg_enums(drvname, info->data_regs[i].reg, in sh_pfc_check_info()
1024 info->data_regs[i].enum_ids, in sh_pfc_check_info()
1025 info->data_regs[i].reg_width); in sh_pfc_check_info()
1030 for (i = 0; i < info->nr_func_gpios; i++) { in sh_pfc_check_info()
1031 const struct pinmux_func *func = &info->func_gpios[i]; in sh_pfc_check_info()
1033 if (!func->name) { in sh_pfc_check_info()
1034 sh_pfc_err("empty function gpio %u\n", i); in sh_pfc_check_info()
1038 if (same_name(func->name, info->func_gpios[j].name)) in sh_pfc_check_info()
1040 func->name); in sh_pfc_check_info()
1042 if (sh_pfc_check_enum(drvname, func->enum_id)) in sh_pfc_check_info()
1043 sh_pfc_err("%s enum_id %u conflict\n", func->name, in sh_pfc_check_info()
1044 func->enum_id); in sh_pfc_check_info()
1065 for (i = 0; pdrv->id_table[i].name[0]; i++) in sh_pfc_check_driver()
1066 sh_pfc_check_info((void *)pdrv->id_table[i].driver_data); in sh_pfc_check_driver()
1069 for (i = 0; pdrv->driver.of_match_table[i].compatible[0]; i++) in sh_pfc_check_driver()
1070 sh_pfc_check_info(pdrv->driver.of_match_table[i].data); in sh_pfc_check_driver()
1106 return match->data ?: ERR_PTR(-ENODEV); in sh_pfc_quirk_match()
1120 if (pdev->dev.of_node) { in sh_pfc_probe()
1126 info = of_device_get_match_data(&pdev->dev); in sh_pfc_probe()
1129 info = (const void *)platform_get_device_id(pdev)->driver_data; in sh_pfc_probe()
1131 pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL); in sh_pfc_probe()
1133 return -ENOMEM; in sh_pfc_probe()
1135 pfc->info = info; in sh_pfc_probe()
1136 pfc->dev = &pdev->dev; in sh_pfc_probe()
1142 spin_lock_init(&pfc->lock); in sh_pfc_probe()
1144 if (info->ops && info->ops->init) { in sh_pfc_probe()
1145 ret = info->ops->init(pfc); in sh_pfc_probe()
1149 /* .init() may have overridden pfc->info */ in sh_pfc_probe()
1150 info = pfc->info; in sh_pfc_probe()
1174 * Then the GPIO chip in sh_pfc_probe()
1179 * If the GPIO chip fails to come up we still leave the in sh_pfc_probe()
1183 dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n"); in sh_pfc_probe()
1189 dev_info(pfc->dev, "%s support registered\n", info->name); in sh_pfc_probe()
1196 { "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
1199 { "pfc-sh7264", (kernel_ulong_t)&sh7264_pinmux_info },
1202 { "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
1205 { "pfc-sh7720", (kernel_ulong_t)&sh7720_pinmux_info },
1208 { "pfc-sh7722", (kernel_ulong_t)&sh7722_pinmux_info },
1211 { "pfc-sh7723", (kernel_ulong_t)&sh7723_pinmux_info },
1214 { "pfc-sh7724", (kernel_ulong_t)&sh7724_pinmux_info },
1217 { "pfc-sh7734", (kernel_ulong_t)&sh7734_pinmux_info },
1220 { "pfc-sh7757", (kernel_ulong_t)&sh7757_pinmux_info },
1223 { "pfc-sh7785", (kernel_ulong_t)&sh7785_pinmux_info },
1226 { "pfc-sh7786", (kernel_ulong_t)&sh7786_pinmux_info },
1229 { "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },