69 static u32 owl_read_field(struct owl_pinctrl *pctrl, u32 reg,  in owl_read_field()  argument
74 	tmp = readl_relaxed(pctrl->base + reg);  in owl_read_field()
80 static void owl_write_field(struct owl_pinctrl *pctrl, u32 reg, u32 arg,  in owl_write_field()  argument
88 	owl_update_bits(pctrl->base + reg, mask, (arg << bit));  in owl_write_field()
93 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_groups_count()  local
95 	return pctrl->soc->ngroups;  in owl_get_groups_count()
101 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_group_name()  local
103 	return pctrl->soc->groups[group].name;  in owl_get_group_name()
111 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_group_pins()  local
113 	*pins = pctrl->soc->groups[group].pads;  in owl_get_group_pins()
114 	*num_pins = pctrl->soc->groups[group].npads;  in owl_get_group_pins()
123 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_pin_dbg_show()  local
125 	seq_printf(s, "%s", dev_name(pctrl->dev));  in owl_pin_dbg_show()
139 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_funcs_count()  local
141 	return pctrl->soc->nfunctions;  in owl_get_funcs_count()
147 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_func_name()  local
149 	return pctrl->soc->functions[function].name;  in owl_get_func_name()
157 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_func_groups()  local
159 	*groups = pctrl->soc->functions[function].groups;  in owl_get_func_groups()
160 	*num_groups = pctrl->soc->functions[function].ngroups;  in owl_get_func_groups()
196 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_set_mux()  local
201 	g = &pctrl->soc->groups[group];  in owl_set_mux()
206 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_set_mux()
208 	owl_update_bits(pctrl->base + g->mfpctl_reg, mask, val);  in owl_set_mux()
210 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_set_mux()
258 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_pin_config_get()  local
263 	info = &pctrl->soc->padinfo[pin];  in owl_pin_config_get()
269 	arg = owl_read_field(pctrl, reg, bit, width);  in owl_pin_config_get()
271 	if (!pctrl->soc->padctl_val2arg)  in owl_pin_config_get()
274 	ret = pctrl->soc->padctl_val2arg(info, param, &arg);  in owl_pin_config_get()
288 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_pin_config_set()  local
295 	info = &pctrl->soc->padinfo[pin];  in owl_pin_config_set()
305 		if (!pctrl->soc->padctl_arg2val)  in owl_pin_config_set()
308 		ret = pctrl->soc->padctl_arg2val(info, param, &arg);  in owl_pin_config_set()
312 		raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_pin_config_set()
314 		owl_write_field(pctrl, reg, arg, bit, width);  in owl_pin_config_set()
316 		raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_pin_config_set()
427 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_group_config_get()  local
432 	g = &pctrl->soc->groups[group];  in owl_group_config_get()
438 	arg = owl_read_field(pctrl, reg, bit, width);  in owl_group_config_get()
456 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_group_config_set()  local
462 	g = &pctrl->soc->groups[group];  in owl_group_config_set()
477 		raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_group_config_set()
479 		owl_write_field(pctrl, reg, arg, bit, width);  in owl_group_config_set()
481 		raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_group_config_set()
503 owl_gpio_get_port(struct owl_pinctrl *pctrl, unsigned int *pin)  in owl_gpio_get_port()  argument
507 	for (i = 0; i < pctrl->soc->nports; i++) {  in owl_gpio_get_port()
508 		const struct owl_gpio_port *port = &pctrl->soc->ports[i];  in owl_gpio_get_port()
537 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_request()  local
542 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_request()
546 	gpio_base = pctrl->base + port->offset;  in owl_gpio_request()
552 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_request()
554 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_request()
561 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_free()  local
566 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_free()
570 	gpio_base = pctrl->base + port->offset;  in owl_gpio_free()
572 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_free()
578 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_free()
583 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_get()  local
589 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_get()
593 	gpio_base = pctrl->base + port->offset;  in owl_gpio_get()
595 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_get()
597 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_get()
604 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_set()  local
609 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_set()
613 	gpio_base = pctrl->base + port->offset;  in owl_gpio_set()
615 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_set()
617 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_set()
622 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_direction_input()  local
627 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_direction_input()
631 	gpio_base = pctrl->base + port->offset;  in owl_gpio_direction_input()
633 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_direction_input()
636 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_direction_input()
644 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_direction_output()  local
649 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_direction_output()
653 	gpio_base = pctrl->base + port->offset;  in owl_gpio_direction_output()
655 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_direction_output()
659 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_direction_output()
664 static void irq_set_type(struct owl_pinctrl *pctrl, int gpio, unsigned int type)  in irq_set_type()  argument
679 		if (owl_gpio_get(&pctrl->chip, gpio))  in irq_set_type()
705 	port = owl_gpio_get_port(pctrl, &gpio);  in irq_set_type()
709 	gpio_base = pctrl->base + port->offset;  in irq_set_type()
711 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in irq_set_type()
719 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in irq_set_type()
725 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_mask()  local
732 	port = owl_gpio_get_port(pctrl, &gpio);  in owl_gpio_irq_mask()
736 	gpio_base = pctrl->base + port->offset;  in owl_gpio_irq_mask()
738 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_irq_mask()
748 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_irq_mask()
754 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_unmask()  local
761 	port = owl_gpio_get_port(pctrl, &gpio);  in owl_gpio_irq_unmask()
765 	gpio_base = pctrl->base + port->offset;  in owl_gpio_irq_unmask()
766 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_irq_unmask()
777 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_irq_unmask()
783 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_ack()  local
795 			irq_set_type(pctrl, gpio, IRQ_TYPE_EDGE_FALLING);  in owl_gpio_irq_ack()
797 			irq_set_type(pctrl, gpio, IRQ_TYPE_EDGE_RISING);  in owl_gpio_irq_ack()
800 	port = owl_gpio_get_port(pctrl, &gpio);  in owl_gpio_irq_ack()
804 	gpio_base = pctrl->base + port->offset;  in owl_gpio_irq_ack()
806 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_irq_ack()
811 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_irq_ack()
817 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_set_type()  local
824 	irq_set_type(pctrl, data->hwirq, type);  in owl_gpio_irq_set_type()
831 	struct owl_pinctrl *pctrl = irq_desc_get_handler_data(desc);  in owl_gpio_irq_handler()  local
833 	struct irq_domain *domain = pctrl->chip.irq.domain;  in owl_gpio_irq_handler()
842 	for (i = 0; i < pctrl->soc->nports; i++) {  in owl_gpio_irq_handler()
843 		port = &pctrl->soc->ports[i];  in owl_gpio_irq_handler()
844 		base = pctrl->base + port->offset;  in owl_gpio_irq_handler()
847 		if (parent != pctrl->irq[i])  in owl_gpio_irq_handler()
867 static int owl_gpio_init(struct owl_pinctrl *pctrl)  in owl_gpio_init()  argument
873 	chip = &pctrl->chip;  in owl_gpio_init()
875 	chip->ngpio = pctrl->soc->ngpios;  in owl_gpio_init()
876 	chip->label = dev_name(pctrl->dev);  in owl_gpio_init()
877 	chip->parent = pctrl->dev;  in owl_gpio_init()
879 	chip->of_node = pctrl->dev->of_node;  in owl_gpio_init()
881 	pctrl->irq_chip.name = chip->of_node->name;  in owl_gpio_init()
882 	pctrl->irq_chip.irq_ack = owl_gpio_irq_ack;  in owl_gpio_init()
883 	pctrl->irq_chip.irq_mask = owl_gpio_irq_mask;  in owl_gpio_init()
884 	pctrl->irq_chip.irq_unmask = owl_gpio_irq_unmask;  in owl_gpio_init()
885 	pctrl->irq_chip.irq_set_type = owl_gpio_irq_set_type;  in owl_gpio_init()
888 	gpio_irq->chip = &pctrl->irq_chip;  in owl_gpio_init()
892 	gpio_irq->parent_handler_data = pctrl;  in owl_gpio_init()
893 	gpio_irq->num_parents = pctrl->num_irq;  in owl_gpio_init()
894 	gpio_irq->parents = pctrl->irq;  in owl_gpio_init()
896 	gpio_irq->map = devm_kcalloc(pctrl->dev, chip->ngpio,  in owl_gpio_init()
901 	for (i = 0, offset = 0; i < pctrl->soc->nports; i++) {  in owl_gpio_init()
902 		const struct owl_gpio_port *port = &pctrl->soc->ports[i];  in owl_gpio_init()
910 	ret = gpiochip_add_data(&pctrl->chip, pctrl);  in owl_gpio_init()
912 		dev_err(pctrl->dev, "failed to register gpiochip\n");  in owl_gpio_init()
922 	struct owl_pinctrl *pctrl;  in owl_pinctrl_probe()  local
925 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in owl_pinctrl_probe()
926 	if (!pctrl)  in owl_pinctrl_probe()
929 	pctrl->base = devm_platform_ioremap_resource(pdev, 0);  in owl_pinctrl_probe()
930 	if (IS_ERR(pctrl->base))  in owl_pinctrl_probe()
931 		return PTR_ERR(pctrl->base);  in owl_pinctrl_probe()
934 	pctrl->clk = devm_clk_get(&pdev->dev, NULL);  in owl_pinctrl_probe()
935 	if (IS_ERR(pctrl->clk)) {  in owl_pinctrl_probe()
937 		return PTR_ERR(pctrl->clk);  in owl_pinctrl_probe()
940 	ret = clk_prepare_enable(pctrl->clk);  in owl_pinctrl_probe()
946 	raw_spin_lock_init(&pctrl->lock);  in owl_pinctrl_probe()
952 	pctrl->chip.direction_input  = owl_gpio_direction_input;  in owl_pinctrl_probe()
953 	pctrl->chip.direction_output = owl_gpio_direction_output;  in owl_pinctrl_probe()
954 	pctrl->chip.get = owl_gpio_get;  in owl_pinctrl_probe()
955 	pctrl->chip.set = owl_gpio_set;  in owl_pinctrl_probe()
956 	pctrl->chip.request = owl_gpio_request;  in owl_pinctrl_probe()
957 	pctrl->chip.free = owl_gpio_free;  in owl_pinctrl_probe()
959 	pctrl->soc = soc_data;  in owl_pinctrl_probe()
960 	pctrl->dev = &pdev->dev;  in owl_pinctrl_probe()
962 	pctrl->pctrldev = devm_pinctrl_register(&pdev->dev,  in owl_pinctrl_probe()
963 					&owl_pinctrl_desc, pctrl);  in owl_pinctrl_probe()
964 	if (IS_ERR(pctrl->pctrldev)) {  in owl_pinctrl_probe()
966 		ret = PTR_ERR(pctrl->pctrldev);  in owl_pinctrl_probe()
974 	pctrl->num_irq = ret;  in owl_pinctrl_probe()
976 	pctrl->irq = devm_kcalloc(&pdev->dev, pctrl->num_irq,  in owl_pinctrl_probe()
977 					sizeof(*pctrl->irq), GFP_KERNEL);  in owl_pinctrl_probe()
978 	if (!pctrl->irq) {  in owl_pinctrl_probe()
983 	for (i = 0; i < pctrl->num_irq ; i++) {  in owl_pinctrl_probe()
987 		pctrl->irq[i] = ret;  in owl_pinctrl_probe()
990 	ret = owl_gpio_init(pctrl);  in owl_pinctrl_probe()
994 	platform_set_drvdata(pdev, pctrl);  in owl_pinctrl_probe()
999 	clk_disable_unprepare(pctrl->clk);  in owl_pinctrl_probe()