Lines Matching +full:sata +full:- +full:port
1 // SPDX-License-Identifier: GPL-2.0-or-later
27 /* The older SATA PHY registers duplicated per port registers within the map,
28 * rather than having a separate map per port.
189 static inline void __iomem *brcm_sata_ctrl_base(struct brcm_sata_port *port) in brcm_sata_ctrl_base() argument
191 struct brcm_sata_phy *priv = port->phy_priv; in brcm_sata_ctrl_base()
194 switch (priv->version) { in brcm_sata_ctrl_base()
199 dev_err(priv->dev, "invalid phy version\n"); in brcm_sata_ctrl_base()
203 return priv->ctrl_base + (port->portnum * size); in brcm_sata_ctrl_base()
206 static void brcm_sata_phy_wr(struct brcm_sata_port *port, u32 bank, in brcm_sata_phy_wr() argument
209 struct brcm_sata_phy *priv = port->phy_priv; in brcm_sata_phy_wr()
210 void __iomem *pcb_base = priv->phy_base; in brcm_sata_phy_wr()
213 if (priv->version == BRCM_SATA_PHY_STB_40NM) in brcm_sata_phy_wr()
214 bank += (port->portnum * SATA_PCB_REG_40NM_SPACE_SIZE); in brcm_sata_phy_wr()
216 pcb_base += (port->portnum * SATA_PCB_REG_28NM_SPACE_SIZE); in brcm_sata_phy_wr()
224 static u32 brcm_sata_phy_rd(struct brcm_sata_port *port, u32 bank, u32 ofs) in brcm_sata_phy_rd() argument
226 struct brcm_sata_phy *priv = port->phy_priv; in brcm_sata_phy_rd()
227 void __iomem *pcb_base = priv->phy_base; in brcm_sata_phy_rd()
229 if (priv->version == BRCM_SATA_PHY_STB_40NM) in brcm_sata_phy_rd()
230 bank += (port->portnum * SATA_PCB_REG_40NM_SPACE_SIZE); in brcm_sata_phy_rd()
232 pcb_base += (port->portnum * SATA_PCB_REG_28NM_SPACE_SIZE); in brcm_sata_phy_rd()
243 static void brcm_stb_sata_ssc_init(struct brcm_sata_port *port) in brcm_stb_sata_ssc_init() argument
245 struct brcm_sata_phy *priv = port->phy_priv; in brcm_stb_sata_ssc_init()
250 brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_CONTROL1, ~tmp, tmp); in brcm_stb_sata_ssc_init()
253 brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL2, in brcm_stb_sata_ssc_init()
258 if (port->ssc_en) { in brcm_stb_sata_ssc_init()
259 dev_info(priv->dev, "enabling SSC on port%d\n", port->portnum); in brcm_stb_sata_ssc_init()
265 brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL3, in brcm_stb_sata_ssc_init()
272 static int brcm_stb_sata_rxaeq_init(struct brcm_sata_port *port) in brcm_stb_sata_rxaeq_init() argument
276 switch (port->rxaeq_mode) { in brcm_stb_sata_rxaeq_init()
288 if (port->rxaeq_val > AEQ_FRC_EQ_VAL_MASK) in brcm_stb_sata_rxaeq_init()
289 return -EINVAL; in brcm_stb_sata_rxaeq_init()
290 tmp |= port->rxaeq_val << AEQ_FRC_EQ_VAL_SHIFT; in brcm_stb_sata_rxaeq_init()
294 brcm_sata_phy_wr(port, AEQRX_REG_BANK_0, reg, ~tmp, tmp); in brcm_stb_sata_rxaeq_init()
295 brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, reg, ~tmp, tmp); in brcm_stb_sata_rxaeq_init()
300 static int brcm_stb_sata_init(struct brcm_sata_port *port) in brcm_stb_sata_init() argument
302 brcm_stb_sata_ssc_init(port); in brcm_stb_sata_init()
304 return brcm_stb_sata_rxaeq_init(port); in brcm_stb_sata_init()
307 static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) in brcm_stb_sata_16nm_ssc_init() argument
312 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0x141); in brcm_stb_sata_16nm_ssc_init()
315 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL8, 0, 0xc006); in brcm_stb_sata_16nm_ssc_init()
319 brcm_sata_phy_wr(port, AEQRX_REG_BANK_0, AEQ_FRC_EQ, in brcm_stb_sata_16nm_ssc_init()
325 if (port->ssc_en) in brcm_stb_sata_16nm_ssc_init()
329 brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CONTROL1, in brcm_stb_sata_16nm_ssc_init()
336 if (port->ssc_en) in brcm_stb_sata_16nm_ssc_init()
344 brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_PROP_BW, ~tmp, in brcm_stb_sata_16nm_ssc_init()
351 if (port->ssc_en) in brcm_stb_sata_16nm_ssc_init()
357 brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_ACQ_INTEG_BW, in brcm_stb_sata_16nm_ssc_init()
364 if (port->ssc_en) in brcm_stb_sata_16nm_ssc_init()
370 brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_LOCK_INTEG_BW, in brcm_stb_sata_16nm_ssc_init()
375 if (port->ssc_en) in brcm_stb_sata_16nm_ssc_init()
379 brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, in brcm_stb_sata_16nm_ssc_init()
383 brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL5, ~TX_ACTRL5_SSC_EN, in brcm_stb_sata_16nm_ssc_init()
384 port->ssc_en ? TX_ACTRL5_SSC_EN : 0); in brcm_stb_sata_16nm_ssc_init()
389 static int brcm_stb_sata_16nm_init(struct brcm_sata_port *port) in brcm_stb_sata_16nm_init() argument
391 return brcm_stb_sata_16nm_ssc_init(port); in brcm_stb_sata_16nm_init()
394 /* NS2 SATA PLL1 defaults were characterized by H/W group */
399 static int brcm_ns2_sata_init(struct brcm_sata_port *port) in brcm_ns2_sata_init() argument
403 void __iomem *ctrl_base = brcm_sata_ctrl_base(port); in brcm_ns2_sata_init()
404 struct device *dev = port->phy_priv->dev; in brcm_ns2_sata_init()
412 brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL1, 0x0, val); in brcm_ns2_sata_init()
417 brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL2, 0x0, val); in brcm_ns2_sata_init()
421 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val); in brcm_ns2_sata_init()
423 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val); in brcm_ns2_sata_init()
425 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val); in brcm_ns2_sata_init()
429 brcm_sata_phy_wr(port, BLOCK0_REG_BANK, BLOCK0_SPARE, in brcm_ns2_sata_init()
442 val = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, in brcm_ns2_sata_init()
447 try--; in brcm_ns2_sata_init()
451 dev_err(dev, "port%d PLL did not lock\n", port->portnum); in brcm_ns2_sata_init()
452 return -ETIMEDOUT; in brcm_ns2_sata_init()
455 dev_dbg(dev, "port%d initialized\n", port->portnum); in brcm_ns2_sata_init()
460 static int brcm_nsp_sata_init(struct brcm_sata_port *port) in brcm_nsp_sata_init() argument
462 struct device *dev = port->phy_priv->dev; in brcm_nsp_sata_init()
467 if (port->portnum == 0) in brcm_nsp_sata_init()
469 else if (port->portnum == 1) in brcm_nsp_sata_init()
472 return -EINVAL; in brcm_nsp_sata_init()
479 brcm_sata_phy_wr(port, oob_bank, OOB_CTRL1, 0x0, val); in brcm_nsp_sata_init()
485 brcm_sata_phy_wr(port, oob_bank, OOB_CTRL2, 0x0, val); in brcm_nsp_sata_init()
488 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_ACTRL2, in brcm_nsp_sata_init()
492 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_CAP_CONTROL, in brcm_nsp_sata_init()
496 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, in brcm_nsp_sata_init()
499 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, in brcm_nsp_sata_init()
502 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, in brcm_nsp_sata_init()
507 while (--try) { in brcm_nsp_sata_init()
508 val = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, in brcm_nsp_sata_init()
516 dev_err(dev, "port%d PLL did not lock\n", port->portnum); in brcm_nsp_sata_init()
517 return -ETIMEDOUT; in brcm_nsp_sata_init()
520 dev_dbg(dev, "port%d initialized\n", port->portnum); in brcm_nsp_sata_init()
533 static int brcm_sr_sata_init(struct brcm_sata_port *port) in brcm_sr_sata_init() argument
535 struct device *dev = port->phy_priv->dev; in brcm_sr_sata_init()
540 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val); in brcm_sr_sata_init()
542 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val); in brcm_sr_sata_init()
544 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val); in brcm_sr_sata_init()
548 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_ACTRL6, 0x0, val); in brcm_sr_sata_init()
553 val = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, in brcm_sr_sata_init()
558 try--; in brcm_sr_sata_init()
563 dev_err(dev, "port%d PLL did not lock\n", port->portnum); in brcm_sr_sata_init()
564 return -ETIMEDOUT; in brcm_sr_sata_init()
568 brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL0, in brcm_sr_sata_init()
576 brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL1, 0x0, val); in brcm_sr_sata_init()
580 brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL2, 0x0, val); in brcm_sr_sata_init()
585 static int brcm_dsl_sata_init(struct brcm_sata_port *port) in brcm_dsl_sata_init() argument
587 struct device *dev = port->phy_priv->dev; in brcm_dsl_sata_init()
591 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL7, 0, 0x873); in brcm_dsl_sata_init()
593 brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0xc000); in brcm_dsl_sata_init()
595 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, in brcm_dsl_sata_init()
599 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, in brcm_dsl_sata_init()
603 brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, AEQRX_SLCAL0_CTRL0, in brcm_dsl_sata_init()
606 brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, AEQRX_SLCAL1_CTRL0, in brcm_dsl_sata_init()
610 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_CAP_CHARGE_TIME, 0, 0x32); in brcm_dsl_sata_init()
612 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_VCO_CAL_THRESH, 0, 0xa); in brcm_dsl_sata_init()
614 brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_FREQ_DET_TIME, 0, 0x64); in brcm_dsl_sata_init()
620 tmp = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, in brcm_dsl_sata_init()
625 try--; in brcm_dsl_sata_init()
630 dev_err(dev, "port%d PLL did not lock\n", port->portnum); in brcm_dsl_sata_init()
631 return -ETIMEDOUT; in brcm_dsl_sata_init()
634 dev_dbg(dev, "port%d initialized\n", port->portnum); in brcm_dsl_sata_init()
642 struct brcm_sata_port *port = phy_get_drvdata(phy); in brcm_sata_phy_init() local
644 switch (port->phy_priv->version) { in brcm_sata_phy_init()
646 rc = brcm_stb_sata_16nm_init(port); in brcm_sata_phy_init()
650 rc = brcm_stb_sata_init(port); in brcm_sata_phy_init()
653 rc = brcm_ns2_sata_init(port); in brcm_sata_phy_init()
656 rc = brcm_nsp_sata_init(port); in brcm_sata_phy_init()
659 rc = brcm_sr_sata_init(port); in brcm_sata_phy_init()
662 rc = brcm_dsl_sata_init(port); in brcm_sata_phy_init()
665 rc = -ENODEV; in brcm_sata_phy_init()
671 static void brcm_stb_sata_calibrate(struct brcm_sata_port *port) in brcm_stb_sata_calibrate() argument
675 brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, in brcm_stb_sata_calibrate()
681 struct brcm_sata_port *port = phy_get_drvdata(phy); in brcm_sata_phy_calibrate() local
682 int rc = -EOPNOTSUPP; in brcm_sata_phy_calibrate()
684 switch (port->phy_priv->version) { in brcm_sata_phy_calibrate()
687 brcm_stb_sata_calibrate(port); in brcm_sata_phy_calibrate()
704 { .compatible = "brcm,bcm7216-sata-phy",
706 { .compatible = "brcm,bcm7445-sata-phy",
708 { .compatible = "brcm,bcm7425-sata-phy",
710 { .compatible = "brcm,iproc-ns2-sata-phy",
712 { .compatible = "brcm,iproc-nsp-sata-phy",
714 { .compatible = "brcm,iproc-sr-sata-phy",
716 { .compatible = "brcm,bcm63138-sata-phy",
725 struct device *dev = &pdev->dev; in brcm_sata_phy_probe()
726 struct device_node *dn = dev->of_node, *child; in brcm_sata_phy_probe()
734 return -ENODEV; in brcm_sata_phy_probe()
738 return -ENOMEM; in brcm_sata_phy_probe()
740 priv->dev = dev; in brcm_sata_phy_probe()
743 priv->phy_base = devm_ioremap_resource(dev, res); in brcm_sata_phy_probe()
744 if (IS_ERR(priv->phy_base)) in brcm_sata_phy_probe()
745 return PTR_ERR(priv->phy_base); in brcm_sata_phy_probe()
749 priv->version = (enum brcm_sata_phy_version)of_id->data; in brcm_sata_phy_probe()
751 priv->version = BRCM_SATA_PHY_STB_28NM; in brcm_sata_phy_probe()
753 if (priv->version == BRCM_SATA_PHY_IPROC_NS2) { in brcm_sata_phy_probe()
755 "phy-ctrl"); in brcm_sata_phy_probe()
756 priv->ctrl_base = devm_ioremap_resource(dev, res); in brcm_sata_phy_probe()
757 if (IS_ERR(priv->ctrl_base)) in brcm_sata_phy_probe()
758 return PTR_ERR(priv->ctrl_base); in brcm_sata_phy_probe()
763 struct brcm_sata_port *port; in brcm_sata_phy_probe() local
768 ret = -EINVAL; in brcm_sata_phy_probe()
774 ret = -EINVAL; in brcm_sata_phy_probe()
777 if (priv->phys[id].phy) { in brcm_sata_phy_probe()
778 dev_err(dev, "already registered port %u\n", id); in brcm_sata_phy_probe()
779 ret = -EINVAL; in brcm_sata_phy_probe()
783 port = &priv->phys[id]; in brcm_sata_phy_probe()
784 port->portnum = id; in brcm_sata_phy_probe()
785 port->phy_priv = priv; in brcm_sata_phy_probe()
786 port->phy = devm_phy_create(dev, child, &phy_ops); in brcm_sata_phy_probe()
787 port->rxaeq_mode = RXAEQ_MODE_OFF; in brcm_sata_phy_probe()
788 if (!of_property_read_string(child, "brcm,rxaeq-mode", in brcm_sata_phy_probe()
790 port->rxaeq_mode = rxaeq_to_val(rxaeq_mode); in brcm_sata_phy_probe()
791 if (port->rxaeq_mode == RXAEQ_MODE_MANUAL) in brcm_sata_phy_probe()
792 of_property_read_u32(child, "brcm,rxaeq-value", in brcm_sata_phy_probe()
793 &port->rxaeq_val); in brcm_sata_phy_probe()
794 port->ssc_en = of_property_read_bool(child, "brcm,enable-ssc"); in brcm_sata_phy_probe()
795 if (IS_ERR(port->phy)) { in brcm_sata_phy_probe()
797 ret = PTR_ERR(port->phy); in brcm_sata_phy_probe()
801 phy_set_drvdata(port->phy, port); in brcm_sata_phy_probe()
811 dev_info(dev, "registered %d port(s)\n", count); in brcm_sata_phy_probe()
823 .name = "brcm-sata-phy",
828 MODULE_DESCRIPTION("Broadcom SATA PHY driver");
832 MODULE_ALIAS("platform:phy-brcm-sata");