23 #define VMD_CFGBAR	0
27 #define PCI_REG_VMCAP		0x40
28 #define BUS_RESTRICT_CAP(vmcap)	(vmcap & 0x1)
29 #define PCI_REG_VMCONFIG	0x44
30 #define BUS_RESTRICT_CFG(vmcfg)	((vmcfg >> 8) & 0x3)
31 #define PCI_REG_VMLOCK		0x70
32 #define MB2_SHADOW_EN(vmlock)	(vmlock & 0x2)
34 #define MB2_SHADOW_OFFSET	0x2000
43 	VMD_FEAT_HAS_MEMBAR_SHADOW		= (1 << 0),
137 	msg->data = 0;  in vmd_compose_msi_msg()
193 	return 0;  in vmd_get_hwirq()
206 		return &vmd->irqs[0];  in vmd_next_irq()
216 		return &vmd->irqs[0];  in vmd_next_irq()
249 	return 0;  in vmd_msi_init()
277 	memset(arg, 0, sizeof(*arg));  in vmd_msi_prepare()
278 	return 0;  in vmd_msi_prepare()
315 	return 0;  in vmd_create_irq_domain()
352 	int ret = 0;  in vmd_pci_read()
387 	int ret = 0;  in vmd_pci_write()
432  * VMD domains start at 0x10000 to not clash with ACPI _SEG domains.
433  * Per ACPI r6.0, sec 6.5.6,  _SEG returns an integer, of which the lower
439 	int domain = 0xffff;  in vmd_find_free_domain()
459 		if (ret || vmlock == ~0)  in vmd_get_phys_offsets()
465 			membar2 = pci_iomap(dev, VMD_MEMBAR2, 0);  in vmd_get_phys_offsets()
472 			return 0;  in vmd_get_phys_offsets()
481 		if (pos && reg == 0x53484457) {  in vmd_get_phys_offsets()
490 			return 0;  in vmd_get_phys_offsets()
498 	return 0;  in vmd_get_phys_offsets()
511 		case 0:  in vmd_get_bus_number_start()
512 			vmd->busn_start = 0;  in vmd_get_bus_number_start()
527 	return 0;  in vmd_get_bus_number_start()
550 	if (vmd->msix_count < 0)  in vmd_alloc_irqs()
555 	if (vmd->msix_count < 0)  in vmd_alloc_irqs()
563 	for (i = 0; i < vmd->msix_count; i++) {  in vmd_alloc_irqs()
576 	return 0;  in vmd_alloc_irqs()
586 	resource_size_t offset[2] = {0};  in vmd_enable_domain()
587 	resource_size_t membar2_offset = 0x2000;  in vmd_enable_domain()
595 	 * or 0, depending on an enable bit in the VMD device.  in vmd_enable_domain()
599 		ret = vmd_get_phys_offsets(vmd, true, &offset[0], &offset[1]);  in vmd_enable_domain()
603 		ret = vmd_get_phys_offsets(vmd, false, &offset[0], &offset[1]);  in vmd_enable_domain()
610 	 * limits the bus range to between 0-127, 128-255, or 224-255  in vmd_enable_domain()
619 	vmd->resources[0] = (struct resource) {  in vmd_enable_domain()
671 	if (sd->domain < 0)  in vmd_enable_domain()
686 	pci_add_resource(&resources, &vmd->resources[0]);  in vmd_enable_domain()
687 	pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);  in vmd_enable_domain()
717 	return 0;  in vmd_enable_domain()
734 	if (err < 0)  in vmd_probe()
737 	vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);  in vmd_probe()
758 	return 0;  in vmd_probe()
765 	for (i = 0; i < vmd->msix_count; i++)  in vmd_cleanup_srcu()
788 	for (i = 0; i < vmd->msix_count; i++)  in vmd_suspend()
791 	return 0;  in vmd_suspend()
800 	for (i = 0; i < vmd->msix_count; i++) {  in vmd_resume()
808 	return 0;  in vmd_resume()
819 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x467f),
822 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c3d),
828 	{0,}