Lines Matching +full:0 +full:x001fffff
101 #define LBA_PORT_BASE (PCI_F_EXTEND | 0xfee00000UL)
107 #define LBA_FLAG_SKIP_PROBE 0x10
146 #define LBA_CFG_DEV(tok) ((u8) ((tok)>>11) & 0x1f)
147 #define LBA_CFG_FUNC(tok) ((u8) ((tok)>>8 ) & 0x7)
197 return 0; in lba_device_present()
222 WRITE_REG32(0x1, d->hba.base_addr + LBA_ARB_MASK); \
247 WRITE_REG32(~0, (d)->hba.base_addr + LBA_PCI_CFG_DATA); \
280 #define LBA_MASTER_ABORT_ERROR 0xc
281 #define LBA_FATAL_ERROR 0x10
284 u32 error_status = 0; \
291 if ((error_status & 0x1f) != 0) { \
296 if ((error_status & LBA_FATAL_ERROR) == 0) { \
339 u32 data = ~0U; in lba_rd_cfg()
340 int error = 0; in lba_rd_cfg()
341 u32 arb_mask = 0; /* used by LBA_CFG_SETUP/RESTORE */ in lba_rd_cfg()
342 u32 error_config = 0; /* used by LBA_CFG_SETUP/RESTORE */ in lba_rd_cfg()
343 u32 status_control = 0; /* used by LBA_CFG_SETUP/RESTORE */ in lba_rd_cfg()
366 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; in elroy_cfg_read()
378 DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __func__, tok, pos, *data); in elroy_cfg_read()
379 return 0; in elroy_cfg_read()
385 *data = ~0U; in elroy_cfg_read()
386 return(0); in elroy_cfg_read()
399 DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __func__, tok, pos, *data); in elroy_cfg_read()
400 return 0; in elroy_cfg_read()
407 int error = 0; in lba_wr_cfg()
408 u32 arb_mask = 0; in lba_wr_cfg()
409 u32 error_config = 0; in lba_wr_cfg()
410 u32 status_control = 0; in lba_wr_cfg()
433 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; in elroy_cfg_write()
442 DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __func__, tok, pos,data); in elroy_cfg_write()
443 return 0; in elroy_cfg_write()
447 DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data); in elroy_cfg_write()
451 DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __func__, tok, pos, data); in elroy_cfg_write()
465 return 0; in elroy_cfg_write()
476 * TR4.0 as no additional bugs were found in this areea between Elroy and
483 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; in mercury_cfg_read()
503 DBG_CFG("mercury_cfg_read(%x+%2x) -> 0x%x\n", tok, pos, *data); in mercury_cfg_read()
504 return 0; in mercury_cfg_read()
516 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; in mercury_cfg_write()
522 DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __func__, tok, pos, data); in mercury_cfg_write()
539 return 0; in mercury_cfg_write()
578 return 0; in truncate_pat_collision()
585 if (!tmp) return 0; in truncate_pat_collision()
590 if (tmp->start >= end) return 0; in truncate_pat_collision()
612 return 0; /* truncation successful */ in truncate_pat_collision()
630 pr_debug("LMMIO mismatch: PAT length = 0x%lx, MASK register = 0x%lx\n", in extend_lmmio_len()
635 pr_debug("LBA: lmmio_space [0x%lx-0x%lx] - original\n", start, end); in extend_lmmio_len()
642 pr_debug("LBA: lmmio_space [0x%lx-0x%lx] - current\n", start, end); in extend_lmmio_len()
657 pr_info("LBA: lmmio_space [0x%lx-0x%lx] - new\n", start, end); in extend_lmmio_len()
664 #define truncate_pat_collision(r,n) (0)
678 if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) { in pcibios_allocate_bridge_resources()
685 r->start = r->end = 0; in pcibios_allocate_bridge_resources()
686 r->flags = 0; in pcibios_allocate_bridge_resources()
721 DBG("lba_fixup_bus(0x%p) bus %d platform_data 0x%p\n", in lba_fixup_bus()
748 if (err < 0) { in lba_fixup_bus()
756 if (err < 0) { in lba_fixup_bus()
770 if (err < 0) { in lba_fixup_bus()
782 if (err < 0) { in lba_fixup_bus()
801 for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) { in lba_fixup_bus()
892 DBG_PORT(" 0x%x\n", t); \
898 LBA_PORT_IN(32, 0)
931 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, d, addr, val); \
939 LBA_PORT_OUT(32, 0)
954 ((lba)->iop_base + (((addr)&0xFFFC)<<10) + ((addr)&3))
965 ** bits 1:0 stay the same. bits 15:2 become 25:12.
973 DBG_PORT("%s(0x%p, 0x%x) ->", __func__, l, addr); \
975 DBG_PORT(" 0x%x\n", t); \
981 LBA_PORT_IN(32, 0)
989 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, l, addr, val); \
997 LBA_PORT_OUT(32, 0)
1059 for (i = 0; i < pa_count; i++) { in lba_pat_resources()
1071 switch(p->type & 0xff) { in lba_pat_resources()
1128 " range[%d] : ignoring NPIOP (0x%lx)\n", in lba_pat_resources()
1151 " range[%d] : unknown pat range type (0x%lx)\n", in lba_pat_resources()
1152 i, p->type & 0xff); in lba_pat_resources()
1189 r->start = lba_num & 0xff; in lba_legacy_resources()
1190 r->end = (lba_num>>8) & 0xff; in lba_legacy_resources()
1212 * Well, only because firmware (v5.0) on C3000 doesn't program in lba_legacy_resources()
1286 r->end = r->start = 0; /* Not enabled. */ in lba_legacy_resources()
1360 #if 0 in lba_hw_init()
1372 printk(KERN_DEBUG " HINT cfg 0x%Lx\n", in lba_hw_init()
1412 * In SoftFail mode "~0L" is returned as a result of a timeout on the in lba_hw_init()
1426 ** Writing a zero to STAT_CTL.rf (bit 0) will clear reset signal in lba_hw_init()
1433 if (0 == READ_REG32(d->hba.base_addr + LBA_ARB_MASK)) { in lba_hw_init()
1439 ** correctly if the slot is empty. ARB_MASK is set to 0 in lba_hw_init()
1441 ** not at least one. 0x3 enables elroy and first slot. in lba_hw_init()
1444 WRITE_REG32(0x3, d->hba.base_addr + LBA_ARB_MASK); in lba_hw_init()
1452 return 0; in lba_hw_init()
1459 * we use bus 0 to indicate the directly attached bus and any other bus
1462 static unsigned int lba_next_bus = 0;
1465 * Determine if lba should claim this chip (return 0) or not (return 1).
1486 func_class &= 0xf; in lba_driver_probe()
1488 case 0: version = "TR1.0"; break; in lba_driver_probe()
1489 case 1: version = "TR2.0"; break; in lba_driver_probe()
1492 case 4: version = "TR3.0"; break; in lba_driver_probe()
1493 case 5: version = "TR4.0"; break; in lba_driver_probe()
1497 printk(KERN_INFO "Elroy version %s (0x%x) found at 0x%lx\n", in lba_driver_probe()
1498 version, func_class & 0xf, (long)dev->hpa.start); in lba_driver_probe()
1505 #if 0 in lba_driver_probe()
1506 /* Elroy TR4.0 should work with simple algorithm. in lba_driver_probe()
1520 func_class &= 0xff; in lba_driver_probe()
1521 major = func_class >> 4, minor = func_class & 0xf; in lba_driver_probe()
1526 printk(KERN_INFO "%s version TR%d.%d (0x%x) found at 0x%lx\n", in lba_driver_probe()
1532 printk(KERN_ERR "Unknown LBA found at 0x%lx\n", in lba_driver_probe()
1603 lba_dev->hba.lmmio_space.flags = 0; in lba_driver_probe()
1628 return 0; in lba_driver_probe()
1664 return 0; in lba_driver_probe()
1668 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, ELROY_HVERS, 0xa },
1669 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, MERCURY_HVERS, 0xa },
1670 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, QUICKSILVER_HVERS, 0xa },
1671 { 0, }
1701 WARN_ON((ibase & 0x001fffff) != 0); in lba_set_iregs()
1702 WARN_ON((imask & 0x001fffff) != 0); in lba_set_iregs()
1704 DBG("%s() ibase 0x%x imask 0x%x\n", __func__, ibase, imask); in lba_set_iregs()
1723 dev->subsystem_device != 0x1292) in quirk_diva_ati_card()
1727 dev->device = 0; in quirk_diva_ati_card()
1735 dev->subsystem_device != 0x1291) in quirk_diva_aux_disable()
1739 dev->device = 0; in quirk_diva_aux_disable()
1747 dev->subsystem_device != 0x104a) in quirk_tosca_aux_disable()
1751 dev->device = 0; in quirk_tosca_aux_disable()