Lines Matching +full:max +full:- +full:bits +full:- +full:per +full:- +full:word
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** ccio-dma.c:
4 ** DMA management routines for first generation cache-coherent machines.
9 ** (c) Copyright 2000 Hewlett-Packard Company
15 ** the I/O MMU - basically what x86 does.
17 ** Philipp Rumpf has a "Real Mode" driver for PCX-W machines at:
18 ** CVSROOT=:pserver:anonymous@198.186.203.37:/cvsroot/linux-parisc
19 ** cvs -z3 co linux/arch/parisc/kernel/dma-rm.c
21 ** I've rewritten his code to work under TPG's tree. See ccio-rm-dma.c.
24 ** o outbound DMA is slower - U2 won't prefetch data (GSC+ XQL signal).
25 ** o Inbound DMA less efficient - U2 can't use DMA_FAST attribute.
27 ** o Doesn't work under PCX-U/U+ machines since they didn't follow
28 ** the coherency design originally worked out. Only PCX-W does.
42 #include <linux/dma-map-ops.h>
44 #include <linux/iommu-helper.h>
54 #include <asm/parisc-device.h>
59 ** Choose "ccio" since that's what HP-UX calls it.
141 ** -------------
166 ** Address space by setting the 14 high order address bits of the
174 ** virtual address is composed of selected physical bits.
191 ** (2 per GSC+ port). Each incoming Runway transaction address is compared
230 u32 res_hint; /* next available IOVP -
256 struct pci_dev *fake_pci_dev; /* the fake pci_dev for non-pci devs */
267 * Bits set in the resource map are in use.
299 idx = (unsigned int)((unsigned long)res_ptr - (unsigned long)ioc->res_map); \
304 ioc->res_hint = res_idx + (size >> 3); \
310 u##size *res_ptr = (u##size *)&((ioc)->res_map[ioa->res_hint & ~((size >> 3) - 1)]); \
311 u##size *res_end = (u##size *)&(ioc)->res_map[ioa->res_size]; \
313 res_ptr = (u##size *)&(ioc)->res_map[0]; \
319 ** o Most IOVA's are "temporary" - avg search time should be small.
324 ** o search for log2(size) bits at a time.
325 ** o search for available resource bits using byte/word/whatever.
331 * ccio_alloc_range - Allocate pages in the ioc's resource map.
370 * an unsigned long - not byte at a time. As it is now, in ccio_alloc_range()
397 __func__, res_idx, ioc->res_hint); in ccio_alloc_range()
402 unsigned long tmp = cr_end - cr_start; in ccio_alloc_range()
404 cr_start = (cr_end < cr_start) ? -(tmp) : (tmp); in ccio_alloc_range()
406 ioc->avg_search[ioc->avg_idx++] = cr_start; in ccio_alloc_range()
407 ioc->avg_idx &= CCIO_SEARCH_SAMPLE - 1; in ccio_alloc_range()
408 ioc->used_pages += pages_needed; in ccio_alloc_range()
417 u##size *res_ptr = (u##size *)&((ioc)->res_map[res_idx]); \
422 * ccio_free_range - Free pages from the ioc's resource map.
444 ioc->used_pages -= pages_mapped; in ccio_free_range()
492 ** behind GSCtoPCI (dino) bus converter. Only one cacheline per GSC
497 ** FIXME: the default hints need to be per GSC device - not global.
499 ** HP-UX dorks: linux device driver programming model is totally different
500 ** than HP-UX's. HP-UX always sets HINT_PREFETCH since it's drivers
501 ** do special things to work on non-coherent platforms...linux has to
527 * ccio_io_pdir_entry - Initialize an I/O Pdir.
538 * WORD 0:
539 * +------+----------------+-----------------------------------------------+
542 * |4 bits| 12 bits | 16 bits |
543 * +------+----------------+-----------------------------------------------+
544 * WORD 1:
545 * +-----------------------+-----------------------------------------------+
548 * | 20 bits | 5 bits | 1 bit |1 bit |2 bits|1 bit |1 bit |1 bit |
549 * +-----------------------+-----------------------------------------------+
552 * (Load Coherence Index) instruction. The 8 bits used for the virtual
553 * index are bits 12:19 of the value returned by LCI.
566 ** WORD 1 - low order word in ccio_io_pdir_entry()
568 ** "dep" clobbers the physical address offset bits as well. in ccio_io_pdir_entry()
575 ** WORD 0 - high order word in ccio_io_pdir_entry()
580 ** get bits 12:15 of physical address in ccio_io_pdir_entry()
581 ** shift bits 16:31 of physical address in ccio_io_pdir_entry()
591 ** get CPU coherency index bits in ccio_io_pdir_entry()
593 ** Deposit virt_idx bits into I/O PDIR word in ccio_io_pdir_entry()
603 ** PCX-U/U+ do. (eg C200/C240) in ccio_io_pdir_entry()
604 ** PCX-T'? Don't know. (eg C110 or similar K-class) in ccio_io_pdir_entry()
606 ** See PDC_MODEL/option 0/SW_CAP word for "Non-coherent IO-PDIR bit". in ccio_io_pdir_entry()
608 ** "Since PCX-U employs an offset hash that is incompatible with in ccio_io_pdir_entry()
617 * ccio_clear_io_tlb - Remove stale entries from the I/O TLB.
629 u32 chain_size = 1 << ioc->chainid_shift; in ccio_clear_io_tlb()
631 iovp &= IOVP_MASK; /* clear offset bits, just want pagenum */ in ccio_clear_io_tlb()
635 WRITE_U32(CMD_TLB_PURGE | iovp, &ioc->ioc_regs->io_command); in ccio_clear_io_tlb()
637 byte_cnt -= chain_size; in ccio_clear_io_tlb()
642 * ccio_mark_invalid - Mark the I/O Pdir entries invalid.
654 * PDIR entry - just once for each possible TLB entry.
671 char *pdir_ptr = (char *) &(ioc->pdir_base[idx]); in ccio_mark_invalid()
673 BUG_ON(idx >= (ioc->pdir_size / sizeof(u64))); in ccio_mark_invalid()
677 ** PCX-U/U+ do. (eg C200/C240) in ccio_mark_invalid()
678 ** See PDC_MODEL/option 0/SW_CAP for "Non-coherent IO-PDIR bit". in ccio_mark_invalid()
683 byte_cnt -= IOVP_SIZE; in ccio_mark_invalid()
697 * ccio_dma_supported - Verify the IOMMU supports the DMA address range.
710 /* only support 32-bit or better devices (ie PCI/GSC) */ in ccio_dma_supported()
715 * ccio_map_single - Map an address range into the IOMMU.
742 /* save offset bits */ in ccio_map_single()
747 spin_lock_irqsave(&ioc->res_lock, flags); in ccio_map_single()
750 ioc->msingle_calls++; in ccio_map_single()
751 ioc->msingle_pages += size >> IOVP_SHIFT; in ccio_map_single()
757 pdir_start = &(ioc->pdir_base[idx]); in ccio_map_single()
759 DBG_RUN("%s() 0x%p -> 0x%lx size: %0x%x\n", in ccio_map_single()
775 size -= IOVP_SIZE; in ccio_map_single()
778 spin_unlock_irqrestore(&ioc->res_lock, flags); in ccio_map_single()
796 * ccio_unmap_page - Unmap an address range from the IOMMU.
820 iova ^= offset; /* clear offset bits */ in ccio_unmap_page()
824 spin_lock_irqsave(&ioc->res_lock, flags); in ccio_unmap_page()
827 ioc->usingle_calls++; in ccio_unmap_page()
828 ioc->usingle_pages += size >> IOVP_SHIFT; in ccio_unmap_page()
833 spin_unlock_irqrestore(&ioc->res_lock, flags); in ccio_unmap_page()
837 * ccio_alloc - Allocate a consistent DMA mapping.
850 /* GRANT Need to establish hierarchy for non-PCI devs as well in ccio_alloc()
870 * ccio_free - Free a consistent DMA mapping.
896 #include "iommu-helpers.h"
899 * ccio_map_sg - Map the scatter/gather list into the IOMMU.
928 sg_virt(sglist), sglist->length, in ccio_map_sg()
930 sg_dma_len(sglist) = sglist->length; in ccio_map_sg()
937 spin_lock_irqsave(&ioc->res_lock, flags); in ccio_map_sg()
940 ioc->msg_calls++; in ccio_map_sg()
963 spin_unlock_irqrestore(&ioc->res_lock, flags); in ccio_map_sg()
978 * ccio_unmap_sg - Unmap the scatter/gather list from the IOMMU.
1000 __func__, nents, sg_virt(sglist), sglist->length); in ccio_unmap_sg()
1003 ioc->usg_calls++; in ccio_unmap_sg()
1006 while(sg_dma_len(sglist) && nents--) { in ccio_unmap_sg()
1009 ioc->usg_pages += sg_dma_len(sglist) >> PAGE_SHIFT; in ccio_unmap_sg()
1038 unsigned int total_pages = ioc->res_size << 3; in ccio_proc_info()
1040 unsigned long avg = 0, min, max; in ccio_proc_info() local
1044 seq_printf(m, "%s\n", ioc->name); in ccio_proc_info()
1047 (ioc->cujo20_bug ? "yes" : "no")); in ccio_proc_info()
1054 total_pages - ioc->used_pages, ioc->used_pages, in ccio_proc_info()
1055 (int)(ioc->used_pages * 100 / total_pages)); in ccio_proc_info()
1059 ioc->res_size, total_pages); in ccio_proc_info()
1062 min = max = ioc->avg_search[0]; in ccio_proc_info()
1064 avg += ioc->avg_search[j]; in ccio_proc_info()
1065 if(ioc->avg_search[j] > max) in ccio_proc_info()
1066 max = ioc->avg_search[j]; in ccio_proc_info()
1067 if(ioc->avg_search[j] < min) in ccio_proc_info()
1068 min = ioc->avg_search[j]; in ccio_proc_info()
1071 seq_printf(m, " Bitmap search : %ld/%ld/%ld (min/avg/max CPU Cycles)\n", in ccio_proc_info()
1072 min, avg, max); in ccio_proc_info()
1075 ioc->msingle_calls, ioc->msingle_pages, in ccio_proc_info()
1076 (int)((ioc->msingle_pages * 1000)/ioc->msingle_calls)); in ccio_proc_info()
1078 /* KLUGE - unmap_sg calls unmap_page for each mapped page */ in ccio_proc_info()
1079 min = ioc->usingle_calls - ioc->usg_calls; in ccio_proc_info()
1080 max = ioc->usingle_pages - ioc->usg_pages; in ccio_proc_info()
1082 min, max, (int)((max * 1000)/min)); in ccio_proc_info()
1085 ioc->msg_calls, ioc->msg_pages, in ccio_proc_info()
1086 (int)((ioc->msg_pages * 1000)/ioc->msg_calls)); in ccio_proc_info()
1089 ioc->usg_calls, ioc->usg_pages, in ccio_proc_info()
1090 (int)((ioc->usg_pages * 1000)/ioc->usg_calls)); in ccio_proc_info()
1093 ioc = ioc->next; in ccio_proc_info()
1104 seq_hex_dump(m, " ", DUMP_PREFIX_NONE, 32, 4, ioc->res_map, in ccio_proc_bitmap_info()
1105 ioc->res_size, false); in ccio_proc_bitmap_info()
1107 ioc = ioc->next; in ccio_proc_bitmap_info()
1108 break; /* XXX - remove me */ in ccio_proc_bitmap_info()
1116 * ccio_find_ioc - Find the ioc in the ioc_list
1129 if (ioc->hw_path == hw_path) in ccio_find_ioc()
1132 ioc = ioc->next; in ccio_find_ioc()
1139 * ccio_get_iommu - Find the iommu which controls this device
1151 return ccio_find_ioc(dev->hw_path); in ccio_get_iommu()
1167 ioc->cujo20_bug = 1; in ccio_cujo20_fixup()
1168 res_ptr = ioc->res_map; in ccio_cujo20_fixup()
1171 while (idx < ioc->res_size) { in ccio_cujo20_fixup()
1178 /* GRANT - is this needed for U2 or not? */
1183 ** If spa_shift is non-zero (ie probably U2),
1188 ** I think only Java (K/D/R-class too?) systems don't do this.
1193 if (dev->spa_shift == 0) {
1196 return (1 << dev->spa_shift);
1221 * ccio_ioc_init - Initialize the I/O Controller
1241 ** can be outstanding based on PCI Class/sub-class. Both in ccio_ioc_init()
1243 ** Hot-Plug/Removal of PCI cards. (aka PCI OLARD). in ccio_ioc_init()
1248 /* limit IOVA space size to 1MB-1GB */ in ccio_ioc_init()
1250 if (iova_space_size < (1 << (20 - PAGE_SHIFT))) { in ccio_ioc_init()
1251 iova_space_size = 1 << (20 - PAGE_SHIFT); in ccio_ioc_init()
1253 } else if (iova_space_size > (1 << (30 - PAGE_SHIFT))) { in ccio_ioc_init()
1254 iova_space_size = 1 << (30 - PAGE_SHIFT); in ccio_ioc_init()
1267 ** since the pages must also be physically contiguous - typically in ccio_ioc_init()
1276 ioc->pdir_size = (iova_space_size / IOVP_SIZE) * sizeof(u64); in ccio_ioc_init()
1278 BUG_ON(ioc->pdir_size > 8 * 1024 * 1024); /* max pdir size <= 8MB */ in ccio_ioc_init()
1281 BUG_ON((1 << get_order(ioc->pdir_size)) != (ioc->pdir_size >> PAGE_SHIFT)); in ccio_ioc_init()
1283 DBG_INIT("%s() hpa 0x%p mem %luMB IOV %dMB (%d bits)\n", in ccio_ioc_init()
1284 __func__, ioc->ioc_regs, in ccio_ioc_init()
1285 (unsigned long) totalram_pages() >> (20 - PAGE_SHIFT), in ccio_ioc_init()
1289 ioc->pdir_base = (u64 *)__get_free_pages(GFP_KERNEL, in ccio_ioc_init()
1290 get_order(ioc->pdir_size)); in ccio_ioc_init()
1291 if(NULL == ioc->pdir_base) { in ccio_ioc_init()
1294 memset(ioc->pdir_base, 0, ioc->pdir_size); in ccio_ioc_init()
1296 BUG_ON((((unsigned long)ioc->pdir_base) & PAGE_MASK) != (unsigned long)ioc->pdir_base); in ccio_ioc_init()
1297 DBG_INIT(" base %p\n", ioc->pdir_base); in ccio_ioc_init()
1300 ioc->res_size = (ioc->pdir_size / sizeof(u64)) >> 3; in ccio_ioc_init()
1301 DBG_INIT("%s() res_size 0x%x\n", __func__, ioc->res_size); in ccio_ioc_init()
1303 ioc->res_map = (u8 *)__get_free_pages(GFP_KERNEL, in ccio_ioc_init()
1304 get_order(ioc->res_size)); in ccio_ioc_init()
1305 if(NULL == ioc->res_map) { in ccio_ioc_init()
1308 memset(ioc->res_map, 0, ioc->res_size); in ccio_ioc_init()
1311 ioc->res_hint = 16; in ccio_ioc_init()
1314 spin_lock_init(&ioc->res_lock); in ccio_ioc_init()
1317 ** Chainid is the upper most bits of an IOVP used to determine in ccio_ioc_init()
1320 ioc->chainid_shift = get_order(iova_space_size) + PAGE_SHIFT - CCIO_CHAINID_SHIFT; in ccio_ioc_init()
1321 DBG_INIT(" chainid_shift 0x%x\n", ioc->chainid_shift); in ccio_ioc_init()
1326 WRITE_U32(CCIO_CHAINID_MASK << ioc->chainid_shift, in ccio_ioc_init()
1327 &ioc->ioc_regs->io_chain_id_mask); in ccio_ioc_init()
1329 WRITE_U32(virt_to_phys(ioc->pdir_base), in ccio_ioc_init()
1330 &ioc->ioc_regs->io_pdir_base); in ccio_ioc_init()
1335 WRITE_U32(IOA_NORMAL_MODE, &ioc->ioc_regs->io_control); in ccio_ioc_init()
1340 WRITE_U32(0, &ioc->ioc_regs->io_tlb_entry_m); in ccio_ioc_init()
1341 WRITE_U32(0, &ioc->ioc_regs->io_tlb_entry_l); in ccio_ioc_init()
1343 for(i = 1 << CCIO_CHAINID_SHIFT; i ; i--) { in ccio_ioc_init()
1344 WRITE_U32((CMD_TLB_DIRECT_WRITE | (i << ioc->chainid_shift)), in ccio_ioc_init()
1345 &ioc->ioc_regs->io_command); in ccio_ioc_init()
1354 res->parent = NULL; in ccio_init_resource()
1355 res->flags = IORESOURCE_MEM; in ccio_init_resource()
1358 * we only want to sign extend the lower 16 bits of the register. in ccio_init_resource()
1359 * The upper 16-bits of range registers are hardcoded to 0xffff. in ccio_init_resource()
1361 res->start = (unsigned long)((signed) READ_U32(ioaddr) << 16); in ccio_init_resource()
1362 res->end = (unsigned long)((signed) (READ_U32(ioaddr + 4) << 16) - 1); in ccio_init_resource()
1363 res->name = name; in ccio_init_resource()
1367 if (res->end + 1 == res->start) in ccio_init_resource()
1370 /* On some platforms (e.g. K-Class), we have already registered in ccio_init_resource()
1378 __func__, (unsigned long)res->start, (unsigned long)res->end); in ccio_init_resource()
1384 struct resource *res = ioc->mmio_region; in ccio_init_resources()
1387 snprintf(name, 14, "GSC Bus [%d/]", ioc->hw_path); in ccio_init_resources()
1389 ccio_init_resource(res, name, &ioc->ioc_regs->io_io_low); in ccio_init_resources()
1390 ccio_init_resource(res + 1, name, &ioc->ioc_regs->io_io_low_hv); in ccio_init_resources()
1394 unsigned long min, unsigned long max, unsigned long align) in new_ioc_area() argument
1396 if (max <= min) in new_ioc_area()
1397 return -EBUSY; in new_ioc_area()
1399 res->start = (max - size + 1) &~ (align - 1); in new_ioc_area()
1400 res->end = res->start + size; in new_ioc_area()
1409 return new_ioc_area(res, size, min, max - size, align); in new_ioc_area()
1413 unsigned long min, unsigned long max, unsigned long align) in expand_ioc_area() argument
1417 if (!res->parent) in expand_ioc_area()
1418 return new_ioc_area(res, size, min, max, align); in expand_ioc_area()
1420 start = (res->start - size) &~ (align - 1); in expand_ioc_area()
1421 len = res->end - start + 1; in expand_ioc_area()
1427 start = res->start; in expand_ioc_area()
1428 len = ((size + res->end + align) &~ (align - 1)) - start; in expand_ioc_area()
1429 if (start + len <= max) { in expand_ioc_area()
1434 return -EBUSY; in expand_ioc_area()
1446 unsigned long min, unsigned long max, unsigned long align) in ccio_allocate_resource() argument
1453 parent = ioc->mmio_region; in ccio_allocate_resource()
1454 if (parent->parent && in ccio_allocate_resource()
1455 !allocate_resource(parent, res, size, min, max, align, NULL, NULL)) in ccio_allocate_resource()
1458 if ((parent + 1)->parent && in ccio_allocate_resource()
1459 !allocate_resource(parent + 1, res, size, min, max, align, in ccio_allocate_resource()
1463 if (!expand_ioc_area(parent, size, min, max, align)) { in ccio_allocate_resource()
1464 __raw_writel(((parent->start)>>16) | 0xffff0000, in ccio_allocate_resource()
1465 &ioc->ioc_regs->io_io_low); in ccio_allocate_resource()
1466 __raw_writel(((parent->end)>>16) | 0xffff0000, in ccio_allocate_resource()
1467 &ioc->ioc_regs->io_io_high); in ccio_allocate_resource()
1468 } else if (!expand_ioc_area(parent + 1, size, min, max, align)) { in ccio_allocate_resource()
1470 __raw_writel(((parent->start)>>16) | 0xffff0000, in ccio_allocate_resource()
1471 &ioc->ioc_regs->io_io_low_hv); in ccio_allocate_resource()
1472 __raw_writel(((parent->end)>>16) | 0xffff0000, in ccio_allocate_resource()
1473 &ioc->ioc_regs->io_io_high_hv); in ccio_allocate_resource()
1475 return -EBUSY; in ccio_allocate_resource()
1479 return allocate_resource(parent, res, size, min, max, align, NULL,NULL); in ccio_allocate_resource()
1490 } else if ((ioc->mmio_region->start <= res->start) && in ccio_request_resource()
1491 (res->end <= ioc->mmio_region->end)) { in ccio_request_resource()
1492 parent = ioc->mmio_region; in ccio_request_resource()
1493 } else if (((ioc->mmio_region + 1)->start <= res->start) && in ccio_request_resource()
1494 (res->end <= (ioc->mmio_region + 1)->end)) { in ccio_request_resource()
1495 parent = ioc->mmio_region + 1; in ccio_request_resource()
1497 return -EBUSY; in ccio_request_resource()
1501 * firmware assigned them. e.g. children of hppb.c (e.g. K-class) in ccio_request_resource()
1509 * ccio_probe - Determine if ccio should claim this device.
1525 return -ENOMEM; in ccio_probe()
1528 ioc->name = dev->id.hversion == U2_IOA_RUNWAY ? "U2" : "UTurn"; in ccio_probe()
1530 printk(KERN_INFO "Found %s at 0x%lx\n", ioc->name, in ccio_probe()
1531 (unsigned long)dev->hpa.start); in ccio_probe()
1534 ioc_p = &(*ioc_p)->next; in ccio_probe()
1538 ioc->hw_path = dev->hw_path; in ccio_probe()
1539 ioc->ioc_regs = ioremap(dev->hpa.start, 4096); in ccio_probe()
1540 if (!ioc->ioc_regs) { in ccio_probe()
1542 return -ENOMEM; in ccio_probe()
1552 hba->iommu = ioc; in ccio_probe()
1553 dev->dev.platform_data = hba; in ccio_probe()
1559 proc_create_single(MODULE_NAME"-bitmap", 0, proc_runway_root, in ccio_probe()
1568 * ccio_init - ccio initialization procedure.