Lines Matching +full:0 +full:xf0ffffff
73 rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf); in rtw_coex_limited_tx()
74 rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x0808); in rtw_coex_limited_tx()
78 rtw_write32(rtwdev, REG_DARFRC, 0x1000000); in rtw_coex_limited_tx()
79 rtw_write32(rtwdev, REG_DARFRCH, 0x1010101); in rtw_coex_limited_tx()
81 rtw_write32(rtwdev, REG_DARFRC, 0x1000000); in rtw_coex_limited_tx()
82 rtw_write32(rtwdev, REG_DARFRCH, 0x4030201); in rtw_coex_limited_tx()
86 rtw_write8_clr(rtwdev, REG_LIFETIME_EN, 0xf); in rtw_coex_limited_tx()
94 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1, 0x20); in rtw_coex_limited_tx()
114 coex_stat->bt_hid_pair_num > 0) in rtw_coex_limited_wl()
125 u8 para[6] = {0}; in rtw_coex_wl_ccklock_action()
130 para[0] = COEX_H2C69_WL_LEAKAP; in rtw_coex_wl_ccklock_action()
134 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_wl_ccklock_action()
136 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_ccklock_action()
145 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_ccklock_action()
148 para[1] = 0x1; /* disable 5ms extend */ in rtw_coex_wl_ccklock_action()
149 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_wl_ccklock_action()
151 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_ccklock_action()
154 para[1] = 0x0; /* enable 5ms extend */ in rtw_coex_wl_ccklock_action()
155 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_wl_ccklock_action()
187 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0; in rtw_coex_wl_noisy_detect()
188 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0; in rtw_coex_wl_noisy_detect()
195 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0; in rtw_coex_wl_noisy_detect()
196 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0; in rtw_coex_wl_noisy_detect()
203 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0; in rtw_coex_wl_noisy_detect()
204 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0; in rtw_coex_wl_noisy_detect()
213 coex_stat->wl_noisy_level = 0; in rtw_coex_wl_noisy_detect()
221 u8 para[2] = {0}; in rtw_coex_tdma_timer_base()
228 para[0] = COEX_H2C69_TDMA_SLOT; in rtw_coex_tdma_timer_base()
235 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_tdma_timer_base()
258 u16 val = 0x2; in rtw_coex_write_scbd()
293 return 0; in rtw_coex_read_scbd()
304 u8 cnt = 0; in rtw_coex_check_rfk()
309 coex_stat->bt_iqk_state != 0xff) { in rtw_coex_check_rfk()
325 coex_stat->bt_iqk_state = 0xff; in rtw_coex_check_rfk()
359 coex_stat->bt_ble_scan_type = 0; in rtw_coex_monitor_bt_enable()
360 coex_dm->cur_bt_lna_lvl = 0; in rtw_coex_monitor_bt_enable()
414 for (i = 0; i < 4; i++) { in rtw_coex_update_wl_link_info()
463 if (payload[0] != COEX_RESP_ACK_BY_WL_FW) in rtw_coex_info_response()
499 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_scan_type()
521 struct rtw_coex_info_req req = {0}; in rtw_coex_set_lna_constrain_level()
550 for (i = 0; i < COEX_RSSI_STEP; i++) { in rtw_coex_update_bt_link_info()
559 for (i = 0; i < COEX_RSSI_STEP; i++) { in rtw_coex_update_bt_link_info()
569 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE] % 3 == 0) { in rtw_coex_update_bt_link_info()
574 if ((coex_stat->bt_ble_scan_type & 0x1) == 0x1) in rtw_coex_update_bt_link_info()
581 coex_stat->bt_profile_num = 0; in rtw_coex_update_bt_link_info()
650 u8 link = 0; in rtw_coex_update_wl_ch_info()
651 u8 center_chan = 0; in rtw_coex_update_wl_ch_info()
660 if (center_chan == 0 || (efuse->share_ant && center_chan <= 14)) { in rtw_coex_update_wl_ch_info()
661 link = 0; in rtw_coex_update_wl_ch_info()
663 link = 0x1; in rtw_coex_update_wl_ch_info()
670 for (i = 0; i < chip->afh_5g_num; i++) { in rtw_coex_update_wl_ch_info()
672 link = 0x3; in rtw_coex_update_wl_ch_info()
680 coex_dm->wl_ch_info[0] = link; in rtw_coex_update_wl_ch_info()
724 u8 offset = 0; in rtw_coex_set_rf_para()
741 return 0; in rtw_coex_read_indirect_reg()
780 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0xc000, state); in rtw_coex_set_gnt_bt()
781 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0c00, state); in rtw_coex_set_gnt_bt()
786 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x3000, state); in rtw_coex_set_gnt_wl()
787 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0300, state); in rtw_coex_set_gnt_wl()
792 #define DEF_BRK_TABLE_VAL 0xf0ffffff in rtw_coex_set_table()
836 u8 lps_mode = 0x0; in rtw_coex_power_save_state()
850 rtw_fw_coex_tdma_type(rtwdev, 0x8, 0, 0, 0, 0); in rtw_coex_power_save_state()
876 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); in rtw_coex_set_tdma()
882 rtw_coex_power_save_state(rtwdev, ps_type, 0x50, 0x4); in rtw_coex_set_tdma()
885 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); in rtw_coex_set_tdma()
888 coex_dm->ps_tdma_para[0] = byte1; in rtw_coex_set_tdma()
911 rtw_coex_tdma_timer_base(rtwdev, 0); in rtw_coex_tdma()
913 type = (u8)(tcase & 0xff); in rtw_coex_tdma()
915 turn_on = (type == 0 || type == 100) ? false : true; in rtw_coex_tdma()
940 chip->tdma_sant[type].para[0], in rtw_coex_tdma()
949 chip->tdma_nsant[n].para[0], in rtw_coex_tdma()
1097 u8 profile_map = 0; in rtw_coex_algorithm()
1139 if (coex_stat->bt_hid_pair_num > 0) in rtw_coex_algorithm()
1164 tdma_case = 0; in rtw_coex_action_coex_all_off()
1171 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_coex_all_off()
1183 u8 level = 0; in rtw_coex_action_freerun()
1197 if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[0])) in rtw_coex_action_freerun()
1227 tdma_case = 0; in rtw_coex_action_bt_whql_test()
1235 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_whql_test()
1249 tdma_case = 0; in rtw_coex_action_bt_relink()
1257 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_relink()
1270 u8 table_case = 0xff, tdma_case = 0xff; in rtw_coex_action_bt_idle()
1276 table_case = 0; in rtw_coex_action_bt_idle()
1277 tdma_case = 0; in rtw_coex_action_bt_idle()
1284 if (table_case != 0xff && tdma_case != 0xff) { in rtw_coex_action_bt_idle()
1310 } else if ((coex_stat->bt_ble_scan_type & 0x2) && in rtw_coex_action_bt_idle()
1320 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_idle()
1333 u32 slot_type = 0; in rtw_coex_action_bt_inquiry()
1343 if (coex_stat->bt_profile_num > 0) in rtw_coex_action_bt_inquiry()
1352 if (coex_stat->bt_profile_num == 0) { in rtw_coex_action_bt_inquiry()
1370 tdma_case = 0; in rtw_coex_action_bt_inquiry()
1401 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_inquiry()
1435 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_hfp()
1460 if (coex_stat->bt_a2dp_active || wl_bw == 0) in rtw_coex_action_bt_hid()
1467 if (coex_stat->bt_a2dp_active || wl_bw == 0) { in rtw_coex_action_bt_hid()
1500 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_hid()
1513 u32 slot_type = 0; in rtw_coex_action_bt_a2dp()
1519 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_a2dp()
1539 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp()
1556 tdma_case = 0; in rtw_coex_action_bt_a2dpsink()
1575 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dpsink()
1590 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_pan()
1610 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_pan()
1623 u32 slot_type = 0; in rtw_coex_action_bt_a2dp_hid()
1653 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_hid()
1669 coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_a2dp_pan()
1689 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan()
1721 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_pan_hid()
1753 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan_hid()
1768 table_case = 0; in rtw_coex_action_wl_under5g()
1769 tdma_case = 0; in rtw_coex_action_wl_under5g()
1777 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_under5g()
1791 tdma_case = 0; in rtw_coex_action_wl_only()
1799 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_only()
1817 tdma_case = 0; in rtw_coex_action_wl_native_lps()
1825 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_native_lps()
1837 u32 slot_type = 0; in rtw_coex_action_wl_linkscan()
1861 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_linkscan()
1875 tdma_case = 0; in rtw_coex_action_wl_not_connected()
1883 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_not_connected()
1899 COEX_RSSI_HIGH(coex_dm->bt_rssi_state[0])) { in rtw_coex_action_wl_connected()
2035 memset(coex_dm, 0, sizeof(*coex_dm)); in rtw_coex_init_coex_var()
2036 memset(coex_stat, 0, sizeof(*coex_stat)); in rtw_coex_init_coex_var()
2038 for (i = 0; i < COEX_CNT_WL_MAX; i++) in rtw_coex_init_coex_var()
2039 coex_stat->cnt_wl[i] = 0; in rtw_coex_init_coex_var()
2041 for (i = 0; i < COEX_CNT_BT_MAX; i++) in rtw_coex_init_coex_var()
2042 coex_stat->cnt_bt[i] = 0; in rtw_coex_init_coex_var()
2044 for (i = 0; i < ARRAY_SIZE(coex_dm->bt_rssi_state); i++) in rtw_coex_init_coex_var()
2047 for (i = 0; i < ARRAY_SIZE(coex_dm->wl_rssi_state); i++) in rtw_coex_init_coex_var()
2090 rtw_coex_table(rtwdev, 0); in __rtw_coex_init_hw_config()
2091 rtw_coex_tdma(rtwdev, true, 0); in __rtw_coex_init_hw_config()
2102 /* enable BB, we can write 0x948 */ in rtw_coex_power_on_setting()
2103 rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, BIT(0) | BIT(1)); in rtw_coex_power_on_setting()
2112 rtw_write8(rtwdev, 0xff1a, 0x0); in rtw_coex_power_on_setting()
2266 u8 para[6] = {0}; in rtw_coex_media_status_notify()
2286 para[0] = COEX_H2C69_WL_LEAKAP; in rtw_coex_media_status_notify()
2288 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_media_status_notify()
2294 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 0); in rtw_coex_media_status_notify()
2308 u8 i, rsp_source = 0, type; in rtw_coex_bt_info_notify()
2311 rsp_source = buf[0] & 0xf; in rtw_coex_bt_info_notify()
2345 for (i = 0; i < length; i++) { in rtw_coex_bt_info_notify()
2374 /* 0xff means BT is under WHCK test */ in rtw_coex_bt_info_notify()
2375 coex_stat->bt_whck_test = (coex_stat->bt_info_lb2 == 0xff); in rtw_coex_bt_info_notify()
2391 coex_stat->cnt_bt[COEX_CNT_BT_RETRY] = coex_stat->bt_info_lb3 & 0xf; in rtw_coex_bt_info_notify()
2422 coex_stat->bt_rssi = 0; in rtw_coex_bt_info_notify()
2425 coex_stat->bt_ble_exist = ((coex_stat->bt_info_hb1 & BIT(0)) == BIT(0)); in rtw_coex_bt_info_notify()
2465 coex_stat->bt_opp_exist = ((coex_stat->bt_info_hb2 & BIT(0)) == BIT(0)); in rtw_coex_bt_info_notify()
2471 coex_stat->bt_hid_slot = (coex_stat->bt_info_hb2 & 0x30) >> 4; in rtw_coex_bt_info_notify()
2472 coex_stat->bt_hid_pair_num = (coex_stat->bt_info_hb2 & 0xc0) >> 6; in rtw_coex_bt_info_notify()
2473 if (coex_stat->bt_hid_pair_num > 0 && coex_stat->bt_hid_slot >= 2) in rtw_coex_bt_info_notify()
2475 else if (coex_stat->bt_hid_pair_num == 0) in rtw_coex_bt_info_notify()
2478 if ((coex_stat->bt_info_lb2 & 0x49) == 0x49) in rtw_coex_bt_info_notify()
2479 coex_stat->bt_a2dp_bitpool = (coex_stat->bt_info_hb3 & 0x7f); in rtw_coex_bt_info_notify()
2481 coex_stat->bt_a2dp_bitpool = 0; in rtw_coex_bt_info_notify()
2499 if (buf[0] != 0x08) in rtw_coex_wl_fwdbginfo_notify()
2636 const char *sep = n == 0 ? "" : "/ "; in rtw_coex_addr_info()
2640 if (INFO_SIZE - n <= 0) in rtw_coex_addr_info()
2641 return 0; in rtw_coex_addr_info()
2659 return 0; in rtw_coex_addr_info()
2665 if (ffs == 0 && fls == max_fls) in rtw_coex_addr_info()
2680 const char *sep = n == 0 ? "" : "/ "; in rtw_coex_val_info()
2683 if (INFO_SIZE - n <= 0) in rtw_coex_val_info()
2684 return 0; in rtw_coex_val_info()
2703 return 0; in rtw_coex_val_info()
2716 int n_addr = 0; in rtw_coex_set_coexinfo_hw()
2718 int n_val = 0; in rtw_coex_set_coexinfo_hw()
2721 for (i = 0; i < chip->coex_info_hw_regs_num; i++) { in rtw_coex_set_coexinfo_hw()
2729 n_addr = 0; in rtw_coex_set_coexinfo_hw()
2730 n_val = 0; in rtw_coex_set_coexinfo_hw()
2734 if (n_addr != 0 && n_val != 0) in rtw_coex_set_coexinfo_hw()
2741 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_reg()
2749 req.para2 = le16_get_bits(le_addr, GENMASK(7, 0)); in rtw_coex_get_bt_reg()
2753 *val = 0xeaea; in rtw_coex_get_bt_reg()
2766 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_patch_version()
2787 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_supported_version()
2808 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_supported_feature()
2897 wl_reg_6c0 = rtw_read32(rtwdev, 0x6c0); in rtw_coex_display_coex_info()
2898 wl_reg_6c4 = rtw_read32(rtwdev, 0x6c4); in rtw_coex_display_coex_info()
2899 wl_reg_6c8 = rtw_read32(rtwdev, 0x6c8); in rtw_coex_display_coex_info()
2900 wl_reg_6cc = rtw_read32(rtwdev, 0x6cc); in rtw_coex_display_coex_info()
2901 wl_reg_778 = rtw_read32(rtwdev, 0x778); in rtw_coex_display_coex_info()
2902 bt_hi_pri = rtw_read32(rtwdev, 0x770); in rtw_coex_display_coex_info()
2903 bt_lo_pri = rtw_read32(rtwdev, 0x774); in rtw_coex_display_coex_info()
2904 rtw_write8(rtwdev, 0x76e, 0xc); in rtw_coex_display_coex_info()
2905 sys_lte = rtw_read8(rtwdev, 0x73); in rtw_coex_display_coex_info()
2906 lte_coex = rtw_coex_read_indirect_reg(rtwdev, 0x38); in rtw_coex_display_coex_info()
2907 bt_coex = rtw_coex_read_indirect_reg(rtwdev, 0x54); in rtw_coex_display_coex_info()
2915 rtw_coex_get_bt_reg(rtwdev, 3, 0xae, &coex_stat->bt_reg_vendor_ae); in rtw_coex_display_coex_info()
2916 rtw_coex_get_bt_reg(rtwdev, 3, 0xac, &coex_stat->bt_reg_vendor_ac); in rtw_coex_display_coex_info()
2918 if (coex_stat->patch_ver != 0) in rtw_coex_display_coex_info()
2929 seq_printf(m, "%-40s = %08x/ 0x%02x/ 0x%08x %s\n", in rtw_coex_display_coex_info()
2941 seq_printf(m, "%-40s = %u.%u/ 0x%x/ %c\n", in rtw_coex_display_coex_info()
2947 coex_dm->wl_ch_info[0], coex_dm->wl_ch_info[1], in rtw_coex_display_coex_info()
2973 seq_printf(m, "%-40s = %u/ %u/ %u/ 0x%08x\n", in rtw_coex_display_coex_info()
2985 seq_printf(m, "%-40s = 0x%04x/ 0x%04x/ 0x%04x/ 0x%04x\n", in rtw_coex_display_coex_info()
2986 "0xae/ 0xac/ score board (W->B)/ (B->W)", in rtw_coex_display_coex_info()
2992 bt_hi_pri & 0xffff, bt_hi_pri >> 16, in rtw_coex_display_coex_info()
2993 bt_lo_pri & 0xffff, bt_lo_pri >> 16); in rtw_coex_display_coex_info()
2994 for (i = 0; i < COEX_BTINFO_SRC_BT_IQK; i++) in rtw_coex_display_coex_info()
3026 seq_printf(m, "%-40s = %d/ 0x%08x/ 0x%08x/ 0x%08x\n", in rtw_coex_display_coex_info()
3027 "Table/ 0x6c0/ 0x6c4/ 0x6c8", in rtw_coex_display_coex_info()
3029 seq_printf(m, "%-40s = 0x%08x/ 0x%08x/ reason (%s)\n", in rtw_coex_display_coex_info()
3030 "0x778/ 0x6cc/ Reason", in rtw_coex_display_coex_info()