Lines Matching +full:0 +full:xf100

21 #define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
76 #define LWNG_CAPHDR_VERSION 0x80211001
82 u8 silence; /* 27 .. 154; seems to be 0 */
114 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
145 #define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
222 #define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
293 #define HFA384X_CMD_OFF 0x00
294 #define HFA384X_PARAM0_OFF 0x02
295 #define HFA384X_PARAM1_OFF 0x04
296 #define HFA384X_PARAM2_OFF 0x06
297 #define HFA384X_STATUS_OFF 0x08
298 #define HFA384X_RESP0_OFF 0x0A
299 #define HFA384X_RESP1_OFF 0x0C
300 #define HFA384X_RESP2_OFF 0x0E
301 #define HFA384X_INFOFID_OFF 0x10
302 #define HFA384X_CONTROL_OFF 0x14
303 #define HFA384X_SELECT0_OFF 0x18
304 #define HFA384X_SELECT1_OFF 0x1A
305 #define HFA384X_OFFSET0_OFF 0x1C
306 #define HFA384X_OFFSET1_OFF 0x1E
307 #define HFA384X_RXFID_OFF 0x20
308 #define HFA384X_ALLOCFID_OFF 0x22
309 #define HFA384X_TXCOMPLFID_OFF 0x24
310 #define HFA384X_SWSUPPORT0_OFF 0x28
311 #define HFA384X_SWSUPPORT1_OFF 0x2A
312 #define HFA384X_SWSUPPORT2_OFF 0x2C
313 #define HFA384X_EVSTAT_OFF 0x30
314 #define HFA384X_INTEN_OFF 0x32
315 #define HFA384X_EVACK_OFF 0x34
316 #define HFA384X_DATA0_OFF 0x36
317 #define HFA384X_DATA1_OFF 0x38
318 #define HFA384X_AUXPAGE_OFF 0x3A
319 #define HFA384X_AUXOFFSET_OFF 0x3C
320 #define HFA384X_AUXDATA_OFF 0x3E
325 #define HFA384X_CMD_OFF 0x00
326 #define HFA384X_PARAM0_OFF 0x04
327 #define HFA384X_PARAM1_OFF 0x08
328 #define HFA384X_PARAM2_OFF 0x0C
329 #define HFA384X_STATUS_OFF 0x10
330 #define HFA384X_RESP0_OFF 0x14
331 #define HFA384X_RESP1_OFF 0x18
332 #define HFA384X_RESP2_OFF 0x1C
333 #define HFA384X_INFOFID_OFF 0x20
334 #define HFA384X_CONTROL_OFF 0x28
335 #define HFA384X_SELECT0_OFF 0x30
336 #define HFA384X_SELECT1_OFF 0x34
337 #define HFA384X_OFFSET0_OFF 0x38
338 #define HFA384X_OFFSET1_OFF 0x3C
339 #define HFA384X_RXFID_OFF 0x40
340 #define HFA384X_ALLOCFID_OFF 0x44
341 #define HFA384X_TXCOMPLFID_OFF 0x48
342 #define HFA384X_PCICOR_OFF 0x4C
343 #define HFA384X_SWSUPPORT0_OFF 0x50
344 #define HFA384X_SWSUPPORT1_OFF 0x54
345 #define HFA384X_SWSUPPORT2_OFF 0x58
346 #define HFA384X_PCIHCR_OFF 0x5C
347 #define HFA384X_EVSTAT_OFF 0x60
348 #define HFA384X_INTEN_OFF 0x64
349 #define HFA384X_EVACK_OFF 0x68
350 #define HFA384X_DATA0_OFF 0x6C
351 #define HFA384X_DATA1_OFF 0x70
352 #define HFA384X_AUXPAGE_OFF 0x74
353 #define HFA384X_AUXOFFSET_OFF 0x78
354 #define HFA384X_AUXDATA_OFF 0x7C
355 #define HFA384X_PCI_M0_ADDRH_OFF 0x80
356 #define HFA384X_PCI_M0_ADDRL_OFF 0x84
357 #define HFA384X_PCI_M0_LEN_OFF 0x88
358 #define HFA384X_PCI_M0_CTL_OFF 0x8C
359 #define HFA384X_PCI_STATUS_OFF 0x98
360 #define HFA384X_PCI_M1_ADDRH_OFF 0xA0
361 #define HFA384X_PCI_M1_ADDRL_OFF 0xA4
362 #define HFA384X_PCI_M1_LEN_OFF 0xA8
363 #define HFA384X_PCI_M1_CTL_OFF 0xAC
367 #define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
368 #define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
374 #define HFA384X_CMDCODE_INIT 0x00
375 #define HFA384X_CMDCODE_ENABLE 0x01
376 #define HFA384X_CMDCODE_DISABLE 0x02
377 #define HFA384X_CMDCODE_ALLOC 0x0A
378 #define HFA384X_CMDCODE_TRANSMIT 0x0B
379 #define HFA384X_CMDCODE_INQUIRE 0x11
380 #define HFA384X_CMDCODE_ACCESS 0x21
381 #define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
382 #define HFA384X_CMDCODE_DOWNLOAD 0x22
383 #define HFA384X_CMDCODE_READMIF 0x30
384 #define HFA384X_CMDCODE_WRITEMIF 0x31
385 #define HFA384X_CMDCODE_TEST 0x38
387 #define HFA384X_CMDCODE_MASK 0x3F
390 #define HFA384X_TEST_CHANGE_CHANNEL 0x08
391 #define HFA384X_TEST_MONITOR 0x0B
392 #define HFA384X_TEST_STOP 0x0F
393 #define HFA384X_TEST_CFG_BITS 0x15
405 #define HFA384X_PROGMODE_DISABLE 0
410 #define HFA384X_AUX_MAGIC0 0xfe01
411 #define HFA384X_AUX_MAGIC1 0xdc23
412 #define HFA384X_AUX_MAGIC2 0xba45
414 #define HFA384X_AUX_PORT_DISABLED 0
437 #define HFA384X_EV_RX BIT(0)
441 #define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
442 #define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
443 #define HFA384X_INFO_COMMTALLIES 0xF100
444 #define HFA384X_INFO_SCANRESULTS 0xF101
445 #define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
446 #define HFA384X_INFO_HOSTSCANRESULTS 0xF103
447 #define HFA384X_INFO_LINKSTATUS 0xF200
448 #define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
449 #define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
450 #define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
451 #define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
461 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
464 #define HFA384X_RATES_1MBPS BIT(0)
473 #define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
482 #define HFA384X_RX_STATUS_FCSERR BIT(0)
489 enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1,
495 #define HFA384X_TX_CTRL_802_3 0
499 #define HFA384X_TX_STATUS_RETRYERR BIT(0)
505 #define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
506 #define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
507 #define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
508 #define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
509 #define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
517 #define PRISM2_TXFID_EMPTY 0xffff
518 #define PRISM2_TXFID_RESERVED 0xfffe
519 #define PRISM2_DUMMY_FID 0xffff
523 #define PRISM2_DUMP_RX_HDR BIT(0)
567 #define HOSTAP_HW_NO_DISABLE BIT(0)
677 #define HOSTAP_BITS_TRANSMIT 0
692 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
713 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF,
740 #define HOSTAP_WDS_BROADCAST_RA BIT(0)
751 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1,
826 #define PRISM2_INFO_PENDING_LINKSTATUS 0
842 int passive_scan_interval; /* in seconds, 0 = disabled */
917 #define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
929 #define HOSTAP_TX_FLAGS_WDS BIT(0)
942 #define DEBUG_FID BIT(0)
952 do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
954 do { if ((n) & DEBUG_MASK) printk(args); } while (0)
963 enum { BAP0 = 0, BAP1 = 1 };
965 #define PRISM2_IO_DEBUG_CMD_INB 0
988 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff; in prism2_io_debug_add()
990 local->io_debug_head = 0; in prism2_io_debug_add()
994 local->io_debug_head = 0; in prism2_io_debug_add()
1008 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err); in prism2_io_debug_error()
1010 local->io_debug_enabled = 0; in prism2_io_debug_error()
1044 #define prism2_callback(d, e) do { } while (0)