ath/ath5k/ath5k.h

2  * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3  * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
34 /* RX/TX descriptor hw structs
62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7	0x0057 /* AR5312 WMAC (AP30-040) */
63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8	0x0058 /* AR5312 WMAC (AP43-030) */
70 #define PCI_DEVICE_ID_ATHEROS_AR2413		0x001a /* AR2413 (Griffin-lite) */
72 #define PCI_DEVICE_ID_ATHEROS_AR5424		0x001c /* AR5424 (Condor PCI-E) */
189 #define AR5K_TUNE_NOISE_FLOOR			-72
190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE		-95
201 /*Swap RX/TX Descriptor for big endian archs*/
241 /* Rx latency for 5 and 10MHz operation (max ?) */
249 /* Default Tx/Rx latencies (same for 5211)*/
253 /* Tx frame to Tx data start delay */
274  * enum ath5k_version - MAC Chips
286  * enum ath5k_radio - PHY Chips
290  * @AR5K_RF2413: RF2413/2414 (Griffin/Griffin-Lite)
327 #define AR5K_SREV_AR2315_R6	0x86 /* AP51-Light */
328 #define AR5K_SREV_AR2315_R7	0x87 /* AP51-Full */
330 #define AR5K_SREV_AR2317_R1	0x90 /* AP61-Light */
331 #define AR5K_SREV_AR2317_R2	0x91 /* AP61-Full */
335 #define AR5K_SREV_AR5416	0xc0 /* PCI-E */
336 #define AR5K_SREV_AR5418	0xca /* PCI-E */
366 /* TODO add support to mac80211 for vendor-specific rates and modes */
373  * http://madwifi-project.org/wiki/ChipsetFeatures/SuperAG
375  * Atheros' eXtended Range - range enhancing extension is a modulation scheme
376  * that is supposed to double the link distance between an Atheros XR-enabled
377  * client device with an Atheros XR-enabled access point. This is achieved
378  * by increasing the receiver sensitivity up to, -105dBm, which is about 20dB
395  * -60Mbit/s at a 108Mbit/s signaling rate achieved through the bonding of two
399  * - Static: is the dumb version: devices set to this mode stick to it until
402  * - Dynamic: is the intelligent version, the network decides itself if it
404  *     (which would get used in turbo mode), or when a non-turbo station joins
413  * https://www.pcworld.com/article/id,113428-page,1/article.html
418  * greater speed-up:
420  * - Bursting: allows multiple frames to be sent at once, rather than pausing
421  *     after each frame. Bursting is a standards-compliant feature that can be
424  * - Fast frames: increases the amount of information that can be sent per
428  * - Compression: data frames are compressed in real time using a Lempel Ziv
439  * enum ath5k_driver_mode - PHY operation mode
456  * enum ath5k_ant_mode - Antenna operation mode
463  * @AR5K_ANTMODE_DEBUG: Debug mode -A -> Rx, B-> Tx-
480  * enum ath5k_bw_mode - Bandwidth operation mode
500  * struct ath5k_tx_status - TX Status descriptor
532  * enum ath5k_tx_queue - Queue types used to classify tx queues.
533  * @AR5K_TX_QUEUE_INACTIVE: q is unused -- see ath5k_hw_release_tx_queue
536  * @AR5K_TX_QUEUE_CAB: The after-beacon queue
551  * enum ath5k_tx_queue_subtype - Queue sub-types to classify normal data queues
553  * @AR5K_WME_AC_BE: Best-effort (normal) traffic
570  * enum ath5k_tx_queue_id - Queue ID numbers as returned by the hw functions
597 #define AR5K_TXQ_FLAG_TXEOLINT_ENABLE		0x0004	/* Enable TXEOL interrupt -not used- */
598 #define AR5K_TXQ_FLAG_TXDESCINT_ENABLE		0x0008	/* Enable TXDESC interrupt -not used- */
604 #define AR5K_TXQ_FLAG_BACKOFF_DISABLE		0x0200	/* Disable random post-backoff */
608 #define AR5K_TXQ_FLAG_COMPRESSION_ENABLE	0x2000	/* Enable hw compression -not implemented-*/
611  * struct ath5k_txq - Transmit queue state
642  * struct ath5k_txq_info - A struct to hold TX queue's parameters
646  * @tqi_aifs: Arbitrated Inter-frame Space
666  * enum ath5k_pkt_type - Transmit packet types
669  * @AR5K_PKT_TYPE_PSPOLL: PS-Poll
689 	(((ah->ah_txpower.txp_rates_power_table[(_r)]) & 0x3f) << (_v))	\
693 	(ah->ah_txpower.txp_rates_power_table[(_r)] & 0x3f) << (_v)	\
699   RX DEFINITIONS
703  * struct ath5k_rx_status - RX Status descriptor
731 #define AR5K_RXKEYIX_INVALID	((u8) -1)
732 #define AR5K_TXKEYIX_INVALID	((u32) -1)
760  * enum ath5k_rfgain - RF Gain optimization engine state
774  * struct ath5k_gain - RF Gain optimization engine state data
804  * struct ath5k_athchan_2ghz - 2GHz to 5GHZ map for RF5111
805  * @a2_flags: Channel flags (internal)
806  * @a2_athchan: HW channel number (internal)
819  * enum ath5k_dmasize -  DMA size definitions (2^(n+2))
854  * Seems the ar5xxx hardware supports up to 32 rates, indexed by 1-32.
856  * The rate code is used to get the RX rate or set the TX rate on the
857  * hardware descriptors. It is also used for internal modulation control
863  * ---------	-----------
867  * 0x04 - 05	-Reserved-
878  * 0x10 - 17	-Reserved-
886  * 0x1F		-Reserved-
942  * enum ath5k_int - Hardware interrupt masks helpers
944  * @AR5K_INT_RXDESC: Request RX descriptor/Read RX descriptor
947  * @AR5K_INT_RXEOL: Reached "End Of List", means we need more RX descriptors
948  * @AR5K_INT_RXORN: Indicates we got RX FIFO overrun. Note that Rx overrun is
952  * @AR5K_INT_RX_ALL: Mask to identify all RX related interrupts
970  * @AR5K_INT_RXPHY: RX PHY Error
971  * @AR5K_INT_RXKCM: RX Key cache miss
972  * @AR5K_INT_SWBA: SoftWare Beacon Alert - indicates its time to send a
1082  * enum ath5k_calibration_mask - Mask which calibration is active at the moment
1096  * enum ath5k_power_mode - Power management modes
1127 /* GPIO-controlled software LED */
1199 	unsigned int antenna_rx[5];	/* frames count per antenna RX */
1203 	unsigned int rx_all_count;	/* all RX frames, including errors */
1205 	unsigned int rx_bytes_count;	/* all RX bytes, including errored pkts
1249 #define	ATH_RXBUF	40		/* number of RX buffers */
1266 	struct mutex		lock;		/* dev-level lock */
1279 	struct ath5k_desc	*desc;		/* TX/RX descriptors */
1281 	size_t			desc_len;	/* size of TX/RX descriptors */
1298 	bool			rx_pending;	/* rx tasklet pending */
1311 	u32			*rxlink;	/* link ptr in last RX desc */
1312 	struct tasklet_struct	rxtq;		/* rx intr tasklet */
1313 	struct ath5k_led	rx_led;		/* rx led */
1541 /* RX filter control*/
1644 	return &ah->common;  in ath5k_hw_common()
1649 	return &(ath5k_hw_common(ah)->regulatory);  in ath5k_hw_regulatory()
1660 	    (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))  in ath5k_ahb_reg()
1663 	return ah->iobase + reg;  in ath5k_ahb_reg()
1680 	return ioread32(ah->iobase + reg);  in ath5k_hw_reg_read()
1685 	iowrite32(val, ah->iobase + reg);  in ath5k_hw_reg_write()
1692 	return ath5k_hw_common(ah)->bus_ops->ath_bus_type;  in ath5k_get_bus_type()
1697 	common->bus_ops->read_cachesize(common, csz);  in ath5k_read_cachesize()
1703 	return common->bus_ops->eeprom_read(common, off, data);  in ath5k_hw_nvram_read()