148 						       u32 ce_ctrl_addr,  in ath10k_ce_dest_ring_write_index_set()
156 						      u32 ce_ctrl_addr)  in ath10k_ce_dest_ring_write_index_get()
163 						      u32 ce_ctrl_addr,  in ath10k_ce_src_ring_write_index_set()
171 						     u32 ce_ctrl_addr)  in ath10k_ce_src_ring_write_index_get()
186 						    u32 ce_ctrl_addr)  in ath10k_ce_src_ring_read_index_get()
225 	u32 ce_ctrl_addr = ath10k_ce_base_address(ar, ce_id);  in ath10k_ce_src_ring_base_addr_set()  local
238 						u32 ce_ctrl_addr,  in ath10k_ce_set_src_ring_base_addr_hi()
248 					       u32 ce_ctrl_addr,  in ath10k_ce_src_ring_size_set()
256 					       u32 ce_ctrl_addr,  in ath10k_ce_src_ring_dmax_set()
270 						    u32 ce_ctrl_addr,  in ath10k_ce_src_ring_byte_swap_set()
284 						     u32 ce_ctrl_addr,  in ath10k_ce_dest_ring_byte_swap_set()
307 						     u32 ce_ctrl_addr)  in ath10k_ce_dest_ring_read_index_get()
330 	u32 ce_ctrl_addr = ath10k_ce_base_address(ar, ce_id);  in ath10k_ce_dest_ring_base_addr_set()  local
343 						 u32 ce_ctrl_addr,  in ath10k_ce_set_dest_ring_base_addr_hi()
358 						u32 ce_ctrl_addr,  in ath10k_ce_dest_ring_size_set()
366 						   u32 ce_ctrl_addr,  in ath10k_ce_src_ring_highmark_set()
378 						  u32 ce_ctrl_addr,  in ath10k_ce_src_ring_lowmark_set()
390 						    u32 ce_ctrl_addr,  in ath10k_ce_dest_ring_highmark_set()
402 						   u32 ce_ctrl_addr,  in ath10k_ce_dest_ring_lowmark_set()
414 							u32 ce_ctrl_addr)  in ath10k_ce_copy_complete_inter_enable()
426 							u32 ce_ctrl_addr)  in ath10k_ce_copy_complete_intr_disable()
438 						    u32 ce_ctrl_addr)  in ath10k_ce_watermark_intr_disable()
450 					       u32 ce_ctrl_addr)  in ath10k_ce_error_intr_enable()
463 						u32 ce_ctrl_addr)  in ath10k_ce_error_intr_disable()
476 						     u32 ce_ctrl_addr,  in ath10k_ce_engine_int_status_clear()