Lines Matching full:phydev
22 static u32 vsc8584_macsec_phy_read(struct phy_device *phydev, in vsc8584_macsec_phy_read() argument
29 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_read()
33 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_read()
42 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_read()
49 val = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_19); in vsc8584_macsec_phy_read()
52 val_l = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_17); in vsc8584_macsec_phy_read()
53 val_h = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_18); in vsc8584_macsec_phy_read()
56 phy_restore_page(phydev, rc, rc); in vsc8584_macsec_phy_read()
61 static void vsc8584_macsec_phy_write(struct phy_device *phydev, in vsc8584_macsec_phy_write() argument
67 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_write()
71 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_write()
80 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_17, (u16)val); in vsc8584_macsec_phy_write()
81 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_18, (u16)(val >> 16)); in vsc8584_macsec_phy_write()
83 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_write()
89 val = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_19); in vsc8584_macsec_phy_write()
93 phy_restore_page(phydev, rc, rc); in vsc8584_macsec_phy_write()
96 static void vsc8584_macsec_classification(struct phy_device *phydev, in vsc8584_macsec_classification() argument
100 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_CP_TAG, in vsc8584_macsec_classification()
106 static void vsc8584_macsec_flow_default_action(struct phy_device *phydev, in vsc8584_macsec_flow_default_action() argument
117 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_NM_FLOW_NCP, in vsc8584_macsec_flow_default_action()
134 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_NM_FLOW_CP, in vsc8584_macsec_flow_default_action()
153 static void vsc8584_macsec_integrity_checks(struct phy_device *phydev, in vsc8584_macsec_integrity_checks() argument
162 val = vsc8584_macsec_phy_read(phydev, bank, in vsc8584_macsec_integrity_checks()
166 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_PARAMS2_IG_CC_CONTROL, in vsc8584_macsec_integrity_checks()
169 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_PARAMS2_IG_CP_TAG, in vsc8584_macsec_integrity_checks()
175 static void vsc8584_macsec_block_init(struct phy_device *phydev, in vsc8584_macsec_block_init() argument
181 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_ENA_CFG, in vsc8584_macsec_block_init()
186 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_ENA_CFG, in vsc8584_macsec_block_init()
189 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_STATUS_CONTEXT_CTRL, in vsc8584_macsec_block_init()
191 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_MISC_CONTROL, in vsc8584_macsec_block_init()
196 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MS_COUNT_CONTROL); in vsc8584_macsec_block_init()
198 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_COUNT_CONTROL, val); in vsc8584_macsec_block_init()
201 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_PP_CTRL, in vsc8584_macsec_block_init()
204 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_BLOCK_CTX_UPDATE, 0x3); in vsc8584_macsec_block_init()
206 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MS_COUNT_CONTROL); in vsc8584_macsec_block_init()
208 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_COUNT_CONTROL, val); in vsc8584_macsec_block_init()
211 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_NON_VLAN_MTU_CHECK, in vsc8584_macsec_block_init()
216 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_VLAN_MTU_CHECK(i), in vsc8584_macsec_block_init()
221 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MS_INTR_CTRL_STATUS); in vsc8584_macsec_block_init()
223 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_INTR_CTRL_STATUS, val); in vsc8584_macsec_block_init()
225 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_FC_CFG, in vsc8584_macsec_block_init()
233 vsc8584_macsec_classification(phydev, bank); in vsc8584_macsec_block_init()
234 vsc8584_macsec_flow_default_action(phydev, bank, false); in vsc8584_macsec_block_init()
235 vsc8584_macsec_integrity_checks(phydev, bank); in vsc8584_macsec_block_init()
238 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_ENA_CFG, in vsc8584_macsec_block_init()
244 static void vsc8584_macsec_mac_init(struct phy_device *phydev, in vsc8584_macsec_mac_init() argument
252 vsc8584_macsec_phy_write(phydev, bank, 0x1c + i, 0); in vsc8584_macsec_mac_init()
254 val = vsc8584_macsec_phy_read(phydev, bank, in vsc8584_macsec_mac_init()
259 vsc8584_macsec_phy_write(phydev, bank, in vsc8584_macsec_mac_init()
262 val = vsc8584_macsec_phy_read(phydev, bank, in vsc8584_macsec_mac_init()
265 vsc8584_macsec_phy_write(phydev, bank, in vsc8584_macsec_mac_init()
268 val = vsc8584_macsec_phy_read(phydev, bank, in vsc8584_macsec_mac_init()
278 vsc8584_macsec_phy_write(phydev, bank, in vsc8584_macsec_mac_init()
281 vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_PKTINF_CFG, in vsc8584_macsec_mac_init()
292 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MAC_CFG_MODE_CFG); in vsc8584_macsec_mac_init()
294 vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_MODE_CFG, val); in vsc8584_macsec_mac_init()
296 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MAC_CFG_MAXLEN_CFG); in vsc8584_macsec_mac_init()
299 vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_MAXLEN_CFG, val); in vsc8584_macsec_mac_init()
301 vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_ADV_CHK_CFG, in vsc8584_macsec_mac_init()
307 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MAC_CFG_LFS_CFG); in vsc8584_macsec_mac_init()
309 vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_LFS_CFG, val); in vsc8584_macsec_mac_init()
311 vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_ENA_CFG, in vsc8584_macsec_mac_init()
319 static int __vsc8584_macsec_init(struct phy_device *phydev) in __vsc8584_macsec_init() argument
321 struct vsc8531_private *priv = phydev->priv; in __vsc8584_macsec_init()
325 vsc8584_macsec_block_init(phydev, MACSEC_INGR); in __vsc8584_macsec_init()
326 vsc8584_macsec_block_init(phydev, MACSEC_EGR); in __vsc8584_macsec_init()
327 vsc8584_macsec_mac_init(phydev, HOST_MAC); in __vsc8584_macsec_init()
328 vsc8584_macsec_mac_init(phydev, LINE_MAC); in __vsc8584_macsec_init()
330 vsc8584_macsec_phy_write(phydev, FC_BUFFER, in __vsc8584_macsec_init()
335 val = vsc8584_macsec_phy_read(phydev, FC_BUFFER, MSCC_FCBUF_MODE_CFG); in __vsc8584_macsec_init()
339 vsc8584_macsec_phy_write(phydev, FC_BUFFER, MSCC_FCBUF_MODE_CFG, val); in __vsc8584_macsec_init()
341 vsc8584_macsec_phy_write(phydev, FC_BUFFER, MSCC_FCBUF_PPM_RATE_ADAPT_THRESH_CFG, in __vsc8584_macsec_init()
345 val = vsc8584_macsec_phy_read(phydev, FC_BUFFER, in __vsc8584_macsec_init()
351 vsc8584_macsec_phy_write(phydev, FC_BUFFER, in __vsc8584_macsec_init()
354 val = vsc8584_macsec_phy_read(phydev, FC_BUFFER, MSCC_FCBUF_ENA_CFG); in __vsc8584_macsec_init()
356 vsc8584_macsec_phy_write(phydev, FC_BUFFER, MSCC_FCBUF_ENA_CFG, val); in __vsc8584_macsec_init()
360 val = vsc8584_macsec_phy_read(phydev, proc_bank, in __vsc8584_macsec_init()
364 vsc8584_macsec_phy_write(phydev, proc_bank, in __vsc8584_macsec_init()
370 static void vsc8584_macsec_flow(struct phy_device *phydev, in vsc8584_macsec_flow() argument
373 struct vsc8531_private *priv = phydev->priv; in vsc8584_macsec_flow()
394 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MATCH_SCI_LO(idx), in vsc8584_macsec_flow()
396 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MATCH_SCI_HI(idx), in vsc8584_macsec_flow()
403 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MAC_SA_MATCH_HI(idx), in vsc8584_macsec_flow()
409 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MISC_MATCH(idx), match); in vsc8584_macsec_flow()
410 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MASK(idx), mask); in vsc8584_macsec_flow()
445 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx), val); in vsc8584_macsec_flow()
451 struct vsc8531_private *priv = ctx->phydev->priv; in vsc8584_macsec_find_flow()
461 static void vsc8584_macsec_flow_enable(struct phy_device *phydev, in vsc8584_macsec_flow_enable() argument
472 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_ENTRY_SET1, BIT(idx)); in vsc8584_macsec_flow_enable()
475 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx)); in vsc8584_macsec_flow_enable()
477 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx), val); in vsc8584_macsec_flow_enable()
480 static void vsc8584_macsec_flow_disable(struct phy_device *phydev, in vsc8584_macsec_flow_disable() argument
487 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_ENTRY_CLEAR1, BIT(idx)); in vsc8584_macsec_flow_disable()
490 val = vsc8584_macsec_phy_read(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx)); in vsc8584_macsec_flow_disable()
492 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx), val); in vsc8584_macsec_flow_disable()
520 static int vsc8584_macsec_transformation(struct phy_device *phydev, in vsc8584_macsec_transformation() argument
523 struct vsc8531_private *priv = phydev->priv; in vsc8584_macsec_transformation()
555 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++), in vsc8584_macsec_transformation()
559 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++), in vsc8584_macsec_transformation()
564 vsc8584_macsec_phy_write(phydev, bank, in vsc8584_macsec_transformation()
570 vsc8584_macsec_phy_write(phydev, bank, in vsc8584_macsec_transformation()
575 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++), in vsc8584_macsec_transformation()
581 vsc8584_macsec_phy_write(phydev, bank, in vsc8584_macsec_transformation()
587 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++), in vsc8584_macsec_transformation()
589 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++), in vsc8584_macsec_transformation()
593 vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++), in vsc8584_macsec_transformation()
638 static int vsc8584_macsec_add_flow(struct phy_device *phydev, in vsc8584_macsec_add_flow() argument
644 vsc8584_macsec_flow(phydev, flow); in vsc8584_macsec_add_flow()
649 ret = vsc8584_macsec_transformation(phydev, flow); in vsc8584_macsec_add_flow()
651 vsc8584_macsec_free_flow(phydev->priv, flow); in vsc8584_macsec_add_flow()
658 static int vsc8584_macsec_default_flows(struct phy_device *phydev) in vsc8584_macsec_default_flows() argument
663 flow = vsc8584_macsec_alloc_flow(phydev->priv, MACSEC_INGR); in vsc8584_macsec_default_flows()
675 vsc8584_macsec_flow(phydev, flow); in vsc8584_macsec_default_flows()
676 vsc8584_macsec_flow_enable(phydev, flow); in vsc8584_macsec_default_flows()
679 flow = vsc8584_macsec_alloc_flow(phydev->priv, MACSEC_EGR); in vsc8584_macsec_default_flows()
690 vsc8584_macsec_flow(phydev, flow); in vsc8584_macsec_default_flows()
691 vsc8584_macsec_flow_enable(phydev, flow); in vsc8584_macsec_default_flows()
696 static void vsc8584_macsec_del_flow(struct phy_device *phydev, in vsc8584_macsec_del_flow() argument
699 vsc8584_macsec_flow_disable(phydev, flow); in vsc8584_macsec_del_flow()
700 vsc8584_macsec_free_flow(phydev->priv, flow); in vsc8584_macsec_del_flow()
706 struct phy_device *phydev = ctx->phydev; in __vsc8584_macsec_add_rxsa() local
707 struct vsc8531_private *priv = phydev->priv; in __vsc8584_macsec_add_rxsa()
727 return vsc8584_macsec_add_flow(phydev, flow, update); in __vsc8584_macsec_add_rxsa()
733 struct phy_device *phydev = ctx->phydev; in __vsc8584_macsec_add_txsa() local
734 struct vsc8531_private *priv = phydev->priv; in __vsc8584_macsec_add_txsa()
750 return vsc8584_macsec_add_flow(phydev, flow, update); in __vsc8584_macsec_add_txsa()
755 struct vsc8531_private *priv = ctx->phydev->priv; in vsc8584_macsec_dev_open()
763 vsc8584_macsec_flow_enable(ctx->phydev, flow); in vsc8584_macsec_dev_open()
770 struct vsc8531_private *priv = ctx->phydev->priv; in vsc8584_macsec_dev_stop()
778 vsc8584_macsec_flow_disable(ctx->phydev, flow); in vsc8584_macsec_dev_stop()
785 struct vsc8531_private *priv = ctx->phydev->priv; in vsc8584_macsec_add_secy()
797 vsc8584_macsec_flow_default_action(ctx->phydev, MACSEC_EGR, in vsc8584_macsec_add_secy()
799 vsc8584_macsec_flow_default_action(ctx->phydev, MACSEC_INGR, in vsc8584_macsec_add_secy()
802 return vsc8584_macsec_default_flows(ctx->phydev); in vsc8584_macsec_add_secy()
807 struct vsc8531_private *priv = ctx->phydev->priv; in vsc8584_macsec_del_secy()
815 vsc8584_macsec_del_flow(ctx->phydev, flow); in vsc8584_macsec_del_secy()
817 vsc8584_macsec_flow_default_action(ctx->phydev, MACSEC_EGR, false); in vsc8584_macsec_del_secy()
818 vsc8584_macsec_flow_default_action(ctx->phydev, MACSEC_INGR, false); in vsc8584_macsec_del_secy()
847 struct vsc8531_private *priv = ctx->phydev->priv; in vsc8584_macsec_del_rxsc()
857 vsc8584_macsec_del_flow(ctx->phydev, flow); in vsc8584_macsec_del_rxsc()
874 vsc8584_macsec_flow_enable(ctx->phydev, flow); in vsc8584_macsec_add_rxsa()
888 vsc8584_macsec_flow_disable(ctx->phydev, flow); in vsc8584_macsec_upd_rxsa()
893 vsc8584_macsec_flow_enable(ctx->phydev, flow); in vsc8584_macsec_upd_rxsa()
908 vsc8584_macsec_del_flow(ctx->phydev, flow); in vsc8584_macsec_del_rxsa()
923 vsc8584_macsec_flow_enable(ctx->phydev, flow); in vsc8584_macsec_add_txsa()
937 vsc8584_macsec_flow_disable(ctx->phydev, flow); in vsc8584_macsec_upd_txsa()
942 vsc8584_macsec_flow_enable(ctx->phydev, flow); in vsc8584_macsec_upd_txsa()
957 vsc8584_macsec_del_flow(ctx->phydev, flow); in vsc8584_macsec_del_txsa()
978 int vsc8584_macsec_init(struct phy_device *phydev) in vsc8584_macsec_init() argument
980 struct vsc8531_private *vsc8531 = phydev->priv; in vsc8584_macsec_init()
982 switch (phydev->phy_id & phydev->drv->phy_id_mask) { in vsc8584_macsec_init()
989 phydev->macsec_ops = &vsc8584_macsec_ops; in vsc8584_macsec_init()
991 return __vsc8584_macsec_init(phydev); in vsc8584_macsec_init()
997 void vsc8584_handle_macsec_interrupt(struct phy_device *phydev) in vsc8584_handle_macsec_interrupt() argument
999 struct vsc8531_private *priv = phydev->priv; in vsc8584_handle_macsec_interrupt()
1004 cause = vsc8584_macsec_phy_read(phydev, MACSEC_EGR, in vsc8584_handle_macsec_interrupt()
1017 val = vsc8584_macsec_phy_read(phydev, MACSEC_EGR, in vsc8584_handle_macsec_interrupt()
1020 vsc8584_macsec_flow_disable(phydev, flow); in vsc8584_handle_macsec_interrupt()
1027 void vsc8584_config_macsec_intr(struct phy_device *phydev) in vsc8584_config_macsec_intr() argument
1029 phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_EXTENDED_2); in vsc8584_config_macsec_intr()
1030 phy_write(phydev, MSCC_PHY_EXTENDED_INT, MSCC_PHY_EXTENDED_INT_MS_EGR); in vsc8584_config_macsec_intr()
1031 phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); in vsc8584_config_macsec_intr()
1033 vsc8584_macsec_phy_write(phydev, MACSEC_EGR, MSCC_MS_AIC_CTRL, 0xf); in vsc8584_config_macsec_intr()
1034 vsc8584_macsec_phy_write(phydev, MACSEC_EGR, MSCC_MS_INTR_CTRL_STATUS, in vsc8584_config_macsec_intr()