Lines Matching full:phydev
155 static int dp83869_read_status(struct phy_device *phydev) in dp83869_read_status() argument
157 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()
160 ret = genphy_read_status(phydev); in dp83869_read_status()
164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) { in dp83869_read_status()
165 if (phydev->link) { in dp83869_read_status()
167 phydev->speed = SPEED_100; in dp83869_read_status()
169 phydev->speed = SPEED_UNKNOWN; in dp83869_read_status()
170 phydev->duplex = DUPLEX_UNKNOWN; in dp83869_read_status()
177 static int dp83869_ack_interrupt(struct phy_device *phydev) in dp83869_ack_interrupt() argument
179 int err = phy_read(phydev, MII_DP83869_ISR); in dp83869_ack_interrupt()
187 static int dp83869_config_intr(struct phy_device *phydev) in dp83869_config_intr() argument
191 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83869_config_intr()
192 micr_status = phy_read(phydev, MII_DP83869_MICR); in dp83869_config_intr()
204 return phy_write(phydev, MII_DP83869_MICR, micr_status); in dp83869_config_intr()
207 return phy_write(phydev, MII_DP83869_MICR, micr_status); in dp83869_config_intr()
210 static int dp83869_set_wol(struct phy_device *phydev, in dp83869_set_wol() argument
213 struct net_device *ndev = phydev->attached_dev; in dp83869_set_wol()
218 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol()
222 val_micr = phy_read(phydev, MII_DP83869_MICR); in dp83869_set_wol()
238 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
244 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
250 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
262 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
268 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
273 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
298 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg); in dp83869_set_wol()
302 return phy_write(phydev, MII_DP83869_MICR, val_micr); in dp83869_set_wol()
305 static void dp83869_get_wol(struct phy_device *phydev, in dp83869_get_wol() argument
314 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol()
316 phydev_err(phydev, "Failed to read RX CFG\n"); in dp83869_get_wol()
330 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
333 phydev_err(phydev, "Failed to read RX SOP 1\n"); in dp83869_get_wol()
340 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
343 phydev_err(phydev, "Failed to read RX SOP 2\n"); in dp83869_get_wol()
350 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
353 phydev_err(phydev, "Failed to read RX SOP 3\n"); in dp83869_get_wol()
367 static int dp83869_get_downshift(struct phy_device *phydev, u8 *data) in dp83869_get_downshift() argument
371 val = phy_read(phydev, DP83869_CFG2); in dp83869_get_downshift()
400 static int dp83869_set_downshift(struct phy_device *phydev, u8 cnt) in dp83869_set_downshift() argument
408 return phy_clear_bits(phydev, DP83869_CFG2, in dp83869_set_downshift()
425 phydev_err(phydev, in dp83869_set_downshift()
433 return phy_modify(phydev, DP83869_CFG2, in dp83869_set_downshift()
438 static int dp83869_get_tunable(struct phy_device *phydev, in dp83869_get_tunable() argument
443 return dp83869_get_downshift(phydev, data); in dp83869_get_tunable()
449 static int dp83869_set_tunable(struct phy_device *phydev, in dp83869_set_tunable() argument
454 return dp83869_set_downshift(phydev, *(const u8 *)data); in dp83869_set_tunable()
460 static int dp83869_config_port_mirroring(struct phy_device *phydev) in dp83869_config_port_mirroring() argument
462 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_port_mirroring()
465 return phy_set_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
469 return phy_clear_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
474 static int dp83869_set_strapped_mode(struct phy_device *phydev) in dp83869_set_strapped_mode() argument
476 struct dp83869_private *dp83869 = phydev->priv; in dp83869_set_strapped_mode()
479 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode()
493 static int dp83869_of_init(struct phy_device *phydev) in dp83869_of_init() argument
495 struct dp83869_private *dp83869 = phydev->priv; in dp83869_of_init()
496 struct device *dev = &phydev->mdio.dev; in dp83869_of_init()
518 ret = dp83869_set_strapped_mode(phydev); in dp83869_of_init()
532 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init()
552 dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev, in dp83869_of_init()
559 dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev, in dp83869_of_init()
569 static int dp83869_of_init(struct phy_device *phydev) in dp83869_of_init() argument
571 return dp83869_set_strapped_mode(phydev); in dp83869_of_init()
575 static int dp83869_configure_rgmii(struct phy_device *phydev, in dp83869_configure_rgmii() argument
580 if (phy_interface_is_rgmii(phydev)) { in dp83869_configure_rgmii()
581 val = phy_read(phydev, MII_DP83869_PHYCTRL); in dp83869_configure_rgmii()
589 ret = phy_write(phydev, MII_DP83869_PHYCTRL, val); in dp83869_configure_rgmii()
595 ret = phy_modify_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_rgmii()
604 static int dp83869_configure_fiber(struct phy_device *phydev, in dp83869_configure_fiber() argument
611 linkmode_and(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
612 phydev->supported); in dp83869_configure_fiber()
614 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported); in dp83869_configure_fiber()
615 linkmode_set_bit(ADVERTISED_FIBRE, phydev->advertising); in dp83869_configure_fiber()
619 phydev->supported); in dp83869_configure_fiber()
622 phydev->supported); in dp83869_configure_fiber()
624 phydev->supported); in dp83869_configure_fiber()
627 bmcr = phy_read(phydev, MII_BMCR); in dp83869_configure_fiber()
631 phydev->autoneg = AUTONEG_DISABLE; in dp83869_configure_fiber()
632 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); in dp83869_configure_fiber()
633 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising); in dp83869_configure_fiber()
636 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); in dp83869_configure_fiber()
643 linkmode_or(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
644 phydev->supported); in dp83869_configure_fiber()
649 static int dp83869_configure_mode(struct phy_device *phydev, in dp83869_configure_mode() argument
662 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, in dp83869_configure_mode()
667 ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT); in dp83869_configure_mode()
677 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
682 ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT); in dp83869_configure_mode()
686 ret = dp83869_configure_rgmii(phydev, dp83869); in dp83869_configure_mode()
691 ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, in dp83869_configure_mode()
697 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
704 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
709 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
715 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
721 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
726 ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT); in dp83869_configure_mode()
730 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
738 ret = dp83869_configure_fiber(phydev, dp83869); in dp83869_configure_mode()
747 static int dp83869_config_init(struct phy_device *phydev) in dp83869_config_init() argument
749 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_init()
753 ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN, in dp83869_config_init()
758 ret = dp83869_configure_mode(phydev, dp83869); in dp83869_config_init()
763 if (phy_interrupt_is_valid(phydev)) { in dp83869_config_init()
764 val = phy_read(phydev, DP83869_CFG4); in dp83869_config_init()
766 phy_write(phydev, DP83869_CFG4, val); in dp83869_config_init()
770 dp83869_config_port_mirroring(phydev); in dp83869_config_init()
774 ret = phy_modify_mmd(phydev, in dp83869_config_init()
780 if (phy_interface_is_rgmii(phydev)) { in dp83869_config_init()
781 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL, in dp83869_config_init()
787 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
791 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in dp83869_config_init()
795 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) in dp83869_config_init()
798 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) in dp83869_config_init()
801 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL, in dp83869_config_init()
808 static int dp83869_probe(struct phy_device *phydev) in dp83869_probe() argument
813 dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869), in dp83869_probe()
818 phydev->priv = dp83869; in dp83869_probe()
820 ret = dp83869_of_init(phydev); in dp83869_probe()
824 return dp83869_config_init(phydev); in dp83869_probe()
827 static int dp83869_phy_reset(struct phy_device *phydev) in dp83869_phy_reset() argument
831 ret = phy_write(phydev, DP83869_CTRL, DP83869_SW_RESET); in dp83869_phy_reset()
840 return dp83869_config_init(phydev); in dp83869_phy_reset()