Lines Matching +full:enet +full:- +full:phy +full:- +full:lane +full:- +full:swap
1 // SPDX-License-Identifier: GPL-2.0
2 /* Driver for the Texas Instruments DP83869 PHY
12 #include <linux/phy.h>
16 #include <dt-bindings/net/ti-dp83869.h>
69 /* This is the same bit mask as the BMCR so re-use the BMCR default */
157 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()
164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) { in dp83869_read_status()
165 if (phydev->link) { in dp83869_read_status()
166 if (dp83869->mode == DP83869_RGMII_100_BASE) in dp83869_read_status()
167 phydev->speed = SPEED_100; in dp83869_read_status()
169 phydev->speed = SPEED_UNKNOWN; in dp83869_read_status()
170 phydev->duplex = DUPLEX_UNKNOWN; in dp83869_read_status()
191 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83869_config_intr()
213 struct net_device *ndev = phydev->attached_dev; in dp83869_set_wol()
226 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83869_set_wol()
231 if (wol->wolopts & WAKE_MAGIC || in dp83869_set_wol()
232 wol->wolopts & WAKE_MAGICSECURE) { in dp83869_set_wol()
233 mac = (u8 *)ndev->dev_addr; in dp83869_set_wol()
236 return -EINVAL; in dp83869_set_wol()
261 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83869_set_wol()
264 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83869_set_wol()
270 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83869_set_wol()
275 (wol->sopass[5] << 8) | wol->sopass[4]); in dp83869_set_wol()
284 if (wol->wolopts & WAKE_UCAST) in dp83869_set_wol()
289 if (wol->wolopts & WAKE_BCAST) in dp83869_set_wol()
310 wol->supported = (WAKE_UCAST | WAKE_BCAST | WAKE_MAGIC | in dp83869_get_wol()
312 wol->wolopts = 0; in dp83869_get_wol()
321 wol->wolopts |= WAKE_UCAST; in dp83869_get_wol()
324 wol->wolopts |= WAKE_BCAST; in dp83869_get_wol()
327 wol->wolopts |= WAKE_MAGIC; in dp83869_get_wol()
337 wol->sopass[0] = (sopass_val & 0xff); in dp83869_get_wol()
338 wol->sopass[1] = (sopass_val >> 8); in dp83869_get_wol()
347 wol->sopass[2] = (sopass_val & 0xff); in dp83869_get_wol()
348 wol->sopass[3] = (sopass_val >> 8); in dp83869_get_wol()
357 wol->sopass[4] = (sopass_val & 0xff); in dp83869_get_wol()
358 wol->sopass[5] = (sopass_val >> 8); in dp83869_get_wol()
360 wol->wolopts |= WAKE_MAGICSECURE; in dp83869_get_wol()
364 wol->wolopts = 0; in dp83869_get_wol()
392 return -EINVAL; in dp83869_get_downshift()
405 return -EINVAL; in dp83869_set_downshift()
427 return -EINVAL; in dp83869_set_downshift()
441 switch (tuna->id) { in dp83869_get_tunable()
445 return -EOPNOTSUPP; in dp83869_get_tunable()
452 switch (tuna->id) { in dp83869_set_tunable()
456 return -EOPNOTSUPP; in dp83869_set_tunable()
462 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_port_mirroring()
464 if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN) in dp83869_config_port_mirroring()
476 struct dp83869_private *dp83869 = phydev->priv; in dp83869_set_strapped_mode()
483 dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK; in dp83869_set_strapped_mode()
495 struct dp83869_private *dp83869 = phydev->priv; in dp83869_of_init()
496 struct device *dev = &phydev->mdio.dev; in dp83869_of_init()
497 struct device_node *of_node = dev->of_node; in dp83869_of_init()
502 return -ENODEV; in dp83869_of_init()
504 dp83869->io_impedance = -EINVAL; in dp83869_of_init()
507 ret = of_property_read_u32(of_node, "ti,clk-output-sel", in dp83869_of_init()
508 &dp83869->clk_output_sel); in dp83869_of_init()
509 if (ret || dp83869->clk_output_sel > DP83869_CLK_O_SEL_REF_CLK) in dp83869_of_init()
510 dp83869->clk_output_sel = DP83869_CLK_O_SEL_REF_CLK; in dp83869_of_init()
512 ret = of_property_read_u32(of_node, "ti,op-mode", &dp83869->mode); in dp83869_of_init()
514 if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET || in dp83869_of_init()
515 dp83869->mode > DP83869_SGMII_COPPER_ETHERNET) in dp83869_of_init()
516 return -EINVAL; in dp83869_of_init()
523 if (of_property_read_bool(of_node, "ti,max-output-impedance")) in dp83869_of_init()
524 dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX; in dp83869_of_init()
525 else if (of_property_read_bool(of_node, "ti,min-output-impedance")) in dp83869_of_init()
526 dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN; in dp83869_of_init()
528 if (of_property_read_bool(of_node, "enet-phy-lane-swap")) { in dp83869_of_init()
529 dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN; in dp83869_of_init()
531 /* If the lane swap is not in the DT then check the straps */ in dp83869_of_init()
537 dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN; in dp83869_of_init()
539 dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS; in dp83869_of_init()
544 if (of_property_read_u32(of_node, "rx-fifo-depth", in dp83869_of_init()
545 &dp83869->rx_fifo_depth)) in dp83869_of_init()
546 dp83869->rx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; in dp83869_of_init()
548 if (of_property_read_u32(of_node, "tx-fifo-depth", in dp83869_of_init()
549 &dp83869->tx_fifo_depth)) in dp83869_of_init()
550 dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; in dp83869_of_init()
552 dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev, in dp83869_of_init()
555 if (dp83869->rx_int_delay < 0) in dp83869_of_init()
556 dp83869->rx_int_delay = in dp83869_of_init()
559 dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev, in dp83869_of_init()
562 if (dp83869->tx_int_delay < 0) in dp83869_of_init()
563 dp83869->tx_int_delay = in dp83869_of_init()
586 val |= (dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT); in dp83869_configure_rgmii()
587 val |= (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT); in dp83869_configure_rgmii()
594 if (dp83869->io_impedance >= 0) in dp83869_configure_rgmii()
598 dp83869->io_impedance & in dp83869_configure_rgmii()
610 /* Only allow advertising what this PHY supports */ in dp83869_configure_fiber()
611 linkmode_and(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
612 phydev->supported); in dp83869_configure_fiber()
614 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported); in dp83869_configure_fiber()
615 linkmode_set_bit(ADVERTISED_FIBRE, phydev->advertising); in dp83869_configure_fiber()
617 if (dp83869->mode == DP83869_RGMII_1000_BASE) { in dp83869_configure_fiber()
619 phydev->supported); in dp83869_configure_fiber()
622 phydev->supported); in dp83869_configure_fiber()
624 phydev->supported); in dp83869_configure_fiber()
631 phydev->autoneg = AUTONEG_DISABLE; in dp83869_configure_fiber()
632 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); in dp83869_configure_fiber()
633 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising); in dp83869_configure_fiber()
643 linkmode_or(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
644 phydev->supported); in dp83869_configure_fiber()
655 if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET || in dp83869_configure_mode()
656 dp83869->mode > DP83869_SGMII_COPPER_ETHERNET) in dp83869_configure_mode()
657 return -EINVAL; in dp83869_configure_mode()
663 dp83869->mode); in dp83869_configure_mode()
671 phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT | in dp83869_configure_mode()
672 dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT | in dp83869_configure_mode()
675 switch (dp83869->mode) { in dp83869_configure_mode()
741 return -EINVAL; in dp83869_configure_mode()
749 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_init()
752 /* Force speed optimization for the PHY even if it strapped */ in dp83869_config_init()
769 if (dp83869->port_mirroring != DP83869_PORT_MIRRORING_KEEP) in dp83869_config_init()
773 if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK) in dp83869_config_init()
777 dp83869->clk_output_sel << in dp83869_config_init()
782 dp83869->rx_int_delay | in dp83869_config_init()
783 dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT); in dp83869_config_init()
791 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in dp83869_config_init()
795 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) in dp83869_config_init()
798 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) in dp83869_config_init()
813 dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869), in dp83869_probe()
816 return -ENOMEM; in dp83869_probe()
818 phydev->priv = dp83869; in dp83869_probe()
838 * Need to set the registers in the PHY to the right config. in dp83869_phy_reset()
875 MODULE_DESCRIPTION("Texas Instruments DP83869 PHY driver");