1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/delay.h>
64  * The bit-fields are the same as specified by IEEE for EEE.
86 /* RGMII internal delay settings for rx and tx for ADIN1300 */
108  * struct adin_cfg_reg_map - map a config value to aregister value
137  * struct adin_clause45_mmd_map - map to convert Clause 45 regs to Clause 22
176  * struct adin_priv - ADIN PHY driver private data
192 	return -EINVAL;  in adin_lookup_reg_value()
200 	struct device *dev = &phydev->mdio.dev;  in adin_get_reg_value()
234 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in adin_config_rgmii_mode()
235 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {  in adin_config_rgmii_mode()
238 		val = adin_get_reg_value(phydev, "adi,rx-internal-delay-ps",  in adin_config_rgmii_mode()
247 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in adin_config_rgmii_mode()
248 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {  in adin_config_rgmii_mode()
251 		val = adin_get_reg_value(phydev, "adi,tx-internal-delay-ps",  in adin_config_rgmii_mode()
269 	if (phydev->interface != PHY_INTERFACE_MODE_RMII)  in adin_config_rmii_mode()
280 	val = adin_get_reg_value(phydev, "adi,fifo-depth-bits",  in adin_config_rmii_mode()
321 		return -E2BIG;  in adin_set_downshift()
376 		return -EINVAL;  in adin_set_edpd()
387 	switch (tuna->id) {  in adin_get_tunable()
393 		return -EOPNOTSUPP;  in adin_get_tunable()
400 	switch (tuna->id) {  in adin_set_tunable()
406 		return -EOPNOTSUPP;  in adin_set_tunable()
414 	phydev->mdix_ctrl = ETH_TP_MDI_AUTO;  in adin_config_init()
433 		   phy_modes(phydev->interface));  in adin_config_init()
448 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)  in adin_phy_config_intr()
467 		if (m->devad == devad && m->cl45_regnum == cl45_regnum)  in adin_cl45_to_adin_reg()
468 			return m->adin_regnum;  in adin_cl45_to_adin_reg()
475 	return -EINVAL;  in adin_cl45_to_adin_reg()
480 	struct mii_bus *bus = phydev->mdio.bus;  in adin_read_mmd()
481 	int phy_addr = phydev->mdio.addr;  in adin_read_mmd()
500 	struct mii_bus *bus = phydev->mdio.bus;  in adin_write_mmd()
501 	int phy_addr = phydev->mdio.addr;  in adin_write_mmd()
524 	switch (phydev->mdix_ctrl) {  in adin_config_mdix()
534 		return -EINVAL;  in adin_config_mdix()
581 			phydev->mdix = ETH_TP_MDI_X;  in adin_mdix_update()
583 			phydev->mdix = ETH_TP_MDI;  in adin_mdix_update()
589 	 * When Auto-MDI is enabled, the ADIN1300_MAN_MDIX_EN bit implies  in adin_mdix_update()
599 		phydev->mdix = ETH_TP_MDI_X;  in adin_mdix_update()
601 		phydev->mdix = ETH_TP_MDI;  in adin_mdix_update()
621 	/* The reset bit is self-clearing, set it and wait */  in adin_soft_reset()
658 	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1);  in adin_read_mmd_stat_regs()
664 	if (stat->reg2 == 0)  in adin_read_mmd_stat_regs()
667 	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2);  in adin_read_mmd_stat_regs()
680 	struct adin_priv *priv = phydev->priv;  in adin_get_stat()
684 	if (stat->reg1 > 0x1f) {  in adin_get_stat()
689 		ret = phy_read(phydev, stat->reg1);  in adin_get_stat()
695 	priv->stats[i] += val;  in adin_get_stat()
697 	return priv->stats[i];  in adin_get_stat()
705 	/* latch copies of all the frame-checker counters */  in adin_get_stats()
716 	struct device *dev = &phydev->mdio.dev;  in adin_probe()
721 		return -ENOMEM;  in adin_probe()
723 	phydev->priv = priv;  in adin_probe()