Lines Matching +full:axi +full:- +full:config
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx Axi Ethernet device driver
6 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
7 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
8 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
9 * Copyright (c) 2010 - 2011 PetaLogix
11 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
13 * This is a driver for the Xilinx Axi Ethernet which is used in the Virtex6
17 * - Add Axi Fifo support.
18 * - Factor out Axi DMA code into separate driver.
19 * - Test and fix basic multicast filtering.
20 * - Add support for extended multicast filtering.
21 * - Test basic VLAN support.
22 * - Add support for extended VLAN support.
51 #define DRIVER_DESCRIPTION "Xilinx Axi Ethernet driver"
58 { .compatible = "xlnx,axi-ethernet-1.00.a", },
59 { .compatible = "xlnx,axi-ethernet-1.01.a", },
60 { .compatible = "xlnx,axi-ethernet-2.01.a", },
66 /* Option table for setting up Axi Ethernet hardware options */
122 * axienet_dma_in32 - Memory mapped Axi DMA register read
124 * @reg: Address offset from the base address of the Axi DMA core
126 * Return: The contents of the Axi DMA register
128 * This function returns the contents of the corresponding Axi DMA register.
132 return ioread32(lp->dma_regs + reg); in axienet_dma_in32()
136 * axienet_dma_out32 - Memory mapped Axi DMA register write.
138 * @reg: Address offset from the base address of the Axi DMA core
139 * @value: Value to be written into the Axi DMA register
141 * This function writes the desired value into the corresponding Axi DMA
147 iowrite32(value, lp->dma_regs + reg); in axienet_dma_out32()
155 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_out_addr()
162 desc->phys = lower_32_bits(addr); in desc_set_phys_addr()
163 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_set_phys_addr()
164 desc->phys_msb = upper_32_bits(addr); in desc_set_phys_addr()
170 dma_addr_t ret = desc->phys; in desc_get_phys_addr()
172 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_get_phys_addr()
173 ret |= ((dma_addr_t)desc->phys_msb << 16) << 16; in desc_get_phys_addr()
179 * axienet_dma_bd_release - Release buffer descriptor rings
183 * axienet_dma_bd_init. axienet_dma_bd_release is called when Axi Ethernet
192 dma_free_coherent(ndev->dev.parent, in axienet_dma_bd_release()
193 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_release()
194 lp->tx_bd_v, in axienet_dma_bd_release()
195 lp->tx_bd_p); in axienet_dma_bd_release()
197 if (!lp->rx_bd_v) in axienet_dma_bd_release()
200 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_release()
206 if (!lp->rx_bd_v[i].skb) in axienet_dma_bd_release()
209 dev_kfree_skb(lp->rx_bd_v[i].skb); in axienet_dma_bd_release()
211 /* For each descriptor, we programmed cntrl with the (non-zero) in axienet_dma_bd_release()
213 * So a non-zero value in there means we need to unmap it. in axienet_dma_bd_release()
215 if (lp->rx_bd_v[i].cntrl) { in axienet_dma_bd_release()
216 phys = desc_get_phys_addr(lp, &lp->rx_bd_v[i]); in axienet_dma_bd_release()
217 dma_unmap_single(ndev->dev.parent, phys, in axienet_dma_bd_release()
218 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_release()
222 dma_free_coherent(ndev->dev.parent, in axienet_dma_bd_release()
223 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_release()
224 lp->rx_bd_v, in axienet_dma_bd_release()
225 lp->rx_bd_p); in axienet_dma_bd_release()
229 * axienet_dma_bd_init - Setup buffer descriptor rings for Axi DMA
232 * Return: 0, on success -ENOMEM, on failure
236 * and is called when Axi Ethernet driver reset is called.
246 lp->tx_bd_ci = 0; in axienet_dma_bd_init()
247 lp->tx_bd_tail = 0; in axienet_dma_bd_init()
248 lp->rx_bd_ci = 0; in axienet_dma_bd_init()
251 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent, in axienet_dma_bd_init()
252 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_init()
253 &lp->tx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
254 if (!lp->tx_bd_v) in axienet_dma_bd_init()
255 return -ENOMEM; in axienet_dma_bd_init()
257 lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent, in axienet_dma_bd_init()
258 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_init()
259 &lp->rx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
260 if (!lp->rx_bd_v) in axienet_dma_bd_init()
263 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_bd_init()
264 dma_addr_t addr = lp->tx_bd_p + in axienet_dma_bd_init()
265 sizeof(*lp->tx_bd_v) * in axienet_dma_bd_init()
266 ((i + 1) % lp->tx_bd_num); in axienet_dma_bd_init()
268 lp->tx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
269 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
270 lp->tx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
273 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_init()
276 addr = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * in axienet_dma_bd_init()
277 ((i + 1) % lp->rx_bd_num); in axienet_dma_bd_init()
278 lp->rx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
279 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
280 lp->rx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
282 skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_dma_bd_init()
286 lp->rx_bd_v[i].skb = skb; in axienet_dma_bd_init()
287 addr = dma_map_single(ndev->dev.parent, skb->data, in axienet_dma_bd_init()
288 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_init()
289 if (dma_mapping_error(ndev->dev.parent, addr)) { in axienet_dma_bd_init()
293 desc_set_phys_addr(lp, addr, &lp->rx_bd_v[i]); in axienet_dma_bd_init()
295 lp->rx_bd_v[i].cntrl = lp->max_frm_size; in axienet_dma_bd_init()
302 ((lp->coalesce_count_rx) << XAXIDMA_COALESCE_SHIFT)); in axienet_dma_bd_init()
315 ((lp->coalesce_count_tx) << XAXIDMA_COALESCE_SHIFT)); in axienet_dma_bd_init()
324 /* Populate the tail pointer and bring the Rx Axi DMA engine out of in axienet_dma_bd_init()
327 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_bd_init()
331 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_bd_init()
332 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_bd_init()
334 /* Write to the RS (Run-stop) bit in the Tx channel control register. in axienet_dma_bd_init()
338 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_bd_init()
346 return -ENOMEM; in axienet_dma_bd_init()
350 * axienet_set_mac_address - Write the MAC address
354 * This function is called to initialize the MAC address of the Axi Ethernet
363 memcpy(ndev->dev_addr, address, ETH_ALEN); in axienet_set_mac_address()
364 if (!is_valid_ether_addr(ndev->dev_addr)) in axienet_set_mac_address()
369 (ndev->dev_addr[0]) | in axienet_set_mac_address()
370 (ndev->dev_addr[1] << 8) | in axienet_set_mac_address()
371 (ndev->dev_addr[2] << 16) | in axienet_set_mac_address()
372 (ndev->dev_addr[3] << 24)); in axienet_set_mac_address()
376 (ndev->dev_addr[4] | in axienet_set_mac_address()
377 (ndev->dev_addr[5] << 8)))); in axienet_set_mac_address()
381 * netdev_set_mac_address - Write the MAC address (from outside the driver)
387 * This function is called to initialize the MAC address of the Axi Ethernet
394 axienet_set_mac_address(ndev, addr->sa_data); in netdev_set_mac_address()
399 * axienet_set_multicast_list - Prepare the multicast table
403 * initialization. The Axi Ethernet basic multicast support has a four-entry
415 if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC) || in axienet_set_multicast_list()
421 ndev->flags |= IFF_PROMISC; in axienet_set_multicast_list()
425 dev_info(&ndev->dev, "Promiscuous mode enabled.\n"); in axienet_set_multicast_list()
434 af0reg = (ha->addr[0]); in axienet_set_multicast_list()
435 af0reg |= (ha->addr[1] << 8); in axienet_set_multicast_list()
436 af0reg |= (ha->addr[2] << 16); in axienet_set_multicast_list()
437 af0reg |= (ha->addr[3] << 24); in axienet_set_multicast_list()
439 af1reg = (ha->addr[4]); in axienet_set_multicast_list()
440 af1reg |= (ha->addr[5] << 8); in axienet_set_multicast_list()
465 dev_info(&ndev->dev, "Promiscuous mode disabled.\n"); in axienet_set_multicast_list()
470 * axienet_setoptions - Set an Axi Ethernet option
474 * The Axi Ethernet core has multiple features which can be selectively turned
477 * these options in the Axi Ethernet hardware. This is done through
486 while (tp->opt) { in axienet_setoptions()
487 reg = ((axienet_ior(lp, tp->reg)) & ~(tp->m_or)); in axienet_setoptions()
488 if (options & tp->opt) in axienet_setoptions()
489 reg |= tp->m_or; in axienet_setoptions()
490 axienet_iow(lp, tp->reg, reg); in axienet_setoptions()
494 lp->options |= options; in axienet_setoptions()
501 /* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset in __axienet_device_reset()
502 * process of Axi DMA takes a while to complete as all pending in __axienet_device_reset()
513 if (--timeout == 0) { in __axienet_device_reset()
514 netdev_err(lp->ndev, "%s: DMA reset timeout!\n", in __axienet_device_reset()
516 return -ETIMEDOUT; in __axienet_device_reset()
524 * axienet_device_reset - Reset and initialize the Axi Ethernet hardware.
527 * This function is called to reset and initialize the Axi Ethernet core. This
528 * is typically called during initialization. It does a reset of the Axi DMA
529 * Rx/Tx channels and initializes the Axi DMA BDs. Since Axi DMA reset lines
530 * areconnected to Axi Ethernet reset lines, this in turn resets the Axi
531 * Ethernet core. No separate hardware reset is done for the Axi Ethernet
545 lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE; in axienet_device_reset()
546 lp->options |= XAE_OPTION_VLAN; in axienet_device_reset()
547 lp->options &= (~XAE_OPTION_JUMBO); in axienet_device_reset()
549 if ((ndev->mtu > XAE_MTU) && in axienet_device_reset()
550 (ndev->mtu <= XAE_JUMBO_MTU)) { in axienet_device_reset()
551 lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN + in axienet_device_reset()
554 if (lp->max_frm_size <= lp->rxmem) in axienet_device_reset()
555 lp->options |= XAE_OPTION_JUMBO; in axienet_device_reset()
572 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_device_reset()
580 axienet_setoptions(ndev, lp->options & in axienet_device_reset()
584 axienet_setoptions(ndev, lp->options); in axienet_device_reset()
592 * axienet_free_tx_chain - Clean up a series of linked TX descriptors.
595 * @nr_bds: Number of descriptors to clean up, can be -1 if unknown.
597 * in all cleaned-up descriptors. Ignored if NULL.
613 if (max_bds == -1) in axienet_free_tx_chain()
614 max_bds = lp->tx_bd_num; in axienet_free_tx_chain()
617 cur_p = &lp->tx_bd_v[(first_bd + i) % lp->tx_bd_num]; in axienet_free_tx_chain()
618 status = cur_p->status; in axienet_free_tx_chain()
623 if (nr_bds == -1 && !(status & XAXIDMA_BD_STS_COMPLETE_MASK)) in axienet_free_tx_chain()
627 dma_unmap_single(ndev->dev.parent, phys, in axienet_free_tx_chain()
628 (cur_p->cntrl & XAXIDMA_BD_CTRL_LENGTH_MASK), in axienet_free_tx_chain()
631 if (cur_p->skb && (status & XAXIDMA_BD_STS_COMPLETE_MASK)) in axienet_free_tx_chain()
632 dev_consume_skb_irq(cur_p->skb); in axienet_free_tx_chain()
634 cur_p->cntrl = 0; in axienet_free_tx_chain()
635 cur_p->app0 = 0; in axienet_free_tx_chain()
636 cur_p->app1 = 0; in axienet_free_tx_chain()
637 cur_p->app2 = 0; in axienet_free_tx_chain()
638 cur_p->app4 = 0; in axienet_free_tx_chain()
639 cur_p->status = 0; in axienet_free_tx_chain()
640 cur_p->skb = NULL; in axienet_free_tx_chain()
650 * axienet_start_xmit_done - Invoked once a transmit is completed by the
651 * Axi DMA Tx channel.
654 * This function is invoked from the Axi DMA Tx isr to notify the completion
666 packets = axienet_free_tx_chain(ndev, lp->tx_bd_ci, -1, &size); in axienet_start_xmit_done()
668 lp->tx_bd_ci += packets; in axienet_start_xmit_done()
669 if (lp->tx_bd_ci >= lp->tx_bd_num) in axienet_start_xmit_done()
670 lp->tx_bd_ci -= lp->tx_bd_num; in axienet_start_xmit_done()
672 ndev->stats.tx_packets += packets; in axienet_start_xmit_done()
673 ndev->stats.tx_bytes += size; in axienet_start_xmit_done()
682 * axienet_check_tx_bd_space - Checks if a BD/group of BDs are currently busy
698 cur_p = &lp->tx_bd_v[(lp->tx_bd_tail + num_frag) % lp->tx_bd_num]; in axienet_check_tx_bd_space()
699 if (cur_p->status & XAXIDMA_BD_STS_ALL_MASK) in axienet_check_tx_bd_space()
705 * axienet_start_xmit - Starts the transmission.
715 * it populates AXI Stream Control fields with appropriate values.
728 u32 orig_tail_ptr = lp->tx_bd_tail; in axienet_start_xmit()
730 num_frag = skb_shinfo(skb)->nr_frags; in axienet_start_xmit()
731 cur_p = &lp->tx_bd_v[lp->tx_bd_tail]; in axienet_start_xmit()
742 /* Space might have just been freed - check again */ in axienet_start_xmit()
749 if (skb->ip_summed == CHECKSUM_PARTIAL) { in axienet_start_xmit()
750 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit()
752 cur_p->app0 |= 2; in axienet_start_xmit()
753 } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) { in axienet_start_xmit()
755 csum_index_off = csum_start_off + skb->csum_offset; in axienet_start_xmit()
757 cur_p->app0 |= 1; in axienet_start_xmit()
758 cur_p->app1 = (csum_start_off << 16) | csum_index_off; in axienet_start_xmit()
760 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) { in axienet_start_xmit()
761 cur_p->app0 |= 2; /* Tx Full Checksum Offload Enabled */ in axienet_start_xmit()
764 phys = dma_map_single(ndev->dev.parent, skb->data, in axienet_start_xmit()
766 if (unlikely(dma_mapping_error(ndev->dev.parent, phys))) { in axienet_start_xmit()
769 ndev->stats.tx_dropped++; in axienet_start_xmit()
773 cur_p->cntrl = skb_headlen(skb) | XAXIDMA_BD_CTRL_TXSOF_MASK; in axienet_start_xmit()
776 if (++lp->tx_bd_tail >= lp->tx_bd_num) in axienet_start_xmit()
777 lp->tx_bd_tail = 0; in axienet_start_xmit()
778 cur_p = &lp->tx_bd_v[lp->tx_bd_tail]; in axienet_start_xmit()
779 frag = &skb_shinfo(skb)->frags[ii]; in axienet_start_xmit()
780 phys = dma_map_single(ndev->dev.parent, in axienet_start_xmit()
784 if (unlikely(dma_mapping_error(ndev->dev.parent, phys))) { in axienet_start_xmit()
787 ndev->stats.tx_dropped++; in axienet_start_xmit()
790 lp->tx_bd_tail = orig_tail_ptr; in axienet_start_xmit()
795 cur_p->cntrl = skb_frag_size(frag); in axienet_start_xmit()
798 cur_p->cntrl |= XAXIDMA_BD_CTRL_TXEOF_MASK; in axienet_start_xmit()
799 cur_p->skb = skb; in axienet_start_xmit()
801 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail; in axienet_start_xmit()
804 if (++lp->tx_bd_tail >= lp->tx_bd_num) in axienet_start_xmit()
805 lp->tx_bd_tail = 0; in axienet_start_xmit()
811 * axienet_recv - Is called from Axi DMA Rx Isr to complete the received
815 * This function is invoked from the Axi DMA Rx isr to process the Rx BDs. It
830 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_recv()
832 while ((cur_p->status & XAXIDMA_BD_STS_COMPLETE_MASK)) { in axienet_recv()
835 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci; in axienet_recv()
838 dma_unmap_single(ndev->dev.parent, phys, lp->max_frm_size, in axienet_recv()
841 skb = cur_p->skb; in axienet_recv()
842 cur_p->skb = NULL; in axienet_recv()
843 length = cur_p->app4 & 0x0000FFFF; in axienet_recv()
846 skb->protocol = eth_type_trans(skb, ndev); in axienet_recv()
848 skb->ip_summed = CHECKSUM_NONE; in axienet_recv()
851 if (lp->features & XAE_FEATURE_FULL_RX_CSUM) { in axienet_recv()
852 csumstatus = (cur_p->app2 & in axienet_recv()
856 skb->ip_summed = CHECKSUM_UNNECESSARY; in axienet_recv()
858 } else if ((lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) != 0 && in axienet_recv()
859 skb->protocol == htons(ETH_P_IP) && in axienet_recv()
860 skb->len > 64) { in axienet_recv()
861 skb->csum = be32_to_cpu(cur_p->app3 & 0xFFFF); in axienet_recv()
862 skb->ip_summed = CHECKSUM_COMPLETE; in axienet_recv()
870 new_skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_recv()
874 phys = dma_map_single(ndev->dev.parent, new_skb->data, in axienet_recv()
875 lp->max_frm_size, in axienet_recv()
877 if (unlikely(dma_mapping_error(ndev->dev.parent, phys))) { in axienet_recv()
885 cur_p->cntrl = lp->max_frm_size; in axienet_recv()
886 cur_p->status = 0; in axienet_recv()
887 cur_p->skb = new_skb; in axienet_recv()
889 if (++lp->rx_bd_ci >= lp->rx_bd_num) in axienet_recv()
890 lp->rx_bd_ci = 0; in axienet_recv()
891 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_recv()
894 ndev->stats.rx_packets += packets; in axienet_recv()
895 ndev->stats.rx_bytes += size; in axienet_recv()
902 * axienet_tx_irq - Tx Done Isr.
908 * This is the Axi DMA Tx done Isr. It invokes "axienet_start_xmit_done"
921 axienet_start_xmit_done(lp->ndev); in axienet_tx_irq()
927 dev_err(&ndev->dev, "DMA Tx error 0x%x\n", status); in axienet_tx_irq()
928 dev_err(&ndev->dev, "Current BD is at: 0x%x%08x\n", in axienet_tx_irq()
929 (lp->tx_bd_v[lp->tx_bd_ci]).phys_msb, in axienet_tx_irq()
930 (lp->tx_bd_v[lp->tx_bd_ci]).phys); in axienet_tx_irq()
944 schedule_work(&lp->dma_err_task); in axienet_tx_irq()
952 * axienet_rx_irq - Rx Isr.
958 * This is the Axi DMA Rx Isr. It invokes "axienet_recv" to complete the BD
971 axienet_recv(lp->ndev); in axienet_rx_irq()
977 dev_err(&ndev->dev, "DMA Rx error 0x%x\n", status); in axienet_rx_irq()
978 dev_err(&ndev->dev, "Current BD is at: 0x%x%08x\n", in axienet_rx_irq()
979 (lp->rx_bd_v[lp->rx_bd_ci]).phys_msb, in axienet_rx_irq()
980 (lp->rx_bd_v[lp->rx_bd_ci]).phys); in axienet_rx_irq()
994 schedule_work(&lp->dma_err_task); in axienet_rx_irq()
1002 * axienet_eth_irq - Ethernet core Isr.
1021 ndev->stats.rx_missed_errors++; in axienet_eth_irq()
1024 ndev->stats.rx_frame_errors++; in axienet_eth_irq()
1033 * axienet_open - Driver open routine.
1037 * non-zero error value on failure
1042 * and ISR handling. Axi Ethernet core is reset through Axi DMA core. Buffer
1050 dev_dbg(&ndev->dev, "axienet_open()\n"); in axienet_open()
1052 /* Disable the MDIO interface till Axi Ethernet Reset is completed. in axienet_open()
1053 * When we do an Axi Ethernet reset, it resets the complete core in axienet_open()
1055 * and re-enabled afterwards. in axienet_open()
1058 mutex_lock(&lp->mii_bus->mdio_lock); in axienet_open()
1063 mutex_unlock(&lp->mii_bus->mdio_lock); in axienet_open()
1067 ret = phylink_of_phy_connect(lp->phylink, lp->dev->of_node, 0); in axienet_open()
1069 dev_err(lp->dev, "phylink_of_phy_connect() failed: %d\n", ret); in axienet_open()
1073 phylink_start(lp->phylink); in axienet_open()
1075 /* Enable worker thread for Axi DMA error handling */ in axienet_open()
1076 INIT_WORK(&lp->dma_err_task, axienet_dma_err_handler); in axienet_open()
1078 /* Enable interrupts for Axi DMA Tx */ in axienet_open()
1079 ret = request_irq(lp->tx_irq, axienet_tx_irq, IRQF_SHARED, in axienet_open()
1080 ndev->name, ndev); in axienet_open()
1083 /* Enable interrupts for Axi DMA Rx */ in axienet_open()
1084 ret = request_irq(lp->rx_irq, axienet_rx_irq, IRQF_SHARED, in axienet_open()
1085 ndev->name, ndev); in axienet_open()
1088 /* Enable interrupts for Axi Ethernet core (if defined) */ in axienet_open()
1089 if (lp->eth_irq > 0) { in axienet_open()
1090 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_open()
1091 ndev->name, ndev); in axienet_open()
1099 free_irq(lp->rx_irq, ndev); in axienet_open()
1101 free_irq(lp->tx_irq, ndev); in axienet_open()
1103 phylink_stop(lp->phylink); in axienet_open()
1104 phylink_disconnect_phy(lp->phylink); in axienet_open()
1105 cancel_work_sync(&lp->dma_err_task); in axienet_open()
1106 dev_err(lp->dev, "request_irq() failed\n"); in axienet_open()
1111 * axienet_stop - Driver stop routine.
1118 * The Axi DMA Tx/Rx BDs are released.
1126 dev_dbg(&ndev->dev, "axienet_close()\n"); in axienet_stop()
1128 phylink_stop(lp->phylink); in axienet_stop()
1129 phylink_disconnect_phy(lp->phylink); in axienet_stop()
1131 axienet_setoptions(ndev, lp->options & in axienet_stop()
1158 mutex_lock(&lp->mii_bus->mdio_lock); in axienet_stop()
1162 mutex_unlock(&lp->mii_bus->mdio_lock); in axienet_stop()
1164 cancel_work_sync(&lp->dma_err_task); in axienet_stop()
1166 if (lp->eth_irq > 0) in axienet_stop()
1167 free_irq(lp->eth_irq, ndev); in axienet_stop()
1168 free_irq(lp->tx_irq, ndev); in axienet_stop()
1169 free_irq(lp->rx_irq, ndev); in axienet_stop()
1176 * axienet_change_mtu - Driver change mtu routine.
1182 * This is the change mtu driver routine. It checks if the Axi Ethernet
1191 return -EBUSY; in axienet_change_mtu()
1194 XAE_TRL_SIZE) > lp->rxmem) in axienet_change_mtu()
1195 return -EINVAL; in axienet_change_mtu()
1197 ndev->mtu = new_mtu; in axienet_change_mtu()
1204 * axienet_poll_controller - Axi Ethernet poll mechanism.
1213 disable_irq(lp->tx_irq); in axienet_poll_controller()
1214 disable_irq(lp->rx_irq); in axienet_poll_controller()
1215 axienet_rx_irq(lp->tx_irq, ndev); in axienet_poll_controller()
1216 axienet_tx_irq(lp->rx_irq, ndev); in axienet_poll_controller()
1217 enable_irq(lp->tx_irq); in axienet_poll_controller()
1218 enable_irq(lp->rx_irq); in axienet_poll_controller()
1227 return -EINVAL; in axienet_ioctl()
1229 return phylink_mii_ioctl(lp->phylink, rq, cmd); in axienet_ioctl()
1247 * axienet_ethtools_get_drvinfo - Get various Axi Ethernet driver information.
1252 * Issue "ethtool -i ethX" under linux prompt to execute this function.
1257 strlcpy(ed->driver, DRIVER_NAME, sizeof(ed->driver)); in axienet_ethtools_get_drvinfo()
1258 strlcpy(ed->version, DRIVER_VERSION, sizeof(ed->version)); in axienet_ethtools_get_drvinfo()
1262 * axienet_ethtools_get_regs_len - Get the total regs length present in the
1277 * axienet_ethtools_get_regs - Dump the contents of all registers present
1283 * This implements ethtool command for getting the Axi Ethernet register dump.
1284 * Issue "ethtool -d ethX" to execute this function.
1293 regs->version = 0; in axienet_ethtools_get_regs()
1294 regs->len = len; in axienet_ethtools_get_regs()
1340 ering->rx_max_pending = RX_BD_NUM_MAX; in axienet_ethtools_get_ringparam()
1341 ering->rx_mini_max_pending = 0; in axienet_ethtools_get_ringparam()
1342 ering->rx_jumbo_max_pending = 0; in axienet_ethtools_get_ringparam()
1343 ering->tx_max_pending = TX_BD_NUM_MAX; in axienet_ethtools_get_ringparam()
1344 ering->rx_pending = lp->rx_bd_num; in axienet_ethtools_get_ringparam()
1345 ering->rx_mini_pending = 0; in axienet_ethtools_get_ringparam()
1346 ering->rx_jumbo_pending = 0; in axienet_ethtools_get_ringparam()
1347 ering->tx_pending = lp->tx_bd_num; in axienet_ethtools_get_ringparam()
1355 if (ering->rx_pending > RX_BD_NUM_MAX || in axienet_ethtools_set_ringparam()
1356 ering->rx_mini_pending || in axienet_ethtools_set_ringparam()
1357 ering->rx_jumbo_pending || in axienet_ethtools_set_ringparam()
1358 ering->rx_pending > TX_BD_NUM_MAX) in axienet_ethtools_set_ringparam()
1359 return -EINVAL; in axienet_ethtools_set_ringparam()
1362 return -EBUSY; in axienet_ethtools_set_ringparam()
1364 lp->rx_bd_num = ering->rx_pending; in axienet_ethtools_set_ringparam()
1365 lp->tx_bd_num = ering->tx_pending; in axienet_ethtools_set_ringparam()
1370 * axienet_ethtools_get_pauseparam - Get the pause parameter setting for
1375 * This implements ethtool command for getting axi ethernet pause frame
1376 * setting. Issue "ethtool -a ethX" to execute this function.
1384 phylink_ethtool_get_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_get_pauseparam()
1388 * axienet_ethtools_set_pauseparam - Set device pause parameter(flow control)
1394 * paths. Issue "ethtool -A ethX tx on|off" under linux prompt to execute this
1397 * Return: 0 on success, -EFAULT if device is running
1405 return phylink_ethtool_set_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_set_pauseparam()
1409 * axienet_ethtools_get_coalesce - Get DMA interrupt coalescing count.
1414 * count on Tx and Rx paths. Issue "ethtool -c ethX" under linux prompt to
1425 ecoalesce->rx_max_coalesced_frames = (regval & XAXIDMA_COALESCE_MASK) in axienet_ethtools_get_coalesce()
1428 ecoalesce->tx_max_coalesced_frames = (regval & XAXIDMA_COALESCE_MASK) in axienet_ethtools_get_coalesce()
1434 * axienet_ethtools_set_coalesce - Set DMA interrupt coalescing count.
1439 * count on Tx and Rx paths. Issue "ethtool -C ethX rx-frames 5" under linux
1442 * Return: 0, on success, Non-zero error value on failure.
1452 return -EFAULT; in axienet_ethtools_set_coalesce()
1455 if (ecoalesce->rx_max_coalesced_frames) in axienet_ethtools_set_coalesce()
1456 lp->coalesce_count_rx = ecoalesce->rx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
1457 if (ecoalesce->tx_max_coalesced_frames) in axienet_ethtools_set_coalesce()
1458 lp->coalesce_count_tx = ecoalesce->tx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
1469 return phylink_ethtool_ksettings_get(lp->phylink, cmd); in axienet_ethtools_get_link_ksettings()
1478 return phylink_ethtool_ksettings_set(lp->phylink, cmd); in axienet_ethtools_set_link_ksettings()
1497 static void axienet_validate(struct phylink_config *config, in axienet_validate() argument
1501 struct net_device *ndev = to_net_dev(config->dev); in axienet_validate()
1506 if (state->interface != PHY_INTERFACE_MODE_NA && in axienet_validate()
1507 state->interface != lp->phy_mode) { in axienet_validate()
1509 phy_modes(state->interface), in axienet_validate()
1510 phy_modes(lp->phy_mode)); in axienet_validate()
1527 bitmap_and(state->advertising, state->advertising, mask, in axienet_validate()
1531 static void axienet_mac_pcs_get_state(struct phylink_config *config, in axienet_mac_pcs_get_state() argument
1534 struct net_device *ndev = to_net_dev(config->dev); in axienet_mac_pcs_get_state()
1538 state->interface = lp->phy_mode; in axienet_mac_pcs_get_state()
1542 state->speed = SPEED_1000; in axienet_mac_pcs_get_state()
1544 state->speed = SPEED_100; in axienet_mac_pcs_get_state()
1546 state->speed = SPEED_10; in axienet_mac_pcs_get_state()
1548 state->pause = 0; in axienet_mac_pcs_get_state()
1551 state->pause |= MLO_PAUSE_TX; in axienet_mac_pcs_get_state()
1553 state->pause |= MLO_PAUSE_RX; in axienet_mac_pcs_get_state()
1555 state->an_complete = 0; in axienet_mac_pcs_get_state()
1556 state->duplex = 1; in axienet_mac_pcs_get_state()
1559 static void axienet_mac_an_restart(struct phylink_config *config) in axienet_mac_an_restart() argument
1564 static void axienet_mac_config(struct phylink_config *config, unsigned int mode, in axienet_mac_config() argument
1570 static void axienet_mac_link_down(struct phylink_config *config, in axienet_mac_link_down() argument
1577 static void axienet_mac_link_up(struct phylink_config *config, in axienet_mac_link_up() argument
1583 struct net_device *ndev = to_net_dev(config->dev); in axienet_mac_link_up()
1601 dev_err(&ndev->dev, in axienet_mac_link_up()
1630 * axienet_dma_err_handler - Work queue task for Axi DMA Error
1633 * Resets the Axi DMA and Axi Ethernet devices, and reconfigures the
1642 struct net_device *ndev = lp->ndev; in axienet_dma_err_handler()
1645 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
1647 /* Disable the MDIO interface till Axi Ethernet Reset is completed. in axienet_dma_err_handler()
1648 * When we do an Axi Ethernet reset, it resets the complete core in axienet_dma_err_handler()
1650 * and re-enabled afterwards. in axienet_dma_err_handler()
1653 mutex_lock(&lp->mii_bus->mdio_lock); in axienet_dma_err_handler()
1657 mutex_unlock(&lp->mii_bus->mdio_lock); in axienet_dma_err_handler()
1659 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_err_handler()
1660 cur_p = &lp->tx_bd_v[i]; in axienet_dma_err_handler()
1661 if (cur_p->cntrl) { in axienet_dma_err_handler()
1664 dma_unmap_single(ndev->dev.parent, addr, in axienet_dma_err_handler()
1665 (cur_p->cntrl & in axienet_dma_err_handler()
1669 if (cur_p->skb) in axienet_dma_err_handler()
1670 dev_kfree_skb_irq(cur_p->skb); in axienet_dma_err_handler()
1671 cur_p->phys = 0; in axienet_dma_err_handler()
1672 cur_p->phys_msb = 0; in axienet_dma_err_handler()
1673 cur_p->cntrl = 0; in axienet_dma_err_handler()
1674 cur_p->status = 0; in axienet_dma_err_handler()
1675 cur_p->app0 = 0; in axienet_dma_err_handler()
1676 cur_p->app1 = 0; in axienet_dma_err_handler()
1677 cur_p->app2 = 0; in axienet_dma_err_handler()
1678 cur_p->app3 = 0; in axienet_dma_err_handler()
1679 cur_p->app4 = 0; in axienet_dma_err_handler()
1680 cur_p->skb = NULL; in axienet_dma_err_handler()
1683 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_err_handler()
1684 cur_p = &lp->rx_bd_v[i]; in axienet_dma_err_handler()
1685 cur_p->status = 0; in axienet_dma_err_handler()
1686 cur_p->app0 = 0; in axienet_dma_err_handler()
1687 cur_p->app1 = 0; in axienet_dma_err_handler()
1688 cur_p->app2 = 0; in axienet_dma_err_handler()
1689 cur_p->app3 = 0; in axienet_dma_err_handler()
1690 cur_p->app4 = 0; in axienet_dma_err_handler()
1693 lp->tx_bd_ci = 0; in axienet_dma_err_handler()
1694 lp->tx_bd_tail = 0; in axienet_dma_err_handler()
1695 lp->rx_bd_ci = 0; in axienet_dma_err_handler()
1723 /* Populate the tail pointer and bring the Rx Axi DMA engine out of in axienet_dma_err_handler()
1726 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_err_handler()
1730 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_err_handler()
1731 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_err_handler()
1733 /* Write to the RS (Run-stop) bit in the Tx channel control register. in axienet_dma_err_handler()
1737 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_err_handler()
1749 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_dma_err_handler()
1756 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
1760 axienet_setoptions(ndev, lp->options); in axienet_dma_err_handler()
1764 * axienet_probe - Axi Ethernet probe function.
1768 * Non-zero error value on failure.
1770 * This is the probe routine for Axi Ethernet driver. This is called before
1788 return -ENOMEM; in axienet_probe()
1792 SET_NETDEV_DEV(ndev, &pdev->dev); in axienet_probe()
1793 ndev->flags &= ~IFF_MULTICAST; /* clear multicast */ in axienet_probe()
1794 ndev->features = NETIF_F_SG; in axienet_probe()
1795 ndev->netdev_ops = &axienet_netdev_ops; in axienet_probe()
1796 ndev->ethtool_ops = &axienet_ethtool_ops; in axienet_probe()
1798 /* MTU range: 64 - 9000 */ in axienet_probe()
1799 ndev->min_mtu = 64; in axienet_probe()
1800 ndev->max_mtu = XAE_JUMBO_MTU; in axienet_probe()
1803 lp->ndev = ndev; in axienet_probe()
1804 lp->dev = &pdev->dev; in axienet_probe()
1805 lp->options = XAE_OPTION_DEFAULTS; in axienet_probe()
1806 lp->rx_bd_num = RX_BD_NUM_DEFAULT; in axienet_probe()
1807 lp->tx_bd_num = TX_BD_NUM_DEFAULT; in axienet_probe()
1810 lp->regs = devm_ioremap_resource(&pdev->dev, ethres); in axienet_probe()
1811 if (IS_ERR(lp->regs)) { in axienet_probe()
1812 dev_err(&pdev->dev, "could not map Axi Ethernet regs.\n"); in axienet_probe()
1813 ret = PTR_ERR(lp->regs); in axienet_probe()
1816 lp->regs_start = ethres->start; in axienet_probe()
1819 lp->features = 0; in axienet_probe()
1821 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,txcsum", &value); in axienet_probe()
1825 lp->csum_offload_on_tx_path = in axienet_probe()
1827 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM; in axienet_probe()
1829 ndev->features |= NETIF_F_IP_CSUM; in axienet_probe()
1832 lp->csum_offload_on_tx_path = in axienet_probe()
1834 lp->features |= XAE_FEATURE_FULL_TX_CSUM; in axienet_probe()
1836 ndev->features |= NETIF_F_IP_CSUM; in axienet_probe()
1839 lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD; in axienet_probe()
1842 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,rxcsum", &value); in axienet_probe()
1846 lp->csum_offload_on_rx_path = in axienet_probe()
1848 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM; in axienet_probe()
1851 lp->csum_offload_on_rx_path = in axienet_probe()
1853 lp->features |= XAE_FEATURE_FULL_RX_CSUM; in axienet_probe()
1856 lp->csum_offload_on_rx_path = XAE_NO_CSUM_OFFLOAD; in axienet_probe()
1859 /* For supporting jumbo frames, the Axi Ethernet hardware must have in axienet_probe()
1863 * the device-tree and accordingly set flags. in axienet_probe()
1865 of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem); in axienet_probe()
1868 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,phy-type", &value); in axienet_probe()
1870 netdev_warn(ndev, "Please upgrade your device tree binary blob to use phy-mode"); in axienet_probe()
1873 lp->phy_mode = PHY_INTERFACE_MODE_MII; in axienet_probe()
1876 lp->phy_mode = PHY_INTERFACE_MODE_GMII; in axienet_probe()
1879 lp->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; in axienet_probe()
1882 lp->phy_mode = PHY_INTERFACE_MODE_SGMII; in axienet_probe()
1885 lp->phy_mode = PHY_INTERFACE_MODE_1000BASEX; in axienet_probe()
1888 ret = -EINVAL; in axienet_probe()
1892 ret = of_get_phy_mode(pdev->dev.of_node, &lp->phy_mode); in axienet_probe()
1898 np = of_parse_phandle(pdev->dev.of_node, "axistream-connected", 0); in axienet_probe()
1904 dev_err(&pdev->dev, in axienet_probe()
1909 lp->dma_regs = devm_ioremap_resource(&pdev->dev, in axienet_probe()
1911 lp->rx_irq = irq_of_parse_and_map(np, 1); in axienet_probe()
1912 lp->tx_irq = irq_of_parse_and_map(np, 0); in axienet_probe()
1914 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
1919 lp->dma_regs = devm_ioremap_resource(&pdev->dev, res); in axienet_probe()
1920 lp->rx_irq = platform_get_irq(pdev, 1); in axienet_probe()
1921 lp->tx_irq = platform_get_irq(pdev, 0); in axienet_probe()
1922 lp->eth_irq = platform_get_irq_optional(pdev, 2); in axienet_probe()
1924 if (IS_ERR(lp->dma_regs)) { in axienet_probe()
1925 dev_err(&pdev->dev, "could not map DMA regs\n"); in axienet_probe()
1926 ret = PTR_ERR(lp->dma_regs); in axienet_probe()
1929 if ((lp->rx_irq <= 0) || (lp->tx_irq <= 0)) { in axienet_probe()
1930 dev_err(&pdev->dev, "could not determine irqs\n"); in axienet_probe()
1931 ret = -ENOMEM; in axienet_probe()
1935 /* Autodetect the need for 64-bit DMA pointers. in axienet_probe()
1944 void __iomem *desc = lp->dma_regs + XAXIDMA_TX_CDESC_OFFSET + 4; in axienet_probe()
1950 lp->features |= XAE_FEATURE_DMA_64BIT; in axienet_probe()
1952 dev_info(&pdev->dev, in axienet_probe()
1953 "autodetected 64-bit DMA range\n"); in axienet_probe()
1959 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(addr_width)); in axienet_probe()
1961 dev_err(&pdev->dev, "No suitable DMA available\n"); in axienet_probe()
1966 if (lp->eth_irq <= 0) in axienet_probe()
1967 dev_info(&pdev->dev, "Ethernet core IRQ not defined\n"); in axienet_probe()
1970 mac_addr = of_get_mac_address(pdev->dev.of_node); in axienet_probe()
1972 dev_warn(&pdev->dev, "could not find MAC address property: %ld\n", in axienet_probe()
1978 lp->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD; in axienet_probe()
1979 lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD; in axienet_probe()
1981 lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); in axienet_probe()
1982 if (lp->phy_node) { in axienet_probe()
1983 lp->clk = devm_clk_get(&pdev->dev, NULL); in axienet_probe()
1984 if (IS_ERR(lp->clk)) { in axienet_probe()
1985 dev_warn(&pdev->dev, "Failed to get clock: %ld\n", in axienet_probe()
1986 PTR_ERR(lp->clk)); in axienet_probe()
1987 lp->clk = NULL; in axienet_probe()
1989 ret = clk_prepare_enable(lp->clk); in axienet_probe()
1991 dev_err(&pdev->dev, "Unable to enable clock: %d\n", in axienet_probe()
1999 dev_warn(&pdev->dev, in axienet_probe()
2003 lp->phylink_config.dev = &ndev->dev; in axienet_probe()
2004 lp->phylink_config.type = PHYLINK_NETDEV; in axienet_probe()
2006 lp->phylink = phylink_create(&lp->phylink_config, pdev->dev.fwnode, in axienet_probe()
2007 lp->phy_mode, in axienet_probe()
2009 if (IS_ERR(lp->phylink)) { in axienet_probe()
2010 ret = PTR_ERR(lp->phylink); in axienet_probe()
2011 dev_err(&pdev->dev, "phylink_create error (%i)\n", ret); in axienet_probe()
2015 ret = register_netdev(lp->ndev); in axienet_probe()
2017 dev_err(lp->dev, "register_netdev() error (%i)\n", ret); in axienet_probe()
2036 if (lp->phylink) in axienet_remove()
2037 phylink_destroy(lp->phylink); in axienet_remove()
2041 clk_disable_unprepare(lp->clk); in axienet_remove()
2043 of_node_put(lp->phy_node); in axienet_remove()
2044 lp->phy_node = NULL; in axienet_remove()
2076 MODULE_DESCRIPTION("Xilinx Axi Ethernet driver");