Lines Matching full:mii

4   Provides Bus interface for MII registers
16 #include <linux/mii.h>
85 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_read()
86 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_read()
90 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
109 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_xgmac2_mdio_read()
110 & priv->hw->mii.clk_csr_mask; in stmmac_xgmac2_mdio_read()
113 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
118 /* Set the MII address register to read */ in stmmac_xgmac2_mdio_read()
122 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
127 /* Read the data from the MII data register */ in stmmac_xgmac2_mdio_read()
136 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_write()
137 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_write()
141 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_write()
160 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_xgmac2_mdio_write()
161 & priv->hw->mii.clk_csr_mask; in stmmac_xgmac2_mdio_write()
165 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_write()
170 /* Set the MII address register to write */ in stmmac_xgmac2_mdio_write()
174 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_write()
182 * @phyaddr: MII addr
183 * @phyreg: MII reg
184 * Description: it reads data from the MII register from within the phy device.
185 * For the 7111 GMAC, we must set the bit 0 in the MII address register while
193 unsigned int mii_address = priv->hw->mii.addr; in stmmac_mdio_read()
194 unsigned int mii_data = priv->hw->mii.data; in stmmac_mdio_read()
199 value |= (phyaddr << priv->hw->mii.addr_shift) in stmmac_mdio_read()
200 & priv->hw->mii.addr_mask; in stmmac_mdio_read()
201 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_read()
202 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_mdio_read()
203 & priv->hw->mii.clk_csr_mask; in stmmac_mdio_read()
208 value &= ~priv->hw->mii.reg_mask; in stmmac_mdio_read()
210 priv->hw->mii.reg_shift) & in stmmac_mdio_read()
211 priv->hw->mii.reg_mask; in stmmac_mdio_read()
229 /* Read the data from the MII data register */ in stmmac_mdio_read()
238 * @phyaddr: MII addr
239 * @phyreg: MII reg
241 * Description: it writes the data into the MII register from within the device.
248 unsigned int mii_address = priv->hw->mii.addr; in stmmac_mdio_write()
249 unsigned int mii_data = priv->hw->mii.data; in stmmac_mdio_write()
254 value |= (phyaddr << priv->hw->mii.addr_shift) in stmmac_mdio_write()
255 & priv->hw->mii.addr_mask; in stmmac_mdio_write()
256 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_write()
258 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_mdio_write()
259 & priv->hw->mii.clk_csr_mask; in stmmac_mdio_write()
264 value &= ~priv->hw->mii.reg_mask; in stmmac_mdio_write()
266 priv->hw->mii.reg_shift) & in stmmac_mdio_write()
267 priv->hw->mii.reg_mask; in stmmac_mdio_write()
276 /* Wait until any existing MII operation is complete */ in stmmac_mdio_write()
281 /* Set the MII address register to write */ in stmmac_mdio_write()
285 /* Wait until any existing MII operation is complete */ in stmmac_mdio_write()
293 * Description: reset the MII bus
300 unsigned int mii_address = priv->hw->mii.addr; in stmmac_mdio_reset()
344 * Description: it registers the MII bus
471 priv->mii = new_bus; in stmmac_mdio_register()
483 * Description: it unregisters the MII bus
489 if (!priv->mii) in stmmac_mdio_unregister()
492 mdiobus_unregister(priv->mii); in stmmac_mdio_unregister()
493 priv->mii->priv = NULL; in stmmac_mdio_unregister()
494 mdiobus_free(priv->mii); in stmmac_mdio_unregister()
495 priv->mii = NULL; in stmmac_mdio_unregister()