36  * @syscon_field		reg_field for the syscon's gmac register
544 	struct sunxi_priv_data *gmac = priv;  in sun8i_dwmac_init()  local
547 	if (gmac->regulator) {  in sun8i_dwmac_init()
548 		ret = regulator_enable(gmac->regulator);  in sun8i_dwmac_init()
555 	ret = clk_prepare_enable(gmac->tx_clk);  in sun8i_dwmac_init()
557 		if (gmac->regulator)  in sun8i_dwmac_init()
558 			regulator_disable(gmac->regulator);  in sun8i_dwmac_init()
728 	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;  in get_ephy_nodes()  local
749 		gmac->ephy_clk = of_clk_get(iphynode, 0);  in get_ephy_nodes()
750 		if (IS_ERR(gmac->ephy_clk))  in get_ephy_nodes()
752 		gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL);  in get_ephy_nodes()
753 		if (IS_ERR(gmac->rst_ephy)) {  in get_ephy_nodes()
754 			ret = PTR_ERR(gmac->rst_ephy);  in get_ephy_nodes()
774 	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;  in sun8i_dwmac_power_internal_phy()  local
777 	if (gmac->internal_phy_powered) {  in sun8i_dwmac_power_internal_phy()
783 	ret = clk_prepare_enable(gmac->ephy_clk);  in sun8i_dwmac_power_internal_phy()
792 	reset_control_assert(gmac->rst_ephy);  in sun8i_dwmac_power_internal_phy()
794 	ret = reset_control_deassert(gmac->rst_ephy);  in sun8i_dwmac_power_internal_phy()
797 		clk_disable_unprepare(gmac->ephy_clk);  in sun8i_dwmac_power_internal_phy()
801 	gmac->internal_phy_powered = true;  in sun8i_dwmac_power_internal_phy()
806 static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)  in sun8i_dwmac_unpower_internal_phy()  argument
808 	if (!gmac->internal_phy_powered)  in sun8i_dwmac_unpower_internal_phy()
811 	clk_disable_unprepare(gmac->ephy_clk);  in sun8i_dwmac_unpower_internal_phy()
812 	reset_control_assert(gmac->rst_ephy);  in sun8i_dwmac_unpower_internal_phy()
813 	gmac->internal_phy_powered = false;  in sun8i_dwmac_unpower_internal_phy()
831 	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;  in mdio_mux_syscon_switch_fn()  local
837 		regmap_field_read(gmac->regmap_field, &reg);  in mdio_mux_syscon_switch_fn()
855 		regmap_field_write(gmac->regmap_field, val);  in mdio_mux_syscon_switch_fn()
861 			sun8i_dwmac_unpower_internal_phy(gmac);  in mdio_mux_syscon_switch_fn()
875 	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;  in sun8i_dwmac_register_mdio_mux()  local
882 			    &gmac->mux_handle, priv, priv->mii);  in sun8i_dwmac_register_mdio_mux()
888 	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;  in sun8i_dwmac_set_syscon()  local
893 	ret = regmap_field_read(gmac->regmap_field, &val);  in sun8i_dwmac_set_syscon()
899 	reg = gmac->variant->default_syscon_value;  in sun8i_dwmac_set_syscon()
905 	if (gmac->variant->soc_has_internal_phy) {  in sun8i_dwmac_set_syscon()
937 		if (val <= gmac->variant->tx_delay_max) {  in sun8i_dwmac_set_syscon()
938 			reg &= ~(gmac->variant->tx_delay_max <<  in sun8i_dwmac_set_syscon()
955 		if (val <= gmac->variant->rx_delay_max) {  in sun8i_dwmac_set_syscon()
956 			reg &= ~(gmac->variant->rx_delay_max <<  in sun8i_dwmac_set_syscon()
968 	if (gmac->variant->support_rmii)  in sun8i_dwmac_set_syscon()
990 	regmap_field_write(gmac->regmap_field, reg);  in sun8i_dwmac_set_syscon()
995 static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac)  in sun8i_dwmac_unset_syscon()  argument
997 	u32 reg = gmac->variant->default_syscon_value;  in sun8i_dwmac_unset_syscon()
999 	regmap_field_write(gmac->regmap_field, reg);  in sun8i_dwmac_unset_syscon()
1004 	struct sunxi_priv_data *gmac = priv;  in sun8i_dwmac_exit()  local
1006 	if (gmac->variant->soc_has_internal_phy) {  in sun8i_dwmac_exit()
1008 		if (gmac->mux_handle)  in sun8i_dwmac_exit()
1009 			mdio_mux_uninit(gmac->mux_handle);  in sun8i_dwmac_exit()
1010 		if (gmac->internal_phy_powered)  in sun8i_dwmac_exit()
1011 			sun8i_dwmac_unpower_internal_phy(gmac);  in sun8i_dwmac_exit()
1014 	sun8i_dwmac_unset_syscon(gmac);  in sun8i_dwmac_exit()
1016 	reset_control_put(gmac->rst_ephy);  in sun8i_dwmac_exit()
1018 	clk_disable_unprepare(gmac->tx_clk);  in sun8i_dwmac_exit()
1020 	if (gmac->regulator)  in sun8i_dwmac_exit()
1021 		regulator_disable(gmac->regulator);  in sun8i_dwmac_exit()
1125 	struct sunxi_priv_data *gmac;  in sun8i_dwmac_probe()  local
1141 	gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL);  in sun8i_dwmac_probe()
1142 	if (!gmac)  in sun8i_dwmac_probe()
1145 	gmac->variant = of_device_get_match_data(&pdev->dev);  in sun8i_dwmac_probe()
1146 	if (!gmac->variant) {  in sun8i_dwmac_probe()
1151 	gmac->tx_clk = devm_clk_get(dev, "stmmaceth");  in sun8i_dwmac_probe()
1152 	if (IS_ERR(gmac->tx_clk)) {  in sun8i_dwmac_probe()
1154 		return PTR_ERR(gmac->tx_clk);  in sun8i_dwmac_probe()
1158 	gmac->regulator = devm_regulator_get_optional(dev, "phy");  in sun8i_dwmac_probe()
1159 	if (IS_ERR(gmac->regulator)) {  in sun8i_dwmac_probe()
1160 		if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)  in sun8i_dwmac_probe()
1163 		gmac->regulator = NULL;  in sun8i_dwmac_probe()
1166 	/* The "GMAC clock control" register might be located in the  in sun8i_dwmac_probe()
1193 	gmac->regmap_field = devm_regmap_field_alloc(dev, regmap,  in sun8i_dwmac_probe()
1194 						     *gmac->variant->syscon_field);  in sun8i_dwmac_probe()
1195 	if (IS_ERR(gmac->regmap_field)) {  in sun8i_dwmac_probe()
1196 		ret = PTR_ERR(gmac->regmap_field);  in sun8i_dwmac_probe()
1212 	plat_dat->bsp_priv = gmac;  in sun8i_dwmac_probe()
1230 	if (gmac->variant->soc_has_internal_phy) {  in sun8i_dwmac_probe()
1247 	sun8i_dwmac_unset_syscon(gmac);  in sun8i_dwmac_probe()
1260 	{ .compatible = "allwinner,sun8i-r40-gmac",