ethernet/sfc/net_driver.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
4  * Copyright 2005-2006 Fen Systems Ltd.
5  * Copyright 2005-2013 Solarflare Communications Inc.
61 /* Checksum generation is a per-queue option in hardware, so each
62  * queue visible to the networking core is backed by two hardware TX
63  * queues. */
68 #define EFX_TXQ_TYPE_HIGHPRI	4	/* High-priority (for TC) */
70 /* HIGHPRI is Siena-only, and INNER_CSUM is EF10, so no need for both */
83 /* Size of an RX scatter buffer.  Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE	(2048 - 256)
89  * of every buffer.  Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
111  * struct efx_buffer - A general-purpose DMA buffer
126  * struct efx_special_buffer - DMA buffer entered into buffer table
133  * table entries (and so can be physically non-contiguous, although we
135  * have to take care of allocating and initialising the entries
146  * struct efx_tx_buffer - buffer state for a TX descriptor
147  * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
150  *	member is the associated buffer to drop a page reference on.
151  * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option
157  * @unmap_len: Length of this fragment to unmap
183  * struct efx_tx_queue - An Efx TX queue
198  *	Is our index within @channel->tx_queue array.
200  * @tso_version: Version of TSO in use for this queue.
205  * @cb_page: Array of pages of copy buffers.  Carved up according to
206  *	%EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks.
211  * @piobuf_offset: Buffer offset to be specified in PIO descriptors
219  *	only get the up-to-date value of @write_count if this
220  *	variable indicates that the queue is empty.  This is to
221  *	avoid cache-line ping-pong between the xmit path and the
227  *	This is the number of buffers that have been added to the
230  *	This is the number of buffers that have been added to the
236  *	Filled in iff @efx->type->option_descriptors; only used for PIO.
240  *	only get the up-to-date value of read_count if this
241  *	variable indicates that the queue is full.  This is to
242  *	avoid cache-line ping-pong between the xmit path and the
251  * @xmit_pending: Are any packets waiting to be pushed to the NIC
253  * @notify_count: Count of notified descriptors to the NIC
256  *	@read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
301 	/* Statistics to supplement MAC stats */
311 #define EFX_TX_CB_SIZE	(1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN
314  * struct efx_rx_buffer - An Efx RX data buffer
340  * struct efx_rx_page_state - Page-based rx buffer state
343  * Used to facilitate sharing dma mappings between recycled rx buffers
344  * and those passed up to the kernel.
355  * struct efx_rx_queue - An Efx RX queue
357  * @core_index:  Index of network core RX queue.  Will be >= 0 iff this
358  *	is associated with a real RX queue.
363  * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
365  * @added_count: Number of buffers added to the receive queue.
366  * @notified_count: Number of buffers given to NIC (<= @added_count).
370  * @page_ring: The ring to store DMA mapped pages for reuse.
371  * @page_add: Counter to calculate the write pointer for the recycle ring.
372  * @page_remove: Counter to calculate the read pointer for the recycle ring.
375  *      the kernel still held a reference to them.
378  * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
379  * @max_fill: RX descriptor maximum fill level (<= ring size)
380  * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
382  * @min_fill: RX descriptor minimum non-zero fill level.
385  * @recycle_count: RX buffer recycle counter.
386  * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
387  * @xdp_rxq_info: XDP specific RX queue information.
418 	/* Statistics to supplement MAC stats */
432  * struct efx_channel - An Efx channel
435  * one RX queue, and an associated tasklet for processing the event
443  * @irq: IRQ number (MSI and MSI-X only)
452  * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
459  * @rfs_expire_index: next accelerated RFS filter ID to check for expiry
466  * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
467  * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
471  * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
472  * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
474  * @n_rx_merge_events: Number of RX merged completion events
475  * @n_rx_merge_packets: Number of RX packets completed by merged events
476  * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP
477  * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors
478  * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP
479  * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP
480  * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
482  * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
484  * @rx_list: list of SKBs from current RX, awaiting processing
485  * @rx_queue: RX queue for this channel
486  * @tx_queue: TX queues for this channel
558  * struct efx_msi_context - Context for each MSI
564  * safe for the IRQ handler to access.
573  * struct efx_channel_type - distinguishes traffic and extra channels
574  * @handle_no_channel: Handle failure to allocate an extra channel
575  * @pre_probe: Set up extra state prior to initialisation
579  * @copy: Copy the channel state prior to reallocation.  May be %NULL if
581  * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
582  * @want_txqs: Determine whether this channel should have TX queues
583  *	created.  If %NULL, TX queues are not created.
586  * @want_pio: Flag for whether PIO buffers should be linked to this
587  *	channel's TX queues.
613 	STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
621 	/* Be careful if altering to correct macro below */
627 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
632 	STATE_DISABLED = 2,	/* device disabled due to hardware errors */
639 /* Pseudo bit-mask flow control field */
645  * struct efx_link_state - Current state of the link
647  * @fd: Link is full-duplex
661 	return left->up == right->up && left->fd == right->fd &&  in efx_link_state_equal()
662 		left->fc == right->fc && left->speed == right->speed;  in efx_link_state_equal()
666  * enum efx_phy_mode - PHY operating mode flags
669  * @PHY_MODE_LOW_POWER: set to low power through MDIO
687  * struct efx_hw_stat_desc - Description of a hardware statistic
690  * @dma_width: Width in bits (0 for non-DMA statistics)
691  * @offset: Offset within stats (ignored for non-DMA statistics)
702 /* Number of (single-bit) entries in a multicast filter hash */
716  * struct efx_rss_context - A user-defined RSS context for filtering
721  * @user_id: the rss_context ID exposed to userspace over ethtool.
722  * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled
737  * is used to test if filter does or will exist.
739 #define EFX_ARFS_FILTER_ID_PENDING	-1
740 #define EFX_ARFS_FILTER_ID_ERROR	-2
741 #define EFX_ARFS_FILTER_ID_REMOVING	-3
743  * struct efx_arfs_rule - record of an ARFS filter and its IDs
745  * @spec: details of the filter (used as key for hash table).  Use efx->type to
746  *	determine which member to use.
747  * @rxq_index: channel to which the filter will steer traffic.
748  * @arfs_id: filter ID which was returned to ARFS
766  * struct efx_async_filter_insertion - Request to asynchronously insert a filter
767  * @net_dev: Reference to the netdevice
768  * @spec: The filter to insert
771  * @flow_id: Identifies the kernel-side flow for which this request was made
786  * struct efx_nic - an Efx NIC
804  * @vi_stride: step between per-VI registers / memory regions
808  * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
810  * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues
811  * @irq_rx_moderation_us: IRQ moderation time for RX event queues
815  * @tx_queue: TX DMA queues
816  * @rx_queue: RX DMA queues
819  * @extra_channel_types: Types of extra (non-traffic) channels that
822  * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit.
823  * @rxq_entries: Size of receive queues requested by user.
824  * @txq_entries: Size of transmit queues requested by user.
828  * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
831  * @n_channels: Number of channels in use
832  * @n_rx_channels: Number of channels used for RX (= number of RX queues)
834  * @n_extra_tx_channels: Number of extra channels with TX queues
835  * @tx_queues_per_channel: number of TX queues probed on each channel
838  * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel.
839  * @rx_ip_align: RX DMA address offset to have IP header aligned in
841  * @rx_dma_len: Current maximum RX DMA length
842  * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
843  * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
844  *	for use in sk_buff::truesize
845  * @rx_prefix_size: Size of RX prefix before packet data
846  * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
848  * @rx_packet_len_offset: Offset of RX packet length from start of packet data
851  *	(valid only if channel->sync_timestamps_enabled; always negative)
859  * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot
860  * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
865  * @selftest_work: Work item for asynchronous self-test
866  * @mtd_list: List of MTDs attached to the NIC
868  * @mcdi: Management-Controller-to-Driver Interface state
873  *	efx_mac_work() with kernel interfaces. Safe to read under any
875  *	be held to modify it.
883  * @phy_data: PHY private data (including PHY-specific stats)
892  * @unicast_filter: Flag for Falcon-arch simple unicast filter.
894  * @multicast_hash: Multicast hash table for Falcon-arch.
897  * @fc_disable: When non-zero flow control is disabled. Typically used to
903  * @loopback_selftest: Offline self-test private state
906  * @filter_state: Architecture-dependent filter table state
908  * @rps_slot_map: bitmap of in-flight entries in @rps_slot
914  * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
915  * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
917  * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
918  *	completed (either success or failure). Not used when MCDI is used to
919  *	flush receive queues.
920  * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
921  * @vf_count: Number of VFs intended to be enabled.
927  * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their
931  * @reg_base: Offset from the start of the bar to the function control window.
934  * @last_irq_cpu: Last CPU to handle a possible test interrupt.  This
935  *	field is used by efx_test_interrupts() to verify that an
939  * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb
1077 	 * so we want them next to each other.
1125 	return efx->net_dev->reg_state == NETREG_REGISTERED;  in efx_dev_registered()
1130 	return efx->port_num;  in efx_port_num()
1148  * struct efx_nic_type - Efx device type definition
1158  * @map_reset_reason: Map ethtool reset reason to a reset method
1159  * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
1165  * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
1166  * @prepare_flush: Prepare the hardware for flushing the DMA queues
1168  * @finish_flush: Clean up after flushing the DMA queues (for Falcon
1182  * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
1183  * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
1185  *	to the hardware.  Serialised by the mac_lock.
1188  * @set_wol: Push WoL configuration to the NIC
1190  * @test_chip: Test registers.  May use efx_farch_test_registers(), and is
1191  *	expected to reset the NIC.
1194  *	The SDU length may be any value from 0 up to the protocol-
1195  *	defined maximum, but its buffer will be padded to a multiple
1200  *	will be padded so it is safe to round up.
1207  * @irq_disable_non_ev: Disable non-event IRQs on the NIC.  Each event
1210  *	a pointer to the &struct efx_msi_context for the channel.
1212  *	is a pointer to the &struct efx_nic.
1217  * @tx_enqueue: Add an SKB to TX queue
1218  * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC
1221  *	user RSS context to the NIC
1224  * @rx_probe: Allocate resources for RX queue
1225  * @rx_init: Initialise RX queue on the NIC
1226  * @rx_remove: Free resources for RX queue
1227  * @rx_write: Write RX descriptors and doorbell
1229  * @rx_packet: Receive the queued RX buffer on a channel
1230  * @rx_buf_hash_valid: Determine whether the RX prefix contains a valid hash
1235  * @ev_process: Process events for a queue, up to the given NAPI quota
1241  * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1245  * @filter_clear_rx: Remove all RX filters whose priority is less than or
1246  *	equal to the given priority and is not %EFX_FILTER_PRI_AUTO
1247  * @filter_count_rx_used: Get the number of filters in use at a given priority
1249  * @filter_get_rx_ids: Get list of RX filters at a given priority
1258  * @mtd_write: Write to an MTD partition
1259  * @mtd_sync: Wait for write-back to complete on MTD partition.  This
1262  * @ptp_write_host_time: Send host time to MC as part of sync protocol
1263  * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1270  * @tso_versions: Returns mask of firmware-assisted TSO versions supported.
1272  * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required.
1274  * @print_additional_fwver: Dump NIC-specific additional FW version info
1278  * @rxd_ptr_tbl_base: RX descriptor ring base address
1281  * @evq_rptr_tbl_base: Event queue read-pointer table base address
1283  * @rx_prefix_size: Size of RX prefix before packet data
1284  * @rx_hash_offset: Offset of RX flow hash within prefix
1286  * @rx_buffer_padding: Size of padding at end of RX packet
1287  * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1288  * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1485 	EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels);  in efx_get_channel()
1486 	return efx->channel[index];  in efx_get_channel()
1491 	for (_channel = (_efx)->channel[0];				\
1493 	     _channel = (_channel->channel + 1 < (_efx)->n_channels) ?	\
1494 		     (_efx)->channel[_channel->channel + 1] : NULL)
1498 	for (_channel = (_efx)->channel[(_efx)->n_channels - 1];	\
1500 	     _channel = _channel->channel ?				\
1501 		     (_efx)->channel[_channel->channel - 1] : NULL)
1506 	EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels);  in efx_get_tx_channel()
1507 	return efx->channel[efx->tx_channel_offset + index];  in efx_get_tx_channel()
1513 	EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels);  in efx_get_xdp_channel()
1514 	return efx->channel[efx->xdp_channel_offset + index];  in efx_get_xdp_channel()
1519 	return channel->channel - channel->efx->xdp_channel_offset <  in efx_channel_is_xdp_tx()
1520 	       channel->efx->n_xdp_channels;  in efx_channel_is_xdp_tx()
1531 		return channel->efx->xdp_tx_per_channel;  in efx_channel_num_tx_queues()
1532 	return channel->efx->tx_queues_per_channel;  in efx_channel_num_tx_queues()
1539 	return channel->tx_queue_by_type[type];  in efx_channel_get_tx_queue()
1550 /* Iterate over all TX queues belonging to a channel */
1555 		for (_tx_queue = (_channel)->tx_queue;			\
1556 		     _tx_queue < (_channel)->tx_queue +			\
1562 	return channel->rx_queue.core_index >= 0;  in efx_channel_has_rx_queue()
1569 	return &channel->rx_queue;  in efx_channel_get_rx_queue()
1572 /* Iterate over all RX queues belonging to a channel */
1577 		for (_rx_queue = &(_channel)->rx_queue;			\
1589 	return efx_rx_queue_channel(rx_queue)->channel;  in efx_rx_queue_index()
1592 /* Returns a pointer to the specified receive buffer in the RX
1598 	return &rx_queue->buffer[index];  in efx_rx_buffer()
1604 	if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))  in efx_rx_buf_next()
1611  * EFX_MAX_FRAME_LEN - calculate maximum frame length
1614  * given MTU.  The frame length will be equal to the MTU plus a
1619  * The 10G MAC requires 8-byte alignment on the frame
1620  * length, so we round up to the nearest 8.
1622  * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1633 	return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;  in efx_xmit_with_hwtstamp()
1637 	skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;  in efx_xmit_hwtstamp_pending()
1640 /* Get the max fill level of the TX queues on this channel */
1649 				 tx_queue->insert_count - tx_queue->read_count);  in efx_channel_tx_fill_level()
1663 				 tx_queue->insert_count - tx_queue->old_read_count);  in efx_channel_tx_old_fill_level()
1675 	const struct net_device *net_dev = efx->net_dev;  in efx_supported_features()
1677 	return net_dev->features | net_dev->hw_features;  in efx_supported_features()
1684 	return tx_queue->insert_count & tx_queue->ptr_mask;  in efx_tx_queue_get_insert_index()
1691 	return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)];  in __efx_tx_queue_get_insert_buffer()
1694 /* Get a TX buffer, checking it's not currently in use. */
1701 	EFX_WARN_ON_ONCE_PARANOID(buffer->len);  in efx_tx_queue_get_insert_buffer()
1702 	EFX_WARN_ON_ONCE_PARANOID(buffer->flags);  in efx_tx_queue_get_insert_buffer()
1703 	EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len);  in efx_tx_queue_get_insert_buffer()