Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2012-2013 Solarflare Communications Inc.
47 efx_dword_t reg; in efx_ef10_get_warm_boot_count() local
49 efx_readd(efx, ®, ER_DZ_BIU_MC_SFT_STATUS); in efx_ef10_get_warm_boot_count()
50 return EFX_DWORD_FIELD(reg, EFX_WORD_1) == 0xb007 ? in efx_ef10_get_warm_boot_count()
51 EFX_DWORD_FIELD(reg, EFX_WORD_0) : -EIO; in efx_ef10_get_warm_boot_count()
60 switch (efx->pci_dev->device) { in efx_ef10_pf_mem_bar()
78 bar = efx->type->mem_bar(efx); in efx_ef10_mem_map_size()
79 return resource_size(&efx->pci_dev->resource[bar]); in efx_ef10_mem_map_size()
84 return efx->type->is_vf; in efx_ef10_is_vf()
91 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_get_vf_index()
100 return -EIO; in efx_ef10_get_vf_index()
102 nic_data->vf_index = MCDI_DWORD(outbuf, GET_FUNCTION_INFO_OUT_VF); in efx_ef10_get_vf_index()
110 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_init_datapath_caps()
121 netif_err(efx, drv, efx->net_dev, in efx_ef10_init_datapath_caps()
123 return -EIO; in efx_ef10_init_datapath_caps()
126 nic_data->datapath_caps = in efx_ef10_init_datapath_caps()
130 nic_data->datapath_caps2 = MCDI_DWORD(outbuf, in efx_ef10_init_datapath_caps()
132 nic_data->piobuf_size = MCDI_WORD(outbuf, in efx_ef10_init_datapath_caps()
135 nic_data->datapath_caps2 = 0; in efx_ef10_init_datapath_caps()
136 nic_data->piobuf_size = ER_DZ_TX_PIOBUF_SIZE; in efx_ef10_init_datapath_caps()
141 nic_data->rx_dpcpu_fw_id = in efx_ef10_init_datapath_caps()
143 nic_data->tx_dpcpu_fw_id = in efx_ef10_init_datapath_caps()
146 if (!(nic_data->datapath_caps & in efx_ef10_init_datapath_caps()
148 netif_err(efx, probe, efx->net_dev, in efx_ef10_init_datapath_caps()
150 return -ENODEV; in efx_ef10_init_datapath_caps()
162 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_init_datapath_caps()
164 efx->vi_stride); in efx_ef10_init_datapath_caps()
168 efx->num_mac_stats = MCDI_WORD(outbuf, in efx_ef10_init_datapath_caps()
170 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_init_datapath_caps()
172 efx->num_mac_stats); in efx_ef10_init_datapath_caps()
175 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_init_datapath_caps()
177 efx->num_mac_stats); in efx_ef10_init_datapath_caps()
187 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_read_licensed_features()
198 nic_data->licensed_features = MCDI_QWORD(outbuf, in efx_ef10_read_licensed_features()
212 return rc > 0 ? rc : -ERANGE; in efx_ef10_get_sysclk_freq()
217 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_get_timer_workarounds()
222 nic_data->workaround_35388 = false; in efx_ef10_get_timer_workarounds()
223 nic_data->workaround_61265 = false; in efx_ef10_get_timer_workarounds()
227 if (rc == -ENOSYS) { in efx_ef10_get_timer_workarounds()
228 /* Firmware without GET_WORKAROUNDS - not a problem. */ in efx_ef10_get_timer_workarounds()
233 nic_data->workaround_61265 = true; in efx_ef10_get_timer_workarounds()
236 nic_data->workaround_35388 = true; in efx_ef10_get_timer_workarounds()
245 nic_data->workaround_35388 = true; in efx_ef10_get_timer_workarounds()
251 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_get_timer_workarounds()
253 nic_data->workaround_35388 ? "en" : "dis"); in efx_ef10_get_timer_workarounds()
254 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_get_timer_workarounds()
256 nic_data->workaround_61265 ? "en" : "dis"); in efx_ef10_get_timer_workarounds()
267 efx->timer_quantum_ns = MCDI_DWORD(data, in efx_ef10_process_timer_config()
269 efx->timer_max_ns = MCDI_DWORD(data, in efx_ef10_process_timer_config()
272 efx->timer_quantum_ns = MCDI_DWORD(data, in efx_ef10_process_timer_config()
276 efx->timer_max_ns = max_count * efx->timer_quantum_ns; in efx_ef10_process_timer_config()
278 efx->timer_quantum_ns = MCDI_DWORD(data, in efx_ef10_process_timer_config()
282 efx->timer_max_ns = max_count * efx->timer_quantum_ns; in efx_ef10_process_timer_config()
285 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_process_timer_config()
287 efx->timer_quantum_ns, efx->timer_max_ns); in efx_ef10_process_timer_config()
304 } else if (rc == -ENOSYS || rc == -EPERM) { in efx_ef10_get_timer_config()
305 /* Not available - fall back to Huntington defaults. */ in efx_ef10_get_timer_config()
313 efx->timer_quantum_ns = quantum; in efx_ef10_get_timer_config()
314 efx->timer_max_ns = efx->type->timer_period_max * quantum; in efx_ef10_get_timer_config()
338 return -EIO; in efx_ef10_get_mac_address_pf()
360 return -EIO; in efx_ef10_get_mac_address_vf()
380 ((efx->mcdi->fn_flags) & in efx_ef10_show_link_control_flag()
392 ((efx->mcdi->fn_flags) & in efx_ef10_show_primary_flag()
399 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_find_vlan()
402 WARN_ON(!mutex_is_locked(&nic_data->vlan_lock)); in efx_ef10_find_vlan()
404 list_for_each_entry(vlan, &nic_data->vlan_list, list) { in efx_ef10_find_vlan()
405 if (vlan->vid == vid) in efx_ef10_find_vlan()
414 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_add_vlan()
418 mutex_lock(&nic_data->vlan_lock); in efx_ef10_add_vlan()
427 netif_warn(efx, drv, efx->net_dev, in efx_ef10_add_vlan()
429 rc = -EALREADY; in efx_ef10_add_vlan()
433 rc = -ENOMEM; in efx_ef10_add_vlan()
438 vlan->vid = vid; in efx_ef10_add_vlan()
440 list_add_tail(&vlan->list, &nic_data->vlan_list); in efx_ef10_add_vlan()
442 if (efx->filter_state) { in efx_ef10_add_vlan()
443 mutex_lock(&efx->mac_lock); in efx_ef10_add_vlan()
444 down_write(&efx->filter_sem); in efx_ef10_add_vlan()
445 rc = efx_mcdi_filter_add_vlan(efx, vlan->vid); in efx_ef10_add_vlan()
446 up_write(&efx->filter_sem); in efx_ef10_add_vlan()
447 mutex_unlock(&efx->mac_lock); in efx_ef10_add_vlan()
453 mutex_unlock(&nic_data->vlan_lock); in efx_ef10_add_vlan()
457 list_del(&vlan->list); in efx_ef10_add_vlan()
461 mutex_unlock(&nic_data->vlan_lock); in efx_ef10_add_vlan()
468 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_del_vlan_internal()
470 WARN_ON(!mutex_is_locked(&nic_data->vlan_lock)); in efx_ef10_del_vlan_internal()
472 if (efx->filter_state) { in efx_ef10_del_vlan_internal()
473 down_write(&efx->filter_sem); in efx_ef10_del_vlan_internal()
474 efx_mcdi_filter_del_vlan(efx, vlan->vid); in efx_ef10_del_vlan_internal()
475 up_write(&efx->filter_sem); in efx_ef10_del_vlan_internal()
478 list_del(&vlan->list); in efx_ef10_del_vlan_internal()
484 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_del_vlan()
495 mutex_lock(&nic_data->vlan_lock); in efx_ef10_del_vlan()
499 netif_err(efx, drv, efx->net_dev, in efx_ef10_del_vlan()
501 rc = -ENOENT; in efx_ef10_del_vlan()
506 mutex_unlock(&nic_data->vlan_lock); in efx_ef10_del_vlan()
513 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_cleanup_vlans()
516 mutex_lock(&nic_data->vlan_lock); in efx_ef10_cleanup_vlans()
517 list_for_each_entry_safe(vlan, next_vlan, &nic_data->vlan_list, list) in efx_ef10_cleanup_vlans()
519 mutex_unlock(&nic_data->vlan_lock); in efx_ef10_cleanup_vlans()
533 return -ENOMEM; in efx_ef10_probe()
534 efx->nic_data = nic_data; in efx_ef10_probe()
539 rc = efx_nic_alloc_buffer(efx, &nic_data->mcdi_buf, in efx_ef10_probe()
556 nic_data->warm_boot_count = rc; in efx_ef10_probe()
569 mutex_init(&nic_data->udp_tunnels_lock); in efx_ef10_probe()
570 for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i) in efx_ef10_probe()
571 nic_data->udp_tunnels[i].type = in efx_ef10_probe()
584 rc = device_create_file(&efx->pci_dev->dev, in efx_ef10_probe()
589 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_primary_flag); in efx_ef10_probe()
593 rc = efx_get_pf_index(efx, &nic_data->pf_index); in efx_ef10_probe()
603 /* We can have one VI for each vi_stride-byte region. in efx_ef10_probe()
607 if (nic_data->datapath_caps & in efx_ef10_probe()
609 efx->tx_queues_per_channel = 4; in efx_ef10_probe()
611 efx->tx_queues_per_channel = 2; in efx_ef10_probe()
612 efx->max_vis = efx_ef10_mem_map_size(efx) / efx->vi_stride; in efx_ef10_probe()
613 if (!efx->max_vis) { in efx_ef10_probe()
614 netif_err(efx, drv, efx->net_dev, "error determining max VIs\n"); in efx_ef10_probe()
615 rc = -EIO; in efx_ef10_probe()
618 efx->max_channels = min_t(unsigned int, EFX_MAX_CHANNELS, in efx_ef10_probe()
619 efx->max_vis / efx->tx_queues_per_channel); in efx_ef10_probe()
620 efx->max_tx_channels = efx->max_channels; in efx_ef10_probe()
621 if (WARN_ON(efx->max_channels == 0)) { in efx_ef10_probe()
622 rc = -EIO; in efx_ef10_probe()
626 efx->rx_packet_len_offset = in efx_ef10_probe()
627 ES_DZ_RX_PREFIX_PKTLEN_OFST - ES_DZ_RX_PREFIX_SIZE; in efx_ef10_probe()
629 if (nic_data->datapath_caps & in efx_ef10_probe()
631 efx->net_dev->hw_features |= NETIF_F_RXFCS; in efx_ef10_probe()
636 efx->port_num = rc; in efx_ef10_probe()
638 rc = efx->type->get_mac_address(efx, efx->net_dev->perm_addr); in efx_ef10_probe()
647 if (rc && rc != -EPERM) in efx_ef10_probe()
653 if ((efx->pci_dev->physfn) && (!efx->pci_dev->is_physfn)) { in efx_ef10_probe()
654 struct pci_dev *pci_dev_pf = efx->pci_dev->physfn; in efx_ef10_probe()
657 efx_pf->type->get_mac_address(efx_pf, nic_data->port_id); in efx_ef10_probe()
660 ether_addr_copy(nic_data->port_id, efx->net_dev->perm_addr); in efx_ef10_probe()
662 INIT_LIST_HEAD(&nic_data->vlan_list); in efx_ef10_probe()
663 mutex_init(&nic_data->vlan_lock); in efx_ef10_probe()
678 if (nic_data->datapath_caps & in efx_ef10_probe()
680 efx->mcdi->fn_flags & in efx_ef10_probe()
682 efx->net_dev->udp_tunnel_nic_info = &efx_ef10_udp_tunnels; in efx_ef10_probe()
689 mutex_destroy(&nic_data->vlan_lock); in efx_ef10_probe()
693 device_remove_file(&efx->pci_dev->dev, &dev_attr_primary_flag); in efx_ef10_probe()
695 device_remove_file(&efx->pci_dev->dev, &dev_attr_link_control_flag); in efx_ef10_probe()
699 mutex_lock(&nic_data->udp_tunnels_lock); in efx_ef10_probe()
700 memset(nic_data->udp_tunnels, 0, sizeof(nic_data->udp_tunnels)); in efx_ef10_probe()
702 mutex_unlock(&nic_data->udp_tunnels_lock); in efx_ef10_probe()
703 mutex_destroy(&nic_data->udp_tunnels_lock); in efx_ef10_probe()
707 efx_nic_free_buffer(efx, &nic_data->mcdi_buf); in efx_ef10_probe()
710 efx->nic_data = NULL; in efx_ef10_probe()
718 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_free_piobufs()
725 for (i = 0; i < nic_data->n_piobufs; i++) { in efx_ef10_free_piobufs()
727 nic_data->piobuf_handle[i]); in efx_ef10_free_piobufs()
733 nic_data->n_piobufs = 0; in efx_ef10_free_piobufs()
738 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_alloc_piobufs()
753 if (!(efx_ef10_is_vf(efx) && rc == -ENOSPC)) in efx_ef10_alloc_piobufs()
759 rc = -EIO; in efx_ef10_alloc_piobufs()
762 nic_data->piobuf_handle[i] = in efx_ef10_alloc_piobufs()
764 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_alloc_piobufs()
766 nic_data->piobuf_handle[i]); in efx_ef10_alloc_piobufs()
769 nic_data->n_piobufs = i; in efx_ef10_alloc_piobufs()
777 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_link_piobufs()
787 /* Link a buffer to each VI in the write-combining mapping */ in efx_ef10_link_piobufs()
788 for (index = 0; index < nic_data->n_piobufs; ++index) { in efx_ef10_link_piobufs()
790 nic_data->piobuf_handle[index]); in efx_ef10_link_piobufs()
792 nic_data->pio_write_vi_base + index); in efx_ef10_link_piobufs()
797 netif_err(efx, drv, efx->net_dev, in efx_ef10_link_piobufs()
799 nic_data->pio_write_vi_base + index, index, in efx_ef10_link_piobufs()
803 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_link_piobufs()
805 nic_data->pio_write_vi_base + index, index); in efx_ef10_link_piobufs()
813 if (!channel->type->want_pio || in efx_ef10_link_piobufs()
814 channel->channel >= efx->xdp_channel_offset) in efx_ef10_link_piobufs()
822 offset = ((efx->tx_channel_offset + efx->n_tx_channels - in efx_ef10_link_piobufs()
823 tx_queue->channel->channel - 1) * in efx_ef10_link_piobufs()
825 index = offset / nic_data->piobuf_size; in efx_ef10_link_piobufs()
826 offset = offset % nic_data->piobuf_size; in efx_ef10_link_piobufs()
833 if (tx_queue->queue == nic_data->pio_write_vi_base) { in efx_ef10_link_piobufs()
839 nic_data->piobuf_handle[index]); in efx_ef10_link_piobufs()
842 tx_queue->queue); in efx_ef10_link_piobufs()
849 /* This is non-fatal; the TX path just in efx_ef10_link_piobufs()
852 netif_err(efx, drv, efx->net_dev, in efx_ef10_link_piobufs()
854 tx_queue->queue, index, rc); in efx_ef10_link_piobufs()
855 tx_queue->piobuf = NULL; in efx_ef10_link_piobufs()
857 tx_queue->piobuf = in efx_ef10_link_piobufs()
858 nic_data->pio_write_base + in efx_ef10_link_piobufs()
859 index * efx->vi_stride + offset; in efx_ef10_link_piobufs()
860 tx_queue->piobuf_offset = offset; in efx_ef10_link_piobufs()
861 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_link_piobufs()
863 tx_queue->queue, index, in efx_ef10_link_piobufs()
864 tx_queue->piobuf_offset, in efx_ef10_link_piobufs()
865 tx_queue->piobuf); in efx_ef10_link_piobufs()
877 while (index--) { in efx_ef10_link_piobufs()
879 nic_data->pio_write_vi_base + index); in efx_ef10_link_piobufs()
895 tx_queue->piobuf = NULL; in efx_ef10_forget_old_piobufs()
902 return n == 0 ? 0 : -ENOBUFS; in efx_ef10_alloc_piobufs()
922 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_remove()
931 if (efx->pci_dev->is_virtfn) { in efx_ef10_remove()
932 pci_dev_pf = efx->pci_dev->physfn; in efx_ef10_remove()
935 nic_data_pf = efx_pf->nic_data; in efx_ef10_remove()
936 vf = nic_data_pf->vf + nic_data->vf_index; in efx_ef10_remove()
937 vf->efx = NULL; in efx_ef10_remove()
939 netif_info(efx, drv, efx->net_dev, in efx_ef10_remove()
945 mutex_destroy(&nic_data->vlan_lock); in efx_ef10_remove()
953 if (nic_data->wc_membase) in efx_ef10_remove()
954 iounmap(nic_data->wc_membase); in efx_ef10_remove()
959 if (!nic_data->must_restore_piobufs) in efx_ef10_remove()
962 device_remove_file(&efx->pci_dev->dev, &dev_attr_primary_flag); in efx_ef10_remove()
963 device_remove_file(&efx->pci_dev->dev, &dev_attr_link_control_flag); in efx_ef10_remove()
967 memset(nic_data->udp_tunnels, 0, sizeof(nic_data->udp_tunnels)); in efx_ef10_remove()
968 mutex_lock(&nic_data->udp_tunnels_lock); in efx_ef10_remove()
970 mutex_unlock(&nic_data->udp_tunnels_lock); in efx_ef10_remove()
972 mutex_destroy(&nic_data->udp_tunnels_lock); in efx_ef10_remove()
975 efx_nic_free_buffer(efx, &nic_data->mcdi_buf); in efx_ef10_remove()
988 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_vadaptor_query()
994 if (nic_data->datapath_caps & in efx_ef10_vadaptor_query()
1005 rc = -EIO; in efx_ef10_vadaptor_query()
1072 * VF so fail probe. The VF needs to be re-created. This can happen in efx_ef10_probe_vf()
1075 pci_dev_pf = efx->pci_dev->physfn; in efx_ef10_probe_vf()
1078 struct efx_ef10_nic_data *nic_data_pf = efx_pf->nic_data; in efx_ef10_probe_vf()
1080 if (!nic_data_pf->vf) { in efx_ef10_probe_vf()
1081 netif_info(efx, drv, efx->net_dev, in efx_ef10_probe_vf()
1083 "please destroy and re-create the VF\n"); in efx_ef10_probe_vf()
1084 return -EBUSY; in efx_ef10_probe_vf()
1096 if (efx->pci_dev->is_virtfn) { in efx_ef10_probe_vf()
1097 if (efx->pci_dev->physfn) { in efx_ef10_probe_vf()
1099 pci_get_drvdata(efx->pci_dev->physfn); in efx_ef10_probe_vf()
1100 struct efx_ef10_nic_data *nic_data_p = efx_pf->nic_data; in efx_ef10_probe_vf()
1101 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_probe_vf()
1103 nic_data_p->vf[nic_data->vf_index].efx = efx; in efx_ef10_probe_vf()
1104 nic_data_p->vf[nic_data->vf_index].pci_dev = in efx_ef10_probe_vf()
1105 efx->pci_dev; in efx_ef10_probe_vf()
1107 netif_info(efx, drv, efx->net_dev, in efx_ef10_probe_vf()
1127 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_alloc_vis()
1129 return efx_mcdi_alloc_vis(efx, min_vis, max_vis, &nic_data->vi_base, in efx_ef10_alloc_vis()
1130 &nic_data->n_allocated_vis); in efx_ef10_alloc_vis()
1138 unsigned int min_vis = max_t(unsigned int, efx->tx_queues_per_channel, in efx_ef10_dimension_resources()
1141 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_dimension_resources()
1146 channel_vis = max(efx->n_channels, in efx_ef10_dimension_resources()
1147 ((efx->n_tx_channels + efx->n_extra_tx_channels) * in efx_ef10_dimension_resources()
1148 efx->tx_queues_per_channel) + in efx_ef10_dimension_resources()
1149 efx->n_xdp_channels * efx->xdp_tx_per_channel); in efx_ef10_dimension_resources()
1150 if (efx->max_vis && efx->max_vis < channel_vis) { in efx_ef10_dimension_resources()
1151 netif_dbg(efx, drv, efx->net_dev, in efx_ef10_dimension_resources()
1153 channel_vis, efx->max_vis); in efx_ef10_dimension_resources()
1154 channel_vis = efx->max_vis; in efx_ef10_dimension_resources()
1160 * copy-buffer per TX channel. Failure is non-fatal, as there in efx_ef10_dimension_resources()
1165 nic_data->piobuf_size / efx_piobuf_size * EF10_TX_PIOBUF_COUNT >= in efx_ef10_dimension_resources()
1166 efx->n_tx_channels) { in efx_ef10_dimension_resources()
1168 DIV_ROUND_UP(efx->n_tx_channels, in efx_ef10_dimension_resources()
1169 nic_data->piobuf_size / efx_piobuf_size); in efx_ef10_dimension_resources()
1172 if (rc == -ENOSPC) in efx_ef10_dimension_resources()
1173 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1175 else if (rc == -EPERM) in efx_ef10_dimension_resources()
1176 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1179 netif_err(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1182 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1186 nic_data->n_piobufs = 0; in efx_ef10_dimension_resources()
1189 /* PIO buffers should be mapped with write-combining enabled, in efx_ef10_dimension_resources()
1195 * The UC mapping contains (channel_vis - 1) complete VIs and the in efx_ef10_dimension_resources()
1199 uc_mem_map_size = PAGE_ALIGN((channel_vis - 1) * efx->vi_stride + in efx_ef10_dimension_resources()
1201 if (nic_data->n_piobufs) { in efx_ef10_dimension_resources()
1205 pio_write_vi_base = uc_mem_map_size / efx->vi_stride; in efx_ef10_dimension_resources()
1207 nic_data->n_piobufs) * in efx_ef10_dimension_resources()
1208 efx->vi_stride) - in efx_ef10_dimension_resources()
1210 max_vis = pio_write_vi_base + nic_data->n_piobufs; in efx_ef10_dimension_resources()
1226 if (nic_data->n_allocated_vis < channel_vis) { in efx_ef10_dimension_resources()
1227 netif_info(efx, drv, efx->net_dev, in efx_ef10_dimension_resources()
1235 efx->max_channels = nic_data->n_allocated_vis; in efx_ef10_dimension_resources()
1236 efx->max_tx_channels = in efx_ef10_dimension_resources()
1237 nic_data->n_allocated_vis / efx->tx_queues_per_channel; in efx_ef10_dimension_resources()
1240 return -EAGAIN; in efx_ef10_dimension_resources()
1246 if (nic_data->n_piobufs && in efx_ef10_dimension_resources()
1247 nic_data->n_allocated_vis < in efx_ef10_dimension_resources()
1248 pio_write_vi_base + nic_data->n_piobufs) { in efx_ef10_dimension_resources()
1249 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1251 nic_data->n_allocated_vis, nic_data->n_piobufs); in efx_ef10_dimension_resources()
1256 membase = ioremap(efx->membase_phys, uc_mem_map_size); in efx_ef10_dimension_resources()
1258 netif_err(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1261 return -ENOMEM; in efx_ef10_dimension_resources()
1263 iounmap(efx->membase); in efx_ef10_dimension_resources()
1264 efx->membase = membase; in efx_ef10_dimension_resources()
1268 nic_data->wc_membase = ioremap_wc(efx->membase_phys + in efx_ef10_dimension_resources()
1271 if (!nic_data->wc_membase) { in efx_ef10_dimension_resources()
1272 netif_err(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1275 return -ENOMEM; in efx_ef10_dimension_resources()
1277 nic_data->pio_write_vi_base = pio_write_vi_base; in efx_ef10_dimension_resources()
1278 nic_data->pio_write_base = in efx_ef10_dimension_resources()
1279 nic_data->wc_membase + in efx_ef10_dimension_resources()
1280 (pio_write_vi_base * efx->vi_stride + ER_DZ_TX_PIOBUF - in efx_ef10_dimension_resources()
1288 netif_dbg(efx, probe, efx->net_dev, in efx_ef10_dimension_resources()
1290 &efx->membase_phys, efx->membase, uc_mem_map_size, in efx_ef10_dimension_resources()
1291 nic_data->wc_membase, wc_mem_map_size); in efx_ef10_dimension_resources()
1298 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_fini_nic()
1300 kfree(nic_data->mc_stats); in efx_ef10_fini_nic()
1301 nic_data->mc_stats = NULL; in efx_ef10_fini_nic()
1306 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_init_nic()
1310 if (nic_data->must_check_datapath_caps) { in efx_ef10_init_nic()
1314 nic_data->must_check_datapath_caps = false; in efx_ef10_init_nic()
1317 if (efx->must_realloc_vis) { in efx_ef10_init_nic()
1319 rc = efx_ef10_alloc_vis(efx, nic_data->n_allocated_vis, in efx_ef10_init_nic()
1320 nic_data->n_allocated_vis); in efx_ef10_init_nic()
1323 efx->must_realloc_vis = false; in efx_ef10_init_nic()
1326 nic_data->mc_stats = kmalloc(efx->num_mac_stats * sizeof(__le64), in efx_ef10_init_nic()
1328 if (!nic_data->mc_stats) in efx_ef10_init_nic()
1329 return -ENOMEM; in efx_ef10_init_nic()
1331 if (nic_data->must_restore_piobufs && nic_data->n_piobufs) { in efx_ef10_init_nic()
1332 rc = efx_ef10_alloc_piobufs(efx, nic_data->n_piobufs); in efx_ef10_init_nic()
1339 /* Log an error on failure, but this is non-fatal. in efx_ef10_init_nic()
1340 * Permission errors are less important - we've presumably in efx_ef10_init_nic()
1343 if (rc == -EPERM) in efx_ef10_init_nic()
1344 netif_dbg(efx, drv, efx->net_dev, in efx_ef10_init_nic()
1347 netif_err(efx, drv, efx->net_dev, in efx_ef10_init_nic()
1349 nic_data->must_restore_piobufs = false; in efx_ef10_init_nic()
1363 efx->net_dev->features |= encap_tso_features; in efx_ef10_init_nic()
1365 efx->net_dev->hw_enc_features = hw_enc_features; in efx_ef10_init_nic()
1368 rc = efx->type->rx_push_rss_config(efx, false, in efx_ef10_init_nic()
1369 efx->rss_context.rx_indir_table, NULL); in efx_ef10_init_nic()
1376 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_table_reset_mc_allocations()
1382 efx->must_realloc_vis = true; in efx_ef10_table_reset_mc_allocations()
1384 nic_data->must_restore_piobufs = true; in efx_ef10_table_reset_mc_allocations()
1386 efx->rss_context.context_id = EFX_MCDI_RSS_CONTEXT_INVALID; in efx_ef10_table_reset_mc_allocations()
1388 /* Driver-created vswitches and vports must be re-created */ in efx_ef10_table_reset_mc_allocations()
1389 nic_data->must_probe_vswitching = true; in efx_ef10_table_reset_mc_allocations()
1390 efx->vport_id = EVB_PORT_ID_ASSIGNED; in efx_ef10_table_reset_mc_allocations()
1392 if (nic_data->vf) in efx_ef10_table_reset_mc_allocations()
1393 for (i = 0; i < efx->vf_count; i++) in efx_ef10_table_reset_mc_allocations()
1394 nic_data->vf[i].vport_id = 0; in efx_ef10_table_reset_mc_allocations()
1433 return -EINVAL; in efx_ef10_map_reset_flags()
1440 /* Unprivileged functions return -EPERM, but need to return success in efx_ef10_reset()
1443 if (reset_type == RESET_TYPE_WORLD && rc == -EPERM) in efx_ef10_reset()
1644 (1ULL << (EF10_STAT_fec_uncorrected_errors - 64)) | \
1645 (1ULL << (EF10_STAT_fec_corrected_errors - 64)) | \
1646 (1ULL << (EF10_STAT_fec_corrected_symbols_lane0 - 64)) | \
1647 (1ULL << (EF10_STAT_fec_corrected_symbols_lane1 - 64)) | \
1648 (1ULL << (EF10_STAT_fec_corrected_symbols_lane2 - 64)) | \
1649 (1ULL << (EF10_STAT_fec_corrected_symbols_lane3 - 64)))
1657 (1ULL << (EF10_STAT_ctpio_vi_busy_fallback - 64)) | \
1658 (1ULL << (EF10_STAT_ctpio_long_write_success - 64)) | \
1659 (1ULL << (EF10_STAT_ctpio_missing_dbell_fail - 64)) | \
1660 (1ULL << (EF10_STAT_ctpio_overflow_fail - 64)) | \
1661 (1ULL << (EF10_STAT_ctpio_underflow_fail - 64)) | \
1662 (1ULL << (EF10_STAT_ctpio_timeout_fail - 64)) | \
1663 (1ULL << (EF10_STAT_ctpio_noncontig_wr_fail - 64)) | \
1664 (1ULL << (EF10_STAT_ctpio_frm_clobber_fail - 64)) | \
1665 (1ULL << (EF10_STAT_ctpio_invalid_wr_fail - 64)) | \
1666 (1ULL << (EF10_STAT_ctpio_vi_clobber_fallback - 64)) | \
1667 (1ULL << (EF10_STAT_ctpio_unqualified_fallback - 64)) | \
1668 (1ULL << (EF10_STAT_ctpio_runt_fallback - 64)) | \
1669 (1ULL << (EF10_STAT_ctpio_success - 64)) | \
1670 (1ULL << (EF10_STAT_ctpio_fallback - 64)) | \
1671 (1ULL << (EF10_STAT_ctpio_poison - 64)) | \
1672 (1ULL << (EF10_STAT_ctpio_erase - 64)))
1678 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_raw_stat_mask()
1680 if (!(efx->mcdi->fn_flags & in efx_ef10_raw_stat_mask()
1687 if (nic_data->datapath_caps2 & in efx_ef10_raw_stat_mask()
1694 if (nic_data->datapath_caps & in efx_ef10_raw_stat_mask()
1703 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_get_stat_mask()
1709 if (nic_data->datapath_caps & in efx_ef10_get_stat_mask()
1711 raw_mask[0] |= ~((1ULL << EF10_STAT_rx_unicast) - 1); in efx_ef10_get_stat_mask()
1712 raw_mask[1] = (1ULL << (EF10_STAT_V1_COUNT - 64)) - 1; in efx_ef10_get_stat_mask()
1717 if (efx->num_mac_stats >= MC_CMD_MAC_NSTATS_V2) in efx_ef10_get_stat_mask()
1724 if (efx->num_mac_stats >= MC_CMD_MAC_NSTATS_V3 && in efx_ef10_get_stat_mask()
1725 (nic_data->datapath_caps2 & in efx_ef10_get_stat_mask()
1741 static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 *names) in efx_ef10_describe_stats() argument
1747 mask, names); in efx_ef10_describe_stats()
1754 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_update_stats_common()
1755 u64 *stats = nic_data->stats; in efx_ef10_update_stats_common()
1772 if (nic_data->datapath_caps & in efx_ef10_update_stats_common()
1775 core_stats->rx_packets = stats[EF10_STAT_rx_unicast] + in efx_ef10_update_stats_common()
1778 core_stats->tx_packets = stats[EF10_STAT_tx_unicast] + in efx_ef10_update_stats_common()
1781 core_stats->rx_bytes = stats[EF10_STAT_rx_unicast_bytes] + in efx_ef10_update_stats_common()
1784 core_stats->tx_bytes = stats[EF10_STAT_tx_unicast_bytes] + in efx_ef10_update_stats_common()
1787 core_stats->rx_dropped = stats[GENERIC_STAT_rx_nodesc_trunc] + in efx_ef10_update_stats_common()
1789 core_stats->multicast = stats[EF10_STAT_rx_multicast]; in efx_ef10_update_stats_common()
1790 core_stats->rx_crc_errors = stats[EF10_STAT_rx_bad]; in efx_ef10_update_stats_common()
1791 core_stats->rx_fifo_errors = stats[EF10_STAT_rx_overflow]; in efx_ef10_update_stats_common()
1792 core_stats->rx_errors = core_stats->rx_crc_errors; in efx_ef10_update_stats_common()
1793 core_stats->tx_errors = stats[EF10_STAT_tx_bad]; in efx_ef10_update_stats_common()
1796 core_stats->rx_packets = stats[EF10_STAT_port_rx_packets]; in efx_ef10_update_stats_common()
1797 core_stats->tx_packets = stats[EF10_STAT_port_tx_packets]; in efx_ef10_update_stats_common()
1798 core_stats->rx_bytes = stats[EF10_STAT_port_rx_bytes]; in efx_ef10_update_stats_common()
1799 core_stats->tx_bytes = stats[EF10_STAT_port_tx_bytes]; in efx_ef10_update_stats_common()
1800 core_stats->rx_dropped = stats[EF10_STAT_port_rx_nodesc_drops] + in efx_ef10_update_stats_common()
1803 core_stats->multicast = stats[EF10_STAT_port_rx_multicast]; in efx_ef10_update_stats_common()
1804 core_stats->rx_length_errors = in efx_ef10_update_stats_common()
1807 core_stats->rx_crc_errors = stats[EF10_STAT_port_rx_bad]; in efx_ef10_update_stats_common()
1808 core_stats->rx_frame_errors = in efx_ef10_update_stats_common()
1810 core_stats->rx_fifo_errors = stats[EF10_STAT_port_rx_overflow]; in efx_ef10_update_stats_common()
1811 core_stats->rx_errors = (core_stats->rx_length_errors + in efx_ef10_update_stats_common()
1812 core_stats->rx_crc_errors + in efx_ef10_update_stats_common()
1813 core_stats->rx_frame_errors); in efx_ef10_update_stats_common()
1822 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_update_stats_pf()
1824 u64 *stats = nic_data->stats; in efx_ef10_update_stats_pf()
1828 efx_nic_copy_stats(efx, nic_data->mc_stats); in efx_ef10_update_stats_pf()
1830 mask, stats, nic_data->mc_stats, false); in efx_ef10_update_stats_pf()
1841 stats[EF10_STAT_port_rx_bytes] - in efx_ef10_update_stats_pf()
1860 __must_hold(&efx->stats_lock) in efx_ef10_try_update_nic_stats_vf()
1863 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_try_update_nic_stats_vf()
1866 u64 *stats = nic_data->stats; in efx_ef10_try_update_nic_stats_vf()
1867 u32 dma_len = efx->num_mac_stats * sizeof(u64); in efx_ef10_try_update_nic_stats_vf()
1872 spin_unlock_bh(&efx->stats_lock); in efx_ef10_try_update_nic_stats_vf()
1878 spin_lock_bh(&efx->stats_lock); in efx_ef10_try_update_nic_stats_vf()
1883 dma_stats[efx->num_mac_stats - 1] = EFX_MC_STATS_GENERATION_INVALID; in efx_ef10_try_update_nic_stats_vf()
1893 spin_lock_bh(&efx->stats_lock); in efx_ef10_try_update_nic_stats_vf()
1896 if (rc != -ENOENT || atomic_read(&efx->active_queues)) in efx_ef10_try_update_nic_stats_vf()
1902 generation_end = dma_stats[efx->num_mac_stats - 1]; in efx_ef10_try_update_nic_stats_vf()
1913 rc = -EAGAIN; in efx_ef10_try_update_nic_stats_vf()
1935 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_update_stats_atomic_vf()
1940 efx_update_sw_stats(efx, nic_data->stats); in efx_ef10_update_stats_atomic_vf()
1946 struct efx_nic *efx = channel->efx; in efx_ef10_push_irq_moderation()
1950 if (channel->irq_moderation_us) { in efx_ef10_push_irq_moderation()
1952 usecs = channel->irq_moderation_us; in efx_ef10_push_irq_moderation()
1963 channel->channel); in efx_ef10_push_irq_moderation()
1978 channel->channel); in efx_ef10_push_irq_moderation()
1986 channel->channel); in efx_ef10_push_irq_moderation()
1995 return -EOPNOTSUPP; in efx_ef10_set_wol_vf()
2000 wol->supported = 0; in efx_ef10_get_wol()
2001 wol->wolopts = 0; in efx_ef10_get_wol()
2002 memset(&wol->sopass, 0, sizeof(wol->sopass)); in efx_ef10_get_wol()
2008 return -EINVAL; in efx_ef10_set_wol()
2016 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_mcdi_request()
2017 u8 *pdu = nic_data->mcdi_buf.addr; in efx_ef10_mcdi_request()
2024 * for passing the 64-bit address of an MCDI request to in efx_ef10_mcdi_request()
2029 _efx_writed(efx, cpu_to_le32((u64)nic_data->mcdi_buf.dma_addr >> 32), in efx_ef10_mcdi_request()
2031 _efx_writed(efx, cpu_to_le32((u32)nic_data->mcdi_buf.dma_addr), in efx_ef10_mcdi_request()
2037 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_mcdi_poll_response()
2038 const efx_dword_t hdr = *(const efx_dword_t *)nic_data->mcdi_buf.addr; in efx_ef10_mcdi_poll_response()
2048 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_mcdi_read_response()
2049 const u8 *pdu = nic_data->mcdi_buf.addr; in efx_ef10_mcdi_read_response()
2056 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_mcdi_reboot_detected()
2062 nic_data->must_check_datapath_caps = true; in efx_ef10_mcdi_reboot_detected()
2067 nic_data->stats[EF10_STAT_port_rx_bad_bytes] = 0; in efx_ef10_mcdi_reboot_detected()
2072 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_mcdi_poll_reboot()
2085 if (rc == nic_data->warm_boot_count) in efx_ef10_mcdi_poll_reboot()
2088 nic_data->warm_boot_count = rc; in efx_ef10_mcdi_poll_reboot()
2091 return -EIO; in efx_ef10_mcdi_poll_reboot()
2104 struct efx_nic *efx = context->efx; in efx_ef10_msi_interrupt()
2106 netif_vdbg(efx, intr, efx->net_dev, in efx_ef10_msi_interrupt()
2109 if (likely(READ_ONCE(efx->irq_soft_enabled))) { in efx_ef10_msi_interrupt()
2111 if (context->index == efx->irq_level) in efx_ef10_msi_interrupt()
2112 efx->last_irq_cpu = raw_smp_processor_id(); in efx_ef10_msi_interrupt()
2115 efx_schedule_channel_irq(efx->channel[context->index]); in efx_ef10_msi_interrupt()
2124 bool soft_enabled = READ_ONCE(efx->irq_soft_enabled); in efx_ef10_legacy_interrupt()
2126 efx_dword_t reg; in efx_ef10_legacy_interrupt() local
2130 efx_readd(efx, ®, ER_DZ_BIU_INT_ISR); in efx_ef10_legacy_interrupt()
2131 queues = EFX_DWORD_FIELD(reg, ERF_DZ_ISR_REG); in efx_ef10_legacy_interrupt()
2138 if (queues & (1U << efx->irq_level)) in efx_ef10_legacy_interrupt()
2139 efx->last_irq_cpu = raw_smp_processor_id(); in efx_ef10_legacy_interrupt()
2148 netif_vdbg(efx, intr, efx->net_dev, in efx_ef10_legacy_interrupt()
2150 irq, raw_smp_processor_id(), EFX_DWORD_VAL(reg)); in efx_ef10_legacy_interrupt()
2161 return -ENOTSUPP; in efx_ef10_irq_test_generate()
2165 MCDI_SET_DWORD(inbuf, TRIGGER_INTERRUPT_IN_INTR_LEVEL, efx->irq_level); in efx_ef10_irq_test_generate()
2174 tx_queue->type = tx_queue->label & 3; in efx_ef10_tx_probe()
2175 return efx_nic_alloc_buffer(tx_queue->efx, &tx_queue->txd.buf, in efx_ef10_tx_probe()
2176 (tx_queue->ptr_mask + 1) * in efx_ef10_tx_probe()
2186 efx_oword_t reg; in efx_ef10_push_tx_desc() local
2188 write_ptr = tx_queue->write_count & tx_queue->ptr_mask; in efx_ef10_push_tx_desc()
2189 EFX_POPULATE_OWORD_1(reg, ERF_DZ_TX_DESC_WPTR, write_ptr); in efx_ef10_push_tx_desc()
2190 reg.qword[0] = *txd; in efx_ef10_push_tx_desc()
2191 efx_writeo_page(tx_queue->efx, ®, in efx_ef10_push_tx_desc()
2192 ER_DZ_TX_DESC_UPD, tx_queue->queue); in efx_ef10_push_tx_desc()
2195 /* Add Firmware-Assisted TSO v2 option descriptors to a queue.
2209 EFX_WARN_ON_ONCE_PARANOID(tx_queue->tso_version != 2); in efx_ef10_tx_tso_desc()
2211 mss = skb_shinfo(skb)->gso_size; in efx_ef10_tx_tso_desc()
2215 return -EINVAL; in efx_ef10_tx_tso_desc()
2218 if (skb->encapsulation) { in efx_ef10_tx_tso_desc()
2219 if (!tx_queue->tso_encap) in efx_ef10_tx_tso_desc()
2220 return -EINVAL; in efx_ef10_tx_tso_desc()
2222 if (ip->version == 4) in efx_ef10_tx_tso_desc()
2223 outer_ipv4_id = ntohs(ip->id); in efx_ef10_tx_tso_desc()
2232 /* 8000-series EF10 hardware requires that IP Total Length be in efx_ef10_tx_tso_desc()
2235 * than (0x10000 - inner_network_header). Otherwise the TCP in efx_ef10_tx_tso_desc()
2237 * We fill in ip->tot_len with 0xff30, which should satisfy the in efx_ef10_tx_tso_desc()
2243 ip_tot_len = -EFX_TSO2_MAX_HDRLEN; in efx_ef10_tx_tso_desc()
2245 (tcp->doff << 2u) > ip_tot_len); in efx_ef10_tx_tso_desc()
2247 if (ip->version == 4) { in efx_ef10_tx_tso_desc()
2248 ip->tot_len = htons(ip_tot_len); in efx_ef10_tx_tso_desc()
2249 ip->check = 0; in efx_ef10_tx_tso_desc()
2250 inner_ipv4_id = ntohs(ip->id); in efx_ef10_tx_tso_desc()
2252 ((struct ipv6hdr *)ip)->payload_len = htons(ip_tot_len); in efx_ef10_tx_tso_desc()
2255 seqnum = ntohl(tcp->seq); in efx_ef10_tx_tso_desc()
2259 buffer->flags = EFX_TX_BUF_OPTION; in efx_ef10_tx_tso_desc()
2260 buffer->len = 0; in efx_ef10_tx_tso_desc()
2261 buffer->unmap_len = 0; in efx_ef10_tx_tso_desc()
2262 EFX_POPULATE_QWORD_5(buffer->option, in efx_ef10_tx_tso_desc()
2270 ++tx_queue->insert_count; in efx_ef10_tx_tso_desc()
2274 buffer->flags = EFX_TX_BUF_OPTION; in efx_ef10_tx_tso_desc()
2275 buffer->len = 0; in efx_ef10_tx_tso_desc()
2276 buffer->unmap_len = 0; in efx_ef10_tx_tso_desc()
2277 EFX_POPULATE_QWORD_5(buffer->option, in efx_ef10_tx_tso_desc()
2285 ++tx_queue->insert_count; in efx_ef10_tx_tso_desc()
2292 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_tso_versions()
2295 if (nic_data->datapath_caps & in efx_ef10_tso_versions()
2298 if (nic_data->datapath_caps2 & in efx_ef10_tso_versions()
2306 bool csum_offload = tx_queue->type & EFX_TXQ_TYPE_OUTER_CSUM; in efx_ef10_tx_init()
2307 bool inner_csum = tx_queue->type & EFX_TXQ_TYPE_INNER_CSUM; in efx_ef10_tx_init()
2308 struct efx_channel *channel = tx_queue->channel; in efx_ef10_tx_init()
2309 struct efx_nic *efx = tx_queue->efx; in efx_ef10_tx_init()
2314 nic_data = efx->nic_data; in efx_ef10_tx_init()
2319 if (!(nic_data->licensed_features & in efx_ef10_tx_init()
2321 tx_queue->timestamping = false; in efx_ef10_tx_init()
2323 if (efx->type->ptp_set_ts_sync_events) in efx_ef10_tx_init()
2324 efx->type->ptp_set_ts_sync_events(efx, false, false); in efx_ef10_tx_init()
2335 !tx_queue->timestamping && !tx_queue->xdp_tx) { in efx_ef10_tx_init()
2336 tx_queue->tso_version = 2; in efx_ef10_tx_init()
2337 netif_dbg(efx, hw, efx->net_dev, "Using TSOv2 for channel %u\n", in efx_ef10_tx_init()
2338 channel->channel); in efx_ef10_tx_init()
2341 tx_queue->tso_version = 1; in efx_ef10_tx_init()
2352 * attempt to push a no-op descriptor in its place. in efx_ef10_tx_init()
2354 tx_queue->buffer[0].flags = EFX_TX_BUF_OPTION; in efx_ef10_tx_init()
2355 tx_queue->insert_count = 1; in efx_ef10_tx_init()
2362 ESF_DZ_TX_OPTION_IP_CSUM, csum_offload && tx_queue->tso_version != 2, in efx_ef10_tx_init()
2364 ESF_DZ_TX_OPTION_INNER_IP_CSUM, inner_csum && tx_queue->tso_version != 2, in efx_ef10_tx_init()
2365 ESF_DZ_TX_TIMESTAMP, tx_queue->timestamping); in efx_ef10_tx_init()
2366 tx_queue->write_count = 1; in efx_ef10_tx_init()
2368 if (tx_queue->tso_version == 2 && efx_has_cap(efx, TX_TSO_V2_ENCAP)) in efx_ef10_tx_init()
2369 tx_queue->tso_encap = true; in efx_ef10_tx_init()
2377 netdev_WARN(efx->net_dev, "failed to initialise TXQ %d\n", in efx_ef10_tx_init()
2378 tx_queue->queue); in efx_ef10_tx_init()
2385 efx_dword_t reg; in efx_ef10_notify_tx_desc() local
2387 write_ptr = tx_queue->write_count & tx_queue->ptr_mask; in efx_ef10_notify_tx_desc()
2388 EFX_POPULATE_DWORD_1(reg, ERF_DZ_TX_DESC_WPTR_DWORD, write_ptr); in efx_ef10_notify_tx_desc()
2389 efx_writed_page(tx_queue->efx, ®, in efx_ef10_notify_tx_desc()
2390 ER_DZ_TX_DESC_UPD_DWORD, tx_queue->queue); in efx_ef10_notify_tx_desc()
2406 len = (end & (~(EFX_PAGE_SIZE - 1))) - dma_addr; in efx_ef10_tx_limit_len()
2414 unsigned int old_write_count = tx_queue->write_count; in efx_ef10_tx_write()
2419 tx_queue->xmit_pending = false; in efx_ef10_tx_write()
2420 if (unlikely(tx_queue->write_count == tx_queue->insert_count)) in efx_ef10_tx_write()
2424 write_ptr = tx_queue->write_count & tx_queue->ptr_mask; in efx_ef10_tx_write()
2425 buffer = &tx_queue->buffer[write_ptr]; in efx_ef10_tx_write()
2427 ++tx_queue->write_count; in efx_ef10_tx_write()
2430 if (buffer->flags & EFX_TX_BUF_OPTION) { in efx_ef10_tx_write()
2431 *txd = buffer->option; in efx_ef10_tx_write()
2434 tx_queue->packet_write_count = tx_queue->write_count; in efx_ef10_tx_write()
2436 tx_queue->packet_write_count = tx_queue->write_count; in efx_ef10_tx_write()
2441 buffer->flags & EFX_TX_BUF_CONT, in efx_ef10_tx_write()
2442 ESF_DZ_TX_KER_BYTE_CNT, buffer->len, in efx_ef10_tx_write()
2443 ESF_DZ_TX_KER_BUF_ADDR, buffer->dma_addr); in efx_ef10_tx_write()
2445 } while (tx_queue->write_count != tx_queue->insert_count); in efx_ef10_tx_write()
2451 old_write_count & tx_queue->ptr_mask); in efx_ef10_tx_write()
2453 ++tx_queue->pushes; in efx_ef10_tx_write()
2461 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_probe_multicast_chaining()
2467 if (rc == -ENOSYS) { in efx_ef10_probe_multicast_chaining()
2471 nic_data->workaround_26807 = false; in efx_ef10_probe_multicast_chaining()
2478 nic_data->workaround_26807 = in efx_ef10_probe_multicast_chaining()
2481 if (want_workaround_26807 && !nic_data->workaround_26807) { in efx_ef10_probe_multicast_chaining()
2490 netif_info(efx, drv, efx->net_dev, in efx_ef10_probe_multicast_chaining()
2495 * so re-read the warm_boot_count in efx_ef10_probe_multicast_chaining()
2502 nic_data->warm_boot_count = rc; in efx_ef10_probe_multicast_chaining()
2506 nic_data->workaround_26807 = true; in efx_ef10_probe_multicast_chaining()
2507 } else if (rc == -EPERM) { in efx_ef10_probe_multicast_chaining()
2516 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_filter_table_probe()
2522 rc = efx_mcdi_filter_table_probe(efx, nic_data->workaround_26807); in efx_ef10_filter_table_probe()
2527 list_for_each_entry(vlan, &nic_data->vlan_list, list) { in efx_ef10_filter_table_probe()
2528 rc = efx_mcdi_filter_add_vlan(efx, vlan->vid); in efx_ef10_filter_table_probe()
2549 ESF_DZ_RX_KER_BYTE_CNT, rx_buf->len, in efx_ef10_build_rx_desc()
2550 ESF_DZ_RX_KER_BUF_ADDR, rx_buf->dma_addr); in efx_ef10_build_rx_desc()
2555 struct efx_nic *efx = rx_queue->efx; in efx_ef10_rx_write()
2557 efx_dword_t reg; in efx_ef10_rx_write() local
2560 write_count = rx_queue->added_count & ~7; in efx_ef10_rx_write()
2561 if (rx_queue->notified_count == write_count) in efx_ef10_rx_write()
2567 rx_queue->notified_count & rx_queue->ptr_mask); in efx_ef10_rx_write()
2568 while (++rx_queue->notified_count != write_count); in efx_ef10_rx_write()
2571 EFX_POPULATE_DWORD_1(reg, ERF_DZ_RX_DESC_WPTR, in efx_ef10_rx_write()
2572 write_count & rx_queue->ptr_mask); in efx_ef10_rx_write()
2573 efx_writed_page(efx, ®, ER_DZ_RX_DESC_UPD, in efx_ef10_rx_write()
2589 MCDI_SET_DWORD(inbuf, DRIVER_EVENT_IN_EVQ, channel->channel); in efx_ef10_rx_defer_refill()
2592 * already swapped the data to little-endian order. in efx_ef10_rx_defer_refill()
2597 efx_mcdi_rpc_async(channel->efx, MC_CMD_DRIVER_EVENT, in efx_ef10_rx_defer_refill()
2612 struct efx_nic *efx = channel->efx; in efx_ef10_ev_init()
2616 nic_data = efx->nic_data; in efx_ef10_ev_init()
2617 use_v2 = nic_data->datapath_caps2 & in efx_ef10_ev_init()
2619 cut_thru = !(nic_data->datapath_caps & in efx_ef10_ev_init()
2627 struct efx_nic *efx = rx_queue->efx; in efx_ef10_handle_rx_wrong_queue()
2629 netif_info(efx, hw, efx->net_dev, in efx_ef10_handle_rx_wrong_queue()
2640 unsigned int dropped = (actual - expected) & rx_queue->ptr_mask; in efx_ef10_handle_rx_bad_lbits()
2641 struct efx_nic *efx = rx_queue->efx; in efx_ef10_handle_rx_bad_lbits()
2643 netif_info(efx, hw, efx->net_dev, in efx_ef10_handle_rx_bad_lbits()
2655 netif_dbg(rx_queue->efx, hw, rx_queue->efx->net_dev, in efx_ef10_handle_rx_abort()
2657 rx_queue->scatter_n); in efx_ef10_handle_rx_abort()
2659 rx_desc_ptr = rx_queue->removed_count & rx_queue->ptr_mask; in efx_ef10_handle_rx_abort()
2661 efx_rx_packet(rx_queue, rx_desc_ptr, rx_queue->scatter_n, in efx_ef10_handle_rx_abort()
2664 rx_queue->removed_count += rx_queue->scatter_n; in efx_ef10_handle_rx_abort()
2665 rx_queue->scatter_n = 0; in efx_ef10_handle_rx_abort()
2666 rx_queue->scatter_len = 0; in efx_ef10_handle_rx_abort()
2667 ++efx_rx_queue_channel(rx_queue)->n_rx_nodesc_trunc; in efx_ef10_handle_rx_abort()
2677 struct efx_nic *efx = channel->efx; in efx_ef10_handle_rx_event_errors()
2681 if (!(efx->net_dev->features & NETIF_F_RXALL)) { in efx_ef10_handle_rx_event_errors()
2682 if (!efx->loopback_selftest) in efx_ef10_handle_rx_event_errors()
2683 channel->n_rx_eth_crc_err += n_packets; in efx_ef10_handle_rx_event_errors()
2694 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event_errors()
2698 if (!efx->loopback_selftest) in efx_ef10_handle_rx_event_errors()
2700 &channel->n_rx_outer_ip_hdr_chksum_err : in efx_ef10_handle_rx_event_errors()
2701 &channel->n_rx_ip_hdr_chksum_err) += n_packets; in efx_ef10_handle_rx_event_errors()
2710 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event_errors()
2714 if (!efx->loopback_selftest) in efx_ef10_handle_rx_event_errors()
2716 &channel->n_rx_outer_tcp_udp_chksum_err : in efx_ef10_handle_rx_event_errors()
2717 &channel->n_rx_tcp_udp_chksum_err) += n_packets; in efx_ef10_handle_rx_event_errors()
2722 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event_errors()
2730 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event_errors()
2734 if (!efx->loopback_selftest) in efx_ef10_handle_rx_event_errors()
2735 channel->n_rx_inner_ip_hdr_chksum_err += n_packets; in efx_ef10_handle_rx_event_errors()
2740 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event_errors()
2748 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event_errors()
2752 if (!efx->loopback_selftest) in efx_ef10_handle_rx_event_errors()
2753 channel->n_rx_inner_tcp_udp_chksum_err += n_packets; in efx_ef10_handle_rx_event_errors()
2767 struct efx_nic *efx = channel->efx; in efx_ef10_handle_rx_event()
2768 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_handle_rx_event()
2774 if (unlikely(READ_ONCE(efx->reset_pending))) in efx_ef10_handle_rx_event()
2785 nic_data->datapath_caps & in efx_ef10_handle_rx_event()
2791 netdev_WARN(efx->net_dev, "saw RX_DROP_EVENT: event=" in efx_ef10_handle_rx_event()
2800 n_descs = ((next_ptr_lbits - rx_queue->removed_count) & in efx_ef10_handle_rx_event()
2801 ((1 << ESF_DZ_RX_DSC_PTR_LBITS_WIDTH) - 1)); in efx_ef10_handle_rx_event()
2803 if (n_descs != rx_queue->scatter_n + 1) { in efx_ef10_handle_rx_event()
2804 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_handle_rx_event()
2807 if (unlikely(n_descs == rx_queue->scatter_n)) { in efx_ef10_handle_rx_event()
2808 if (rx_queue->scatter_n == 0 || rx_bytes != 0) in efx_ef10_handle_rx_event()
2809 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event()
2812 rx_queue->scatter_n, in efx_ef10_handle_rx_event()
2820 * non-scattered packet. in efx_ef10_handle_rx_event()
2822 if (!(nic_data->datapath_caps & in efx_ef10_handle_rx_event()
2824 rx_queue->scatter_n != 0 || rx_cont) { in efx_ef10_handle_rx_event()
2827 (rx_queue->removed_count + in efx_ef10_handle_rx_event()
2828 rx_queue->scatter_n + 1) & in efx_ef10_handle_rx_event()
2829 ((1 << ESF_DZ_RX_DSC_PTR_LBITS_WIDTH) - 1)); in efx_ef10_handle_rx_event()
2833 /* Merged completion for multiple non-scattered packets */ in efx_ef10_handle_rx_event()
2834 rx_queue->scatter_n = 1; in efx_ef10_handle_rx_event()
2835 rx_queue->scatter_len = 0; in efx_ef10_handle_rx_event()
2837 ++channel->n_rx_merge_events; in efx_ef10_handle_rx_event()
2838 channel->n_rx_merge_packets += n_packets; in efx_ef10_handle_rx_event()
2841 ++rx_queue->scatter_n; in efx_ef10_handle_rx_event()
2842 rx_queue->scatter_len += rx_bytes; in efx_ef10_handle_rx_event()
2875 netdev_WARN(efx->net_dev, in efx_ef10_handle_rx_event()
2885 channel->irq_mod_score += 2 * n_packets; in efx_ef10_handle_rx_event()
2890 rx_queue->removed_count & rx_queue->ptr_mask, in efx_ef10_handle_rx_event()
2891 rx_queue->scatter_n, rx_queue->scatter_len, in efx_ef10_handle_rx_event()
2893 rx_queue->removed_count += rx_queue->scatter_n; in efx_ef10_handle_rx_event()
2896 rx_queue->scatter_n = 0; in efx_ef10_handle_rx_event()
2897 rx_queue->scatter_len = 0; in efx_ef10_handle_rx_event()
2916 struct efx_nic *efx = channel->efx; in efx_ef10_handle_tx_event()
2923 if (unlikely(READ_ONCE(efx->reset_pending))) in efx_ef10_handle_tx_event()
2934 if (!tx_queue->timestamping) { in efx_ef10_handle_tx_event()
2937 efx_xmit_done(tx_queue, tx_ev_desc_ptr & tx_queue->ptr_mask); in efx_ef10_handle_tx_event()
2943 * - the normal completion event (may be omitted) in efx_ef10_handle_tx_event()
2944 * - the low part of the timestamp in efx_ef10_handle_tx_event()
2945 * - the high part of the timestamp in efx_ef10_handle_tx_event()
2967 /* Ignore this event - see above. */ in efx_ef10_handle_tx_event()
2972 tx_queue->completed_timestamp_minor = ts_part; in efx_ef10_handle_tx_event()
2977 tx_queue->completed_timestamp_major = ts_part; in efx_ef10_handle_tx_event()
2983 netif_err(efx, hw, efx->net_dev, in efx_ef10_handle_tx_event()
2986 channel->channel, tx_ev_type, in efx_ef10_handle_tx_event()
2995 struct efx_nic *efx = channel->efx; in efx_ef10_handle_driver_event()
3008 netif_err(efx, hw, efx->net_dev, in efx_ef10_handle_driver_event()
3011 channel->channel, subcode, in efx_ef10_handle_driver_event()
3020 struct efx_nic *efx = channel->efx; in efx_ef10_handle_driver_generated_event()
3027 channel->event_test_cpu = raw_smp_processor_id(); in efx_ef10_handle_driver_generated_event()
3034 efx_fast_push_rx_descriptors(&channel->rx_queue, true); in efx_ef10_handle_driver_generated_event()
3037 netif_err(efx, hw, efx->net_dev, in efx_ef10_handle_driver_generated_event()
3040 channel->channel, (unsigned) subcode, in efx_ef10_handle_driver_generated_event()
3047 struct efx_nic *efx = channel->efx; in efx_ef10_ev_process()
3056 read_ptr = channel->eventq_read_ptr; in efx_ef10_ev_process()
3071 netif_vdbg(efx, drv, efx->net_dev, in efx_ef10_ev_process()
3073 channel->channel, EFX_QWORD_VAL(event)); in efx_ef10_ev_process()
3083 * avoid going over-quota? in efx_ef10_ev_process()
3101 netif_err(efx, hw, efx->net_dev, in efx_ef10_ev_process()
3104 channel->channel, ev_code, in efx_ef10_ev_process()
3110 channel->eventq_read_ptr = read_ptr; in efx_ef10_ev_process()
3116 struct efx_nic *efx = channel->efx; in efx_ef10_ev_read_ack()
3128 (channel->eventq_read_ptr & in efx_ef10_ev_read_ack()
3129 channel->eventq_mask) >> in efx_ef10_ev_read_ack()
3132 channel->channel); in efx_ef10_ev_read_ack()
3136 channel->eventq_read_ptr & in efx_ef10_ev_read_ack()
3137 ((1 << ERF_DD_EVQ_IND_RPTR_WIDTH) - 1)); in efx_ef10_ev_read_ack()
3139 channel->channel); in efx_ef10_ev_read_ack()
3142 channel->eventq_read_ptr & in efx_ef10_ev_read_ack()
3143 channel->eventq_mask); in efx_ef10_ev_read_ack()
3144 efx_writed_page(efx, &rptr, ER_DZ_EVQ_RPTR, channel->channel); in efx_ef10_ev_read_ack()
3151 struct efx_nic *efx = channel->efx; in efx_ef10_ev_test_generate()
3159 MCDI_SET_DWORD(inbuf, DRIVER_EVENT_IN_EVQ, channel->channel); in efx_ef10_ev_test_generate()
3162 * already swapped the data to little-endian order. in efx_ef10_ev_test_generate()
3176 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); in efx_ef10_ev_test_generate()
3181 atomic_set(&efx->active_queues, 0); in efx_ef10_prepare_flr()
3186 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_vport_set_mac_address()
3190 /* Only reconfigure a PF-created vport */ in efx_ef10_vport_set_mac_address()
3191 if (is_zero_ether_addr(nic_data->vport_mac)) in efx_ef10_vport_set_mac_address()
3195 efx_net_stop(efx->net_dev); in efx_ef10_vport_set_mac_address()
3196 down_write(&efx->filter_sem); in efx_ef10_vport_set_mac_address()
3198 up_write(&efx->filter_sem); in efx_ef10_vport_set_mac_address()
3200 rc = efx_ef10_vadaptor_free(efx, efx->vport_id); in efx_ef10_vport_set_mac_address()
3204 ether_addr_copy(mac_old, nic_data->vport_mac); in efx_ef10_vport_set_mac_address()
3205 rc = efx_ef10_vport_del_mac(efx, efx->vport_id, in efx_ef10_vport_set_mac_address()
3206 nic_data->vport_mac); in efx_ef10_vport_set_mac_address()
3210 rc = efx_ef10_vport_add_mac(efx, efx->vport_id, in efx_ef10_vport_set_mac_address()
3211 efx->net_dev->dev_addr); in efx_ef10_vport_set_mac_address()
3213 ether_addr_copy(nic_data->vport_mac, efx->net_dev->dev_addr); in efx_ef10_vport_set_mac_address()
3215 rc2 = efx_ef10_vport_add_mac(efx, efx->vport_id, mac_old); in efx_ef10_vport_set_mac_address()
3218 eth_zero_addr(nic_data->vport_mac); in efx_ef10_vport_set_mac_address()
3224 rc2 = efx_ef10_vadaptor_alloc(efx, efx->vport_id); in efx_ef10_vport_set_mac_address()
3228 down_write(&efx->filter_sem); in efx_ef10_vport_set_mac_address()
3230 up_write(&efx->filter_sem); in efx_ef10_vport_set_mac_address()
3234 rc2 = efx_net_open(efx->net_dev); in efx_ef10_vport_set_mac_address()
3243 netif_err(efx, drv, efx->net_dev, in efx_ef10_vport_set_mac_address()
3244 "Failed to restore when changing MAC address - scheduling reset\n"); in efx_ef10_vport_set_mac_address()
3253 bool was_enabled = efx->port_enabled; in efx_ef10_set_mac_address()
3257 efx_net_stop(efx->net_dev); in efx_ef10_set_mac_address()
3259 mutex_lock(&efx->mac_lock); in efx_ef10_set_mac_address()
3260 down_write(&efx->filter_sem); in efx_ef10_set_mac_address()
3264 efx->net_dev->dev_addr); in efx_ef10_set_mac_address()
3266 efx->vport_id); in efx_ef10_set_mac_address()
3271 up_write(&efx->filter_sem); in efx_ef10_set_mac_address()
3272 mutex_unlock(&efx->mac_lock); in efx_ef10_set_mac_address()
3275 efx_net_open(efx->net_dev); in efx_ef10_set_mac_address()
3279 if (efx->pci_dev->is_virtfn && efx->pci_dev->physfn) { in efx_ef10_set_mac_address()
3280 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_set_mac_address()
3281 struct pci_dev *pci_dev_pf = efx->pci_dev->physfn; in efx_ef10_set_mac_address()
3283 if (rc == -EPERM) { in efx_ef10_set_mac_address()
3290 nic_data->vf_index, in efx_ef10_set_mac_address()
3291 efx->net_dev->dev_addr); in efx_ef10_set_mac_address()
3294 struct efx_ef10_nic_data *nic_data = efx_pf->nic_data; in efx_ef10_set_mac_address()
3300 for (i = 0; i < efx_pf->vf_count; ++i) { in efx_ef10_set_mac_address()
3301 struct ef10_vf *vf = nic_data->vf + i; in efx_ef10_set_mac_address()
3303 if (vf->efx == efx) { in efx_ef10_set_mac_address()
3304 ether_addr_copy(vf->mac, in efx_ef10_set_mac_address()
3305 efx->net_dev->dev_addr); in efx_ef10_set_mac_address()
3312 if (rc == -EPERM) { in efx_ef10_set_mac_address()
3313 netif_err(efx, drv, efx->net_dev, in efx_ef10_set_mac_address()
3315 " mac-spoofing on this interface\n"); in efx_ef10_set_mac_address()
3316 } else if (rc == -ENOSYS && !efx_ef10_is_vf(efx)) { in efx_ef10_set_mac_address()
3318 * fall-back to the method of changing the MAC address on the in efx_ef10_set_mac_address()
3333 WARN_ON(!mutex_is_locked(&efx->mac_lock)); in efx_ef10_mac_reconfigure()
3368 return -EIO; in efx_ef10_poll_bist()
3373 netif_dbg(efx, hw, efx->net_dev, "BIST passed.\n"); in efx_ef10_poll_bist()
3376 netif_err(efx, hw, efx->net_dev, "BIST timed out\n"); in efx_ef10_poll_bist()
3377 return -EIO; in efx_ef10_poll_bist()
3379 netif_err(efx, hw, efx->net_dev, "BIST failed.\n"); in efx_ef10_poll_bist()
3380 return -EIO; in efx_ef10_poll_bist()
3382 netif_err(efx, hw, efx->net_dev, in efx_ef10_poll_bist()
3384 return -EIO; in efx_ef10_poll_bist()
3392 netif_dbg(efx, drv, efx->net_dev, "starting BIST type %u\n", bist_type); in efx_ef10_run_bist()
3413 tests->memory = efx_ef10_run_bist(efx, MC_CMD_MC_MEM_BIST) ? -1 : 1; in efx_ef10_test_chip()
3414 tests->registers = efx_ef10_run_bist(efx, MC_CMD_REG_BIST) ? -1 : 1; in efx_ef10_test_chip()
3419 if (rc == -EPERM) in efx_ef10_test_chip()
3470 return -ENODEV; in efx_ef10_mtd_probe_partition()
3472 if ((type & ~info->type_mask) == info->type) in efx_ef10_mtd_probe_partition()
3475 if (info->port != efx_port_num(efx)) in efx_ef10_mtd_probe_partition()
3476 return -ENODEV; in efx_ef10_mtd_probe_partition()
3485 return -ENODEV; in efx_ef10_mtd_probe_partition()
3496 return -EEXIST; in efx_ef10_mtd_probe_partition()
3498 part->nvram_type = type; in efx_ef10_mtd_probe_partition()
3506 return -EIO; in efx_ef10_mtd_probe_partition()
3509 part->fw_subtype = MCDI_DWORD(outbuf, in efx_ef10_mtd_probe_partition()
3512 part->common.dev_type_name = "EF10 NVRAM manager"; in efx_ef10_mtd_probe_partition()
3513 part->common.type_name = info->name; in efx_ef10_mtd_probe_partition()
3515 part->common.mtd.type = MTD_NORFLASH; in efx_ef10_mtd_probe_partition()
3516 part->common.mtd.flags = MTD_CAP_NORFLASH; in efx_ef10_mtd_probe_partition()
3517 part->common.mtd.size = size; in efx_ef10_mtd_probe_partition()
3518 part->common.mtd.erasesize = erase_size; in efx_ef10_mtd_probe_partition()
3519 /* sfc_status is read-only */ in efx_ef10_mtd_probe_partition()
3521 part->common.mtd.flags |= MTD_NO_ERASE; in efx_ef10_mtd_probe_partition()
3543 return -EIO; in efx_ef10_mtd_probe()
3548 return -EIO; in efx_ef10_mtd_probe()
3552 return -ENOMEM; in efx_ef10_mtd_probe()
3560 if (rc == -EEXIST || rc == -ENODEV) in efx_ef10_mtd_probe()
3590 if (channel->sync_events_state == SYNC_EVENTS_REQUESTED || in efx_ef10_rx_enable_timestamping()
3591 channel->sync_events_state == SYNC_EVENTS_VALID || in efx_ef10_rx_enable_timestamping()
3592 (temp && channel->sync_events_state == SYNC_EVENTS_DISABLED)) in efx_ef10_rx_enable_timestamping()
3594 channel->sync_events_state = SYNC_EVENTS_REQUESTED; in efx_ef10_rx_enable_timestamping()
3599 channel->channel); in efx_ef10_rx_enable_timestamping()
3601 rc = efx_mcdi_rpc(channel->efx, MC_CMD_PTP, in efx_ef10_rx_enable_timestamping()
3605 channel->sync_events_state = temp ? SYNC_EVENTS_QUIESCENT : in efx_ef10_rx_enable_timestamping()
3617 if (channel->sync_events_state == SYNC_EVENTS_DISABLED || in efx_ef10_rx_disable_timestamping()
3618 (temp && channel->sync_events_state == SYNC_EVENTS_QUIESCENT)) in efx_ef10_rx_disable_timestamping()
3620 if (channel->sync_events_state == SYNC_EVENTS_QUIESCENT) { in efx_ef10_rx_disable_timestamping()
3621 channel->sync_events_state = SYNC_EVENTS_DISABLED; in efx_ef10_rx_disable_timestamping()
3624 channel->sync_events_state = temp ? SYNC_EVENTS_QUIESCENT : in efx_ef10_rx_disable_timestamping()
3632 channel->channel); in efx_ef10_rx_disable_timestamping()
3634 rc = efx_mcdi_rpc(channel->efx, MC_CMD_PTP, in efx_ef10_rx_disable_timestamping()
3665 return -EOPNOTSUPP; in efx_ef10_ptp_set_ts_config_vf()
3673 switch (init->rx_filter) { in efx_ef10_ptp_set_ts_config()
3678 init->tx_type != HWTSTAMP_TX_OFF, 0); in efx_ef10_ptp_set_ts_config()
3693 init->rx_filter = HWTSTAMP_FILTER_ALL; in efx_ef10_ptp_set_ts_config()
3701 return -ERANGE; in efx_ef10_ptp_set_ts_config()
3708 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_get_phys_port_id()
3710 if (!is_valid_ether_addr(nic_data->port_id)) in efx_ef10_get_phys_port_id()
3711 return -EOPNOTSUPP; in efx_ef10_get_phys_port_id()
3713 ppid->id_len = ETH_ALEN; in efx_ef10_get_phys_port_id()
3714 memcpy(ppid->id, nic_data->port_id, ppid->id_len); in efx_ef10_get_phys_port_id()
3722 return -EINVAL; in efx_ef10_vlan_rx_add_vid()
3730 return -EINVAL; in efx_ef10_vlan_rx_kill_vid()
3736 * ports table, ensuring that any TSO descriptors that were made on a now-
3742 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_set_udp_tnl_ports()
3752 WARN_ON(!mutex_is_locked(&nic_data->udp_tunnels_lock)); in efx_ef10_set_udp_tnl_ports()
3754 nic_data->udp_tunnels_dirty = false; in efx_ef10_set_udp_tnl_ports()
3756 if (!(nic_data->datapath_caps & in efx_ef10_set_udp_tnl_ports()
3762 BUILD_BUG_ON(ARRAY_SIZE(nic_data->udp_tunnels) > in efx_ef10_set_udp_tnl_ports()
3765 for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i) { in efx_ef10_set_udp_tnl_ports()
3766 if (nic_data->udp_tunnels[i].type != in efx_ef10_set_udp_tnl_ports()
3772 ntohs(nic_data->udp_tunnels[i].port), in efx_ef10_set_udp_tnl_ports()
3774 nic_data->udp_tunnels[i].type); in efx_ef10_set_udp_tnl_ports()
3781 BUILD_BUG_ON((MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_NUM_ENTRIES_OFST - in efx_ef10_set_udp_tnl_ports()
3797 if (rc == -EIO) { in efx_ef10_set_udp_tnl_ports()
3802 nic_data->udp_tunnels_dirty = true; in efx_ef10_set_udp_tnl_ports()
3808 if (rc != -EPERM) in efx_ef10_set_udp_tnl_ports()
3809 netif_warn(efx, drv, efx->net_dev, in efx_ef10_set_udp_tnl_ports()
3813 netif_info(efx, drv, efx->net_dev, in efx_ef10_set_udp_tnl_ports()
3827 * trigger a re-attach. Since there won't be an MC reset, we in efx_ef10_set_udp_tnl_ports()
3838 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_udp_tnl_push_ports()
3841 mutex_lock(&nic_data->udp_tunnels_lock); in efx_ef10_udp_tnl_push_ports()
3842 if (nic_data->udp_tunnels_dirty) { in efx_ef10_udp_tnl_push_ports()
3849 mutex_unlock(&nic_data->udp_tunnels_lock); in efx_ef10_udp_tnl_push_ports()
3861 if (ti->type == UDP_TUNNEL_TYPE_VXLAN) in efx_ef10_udp_tnl_set_port()
3866 nic_data = efx->nic_data; in efx_ef10_udp_tnl_set_port()
3867 if (!(nic_data->datapath_caps & in efx_ef10_udp_tnl_set_port()
3869 return -EOPNOTSUPP; in efx_ef10_udp_tnl_set_port()
3871 mutex_lock(&nic_data->udp_tunnels_lock); in efx_ef10_udp_tnl_set_port()
3876 nic_data->udp_tunnels[entry].type = efx_tunnel_type; in efx_ef10_udp_tnl_set_port()
3877 nic_data->udp_tunnels[entry].port = ti->port; in efx_ef10_udp_tnl_set_port()
3879 mutex_unlock(&nic_data->udp_tunnels_lock); in efx_ef10_udp_tnl_set_port()
3884 /* Called under the TX lock with the TX queue running, hence no-one can be
3891 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_udp_tnl_has_port()
3894 if (!(nic_data->datapath_caps & in efx_ef10_udp_tnl_has_port()
3898 if (nic_data->udp_tunnels_dirty) in efx_ef10_udp_tnl_has_port()
3904 for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i) in efx_ef10_udp_tnl_has_port()
3905 if (nic_data->udp_tunnels[i].type != in efx_ef10_udp_tnl_has_port()
3907 nic_data->udp_tunnels[i].port == port) in efx_ef10_udp_tnl_has_port()
3921 nic_data = efx->nic_data; in efx_ef10_udp_tnl_unset_port()
3923 mutex_lock(&nic_data->udp_tunnels_lock); in efx_ef10_udp_tnl_unset_port()
3928 nic_data->udp_tunnels[entry].type = TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID; in efx_ef10_udp_tnl_unset_port()
3929 nic_data->udp_tunnels[entry].port = 0; in efx_ef10_udp_tnl_unset_port()
3931 mutex_unlock(&nic_data->udp_tunnels_lock); in efx_ef10_udp_tnl_unset_port()
3955 struct efx_ef10_nic_data *nic_data = efx->nic_data; in efx_ef10_print_additional_fwver()
3958 nic_data->rx_dpcpu_fw_id, in efx_ef10_print_additional_fwver()
3959 nic_data->tx_dpcpu_fw_id); in efx_ef10_print_additional_fwver()
3966 const struct efx_ef10_nic_data *nic_data = efx->nic_data; in ef10_check_caps()
3970 return nic_data->datapath_caps & BIT_ULL(flag); in ef10_check_caps()
3972 return nic_data->datapath_caps2 & BIT_ULL(flag); in ef10_check_caps()