Lines Matching +full:data +full:- +full:addr
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
27 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
28 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
29 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
30 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
31 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
32 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
33 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
34 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
35 0x1e00, /* win 10: addr=0x1e00000, size=4096 bytes */
36 0x1e01, /* win 11: addr=0x1e01000, size=4096 bytes */
37 0x1e80, /* win 12: addr=0x1e80000, size=4096 bytes */
38 0x1f00, /* win 13: addr=0x1f00000, size=4096 bytes */
39 0x1c08, /* win 14: addr=0x1c08000, size=4096 bytes */
121 cdev->iro_arr = iro_arr; in qed_init_iro_array()
126 p_hwfn->rt_data.init_val[rt_offset] = val; in qed_init_store_rt_reg()
127 p_hwfn->rt_data.b_valid[rt_offset] = true; in qed_init_store_rt_reg()
136 p_hwfn->rt_data.init_val[rt_offset + i] = p_val[i]; in qed_init_store_rt_agg()
137 p_hwfn->rt_data.b_valid[rt_offset + i] = true; in qed_init_store_rt_agg()
143 u32 addr, u16 rt_offset, u16 size, bool b_must_dmae) in qed_init_rt() argument
145 u32 *p_init_val = &p_hwfn->rt_data.init_val[rt_offset]; in qed_init_rt()
146 bool *p_valid = &p_hwfn->rt_data.b_valid[rt_offset]; in qed_init_rt()
157 /* In case there isn't any wide-bus configuration here, in qed_init_rt()
158 * simply write the data instead of using dmae. in qed_init_rt()
161 qed_wr(p_hwfn, p_ptt, addr + (i << 2), p_init_val[i]); in qed_init_rt()
173 addr + (i << 2), segment, NULL); in qed_init_rt()
190 struct qed_rt_data *rt_data = &p_hwfn->rt_data; in qed_init_alloc()
192 if (IS_VF(p_hwfn->cdev)) in qed_init_alloc()
195 rt_data->b_valid = kcalloc(RUNTIME_ARRAY_SIZE, sizeof(bool), in qed_init_alloc()
197 if (!rt_data->b_valid) in qed_init_alloc()
198 return -ENOMEM; in qed_init_alloc()
200 rt_data->init_val = kcalloc(RUNTIME_ARRAY_SIZE, sizeof(u32), in qed_init_alloc()
202 if (!rt_data->init_val) { in qed_init_alloc()
203 kfree(rt_data->b_valid); in qed_init_alloc()
204 rt_data->b_valid = NULL; in qed_init_alloc()
205 return -ENOMEM; in qed_init_alloc()
213 kfree(p_hwfn->rt_data.init_val); in qed_init_free()
214 p_hwfn->rt_data.init_val = NULL; in qed_init_free()
215 kfree(p_hwfn->rt_data.b_valid); in qed_init_free()
216 p_hwfn->rt_data.b_valid = NULL; in qed_init_free()
221 u32 addr, in qed_init_array_dmae() argument
230 /* Perform DMAE only for lengthy enough sections or for wide-bus */ in qed_init_array_dmae()
232 const u32 *data = buf + dmae_data_offset; in qed_init_array_dmae() local
236 qed_wr(p_hwfn, p_ptt, addr + (i << 2), data[i]); in qed_init_array_dmae()
240 addr, size, NULL); in qed_init_array_dmae()
248 u32 addr, u32 fill, u32 fill_count) in qed_init_fill_dmae() argument
257 * 2. addr, in qed_init_fill_dmae()
258 * 3. p_hwfb->temp_data, in qed_init_fill_dmae()
264 addr, fill_count, ¶ms); in qed_init_fill_dmae()
269 u32 addr, u32 fill, u32 fill_count) in qed_init_fill() argument
273 for (i = 0; i < fill_count; i++, addr += sizeof(u32)) in qed_init_fill()
274 qed_wr(p_hwfn, p_ptt, addr, fill); in qed_init_fill()
282 u32 dmae_array_offset = le32_to_cpu(cmd->args.array_offset); in qed_init_cmd_array()
283 u32 data = le32_to_cpu(cmd->data); in qed_init_cmd_array() local
284 u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; in qed_init_cmd_array() local
287 struct qed_dev *cdev = p_hwfn->cdev; in qed_init_cmd_array()
293 array_data = cdev->fw_data->arr_data; in qed_init_cmd_array()
296 data = le32_to_cpu(hdr->raw.data); in qed_init_cmd_array()
297 switch (GET_FIELD(data, INIT_ARRAY_RAW_HDR_TYPE)) { in qed_init_cmd_array()
300 input_len = GET_FIELD(data, in qed_init_cmd_array()
303 memset(p_hwfn->unzip_buf, 0, max_size); in qed_init_cmd_array()
307 max_size, (u8 *)p_hwfn->unzip_buf); in qed_init_cmd_array()
309 rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 0, in qed_init_cmd_array()
311 p_hwfn->unzip_buf, in qed_init_cmd_array()
314 DP_NOTICE(p_hwfn, "Failed to unzip dmae data\n"); in qed_init_cmd_array()
315 rc = -EINVAL; in qed_init_cmd_array()
320 u32 repeats = GET_FIELD(data, in qed_init_cmd_array()
324 size = GET_FIELD(data, INIT_ARRAY_PATTERN_HDR_PATTERN_SIZE); in qed_init_cmd_array()
326 for (i = 0; i < repeats; i++, addr += size << 2) { in qed_init_cmd_array()
327 rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, in qed_init_cmd_array()
337 size = GET_FIELD(data, INIT_ARRAY_STANDARD_HDR_SIZE); in qed_init_cmd_array()
338 rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, in qed_init_cmd_array()
353 u32 data = le32_to_cpu(p_cmd->data); in qed_init_cmd_wr() local
354 bool b_must_dmae = GET_FIELD(data, INIT_WRITE_OP_WIDE_BUS); in qed_init_cmd_wr()
355 u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; in qed_init_cmd_wr() local
356 union init_write_args *arg = &p_cmd->args; in qed_init_cmd_wr()
362 "Need to write to %08x for Wide-bus but DMAE isn't allowed\n", in qed_init_cmd_wr()
363 addr); in qed_init_cmd_wr()
364 return -EINVAL; in qed_init_cmd_wr()
367 switch (GET_FIELD(data, INIT_WRITE_OP_SOURCE)) { in qed_init_cmd_wr()
369 data = le32_to_cpu(p_cmd->args.inline_val); in qed_init_cmd_wr()
370 qed_wr(p_hwfn, p_ptt, addr, data); in qed_init_cmd_wr()
373 data = le32_to_cpu(p_cmd->args.zeros_count); in qed_init_cmd_wr()
374 if (b_must_dmae || (b_can_dmae && (data >= 64))) in qed_init_cmd_wr()
375 rc = qed_init_fill_dmae(p_hwfn, p_ptt, addr, 0, data); in qed_init_cmd_wr()
377 qed_init_fill(p_hwfn, p_ptt, addr, 0, data); in qed_init_cmd_wr()
384 qed_init_rt(p_hwfn, p_ptt, addr, in qed_init_cmd_wr()
385 le16_to_cpu(arg->runtime.offset), in qed_init_cmd_wr()
386 le16_to_cpu(arg->runtime.size), in qed_init_cmd_wr()
415 u32 data, addr, poll; in qed_init_cmd_rd() local
418 data = le32_to_cpu(cmd->op_data); in qed_init_cmd_rd()
419 addr = GET_FIELD(data, INIT_READ_OP_ADDRESS) << 2; in qed_init_cmd_rd()
420 poll = GET_FIELD(data, INIT_READ_OP_POLL_TYPE); in qed_init_cmd_rd()
423 val = qed_rd(p_hwfn, p_ptt, addr); in qed_init_cmd_rd()
440 cmd->op_data); in qed_init_cmd_rd()
444 data = le32_to_cpu(cmd->expected_val); in qed_init_cmd_rd()
446 i < QED_INIT_MAX_POLL_COUNT && !comp_check(val, data); in qed_init_cmd_rd()
449 val = qed_rd(p_hwfn, p_ptt, addr); in qed_init_cmd_rd()
454 "Timeout when polling reg: 0x%08x [ Waiting-for: %08x Got: %08x (comparison %08x)]\n", in qed_init_cmd_rd()
455 addr, le32_to_cpu(cmd->expected_val), in qed_init_cmd_rd()
456 val, le32_to_cpu(cmd->op_data)); in qed_init_cmd_rd()
467 switch (p_cmd->callback_id) { in qed_init_cmd_cb()
473 p_cmd->callback_id); in qed_init_cmd_cb()
474 return -EINVAL; in qed_init_cmd_cb()
483 struct qed_dev *cdev = p_hwfn->cdev; in qed_init_cmd_mode_match()
487 modes_tree_buf = cdev->fw_data->modes_tree_buf; in qed_init_cmd_mode_match()
501 tree_val -= MAX_INIT_MODE_OPS; in qed_init_cmd_mode_match()
509 u16 offset = le16_to_cpu(p_cmd->modes_buf_offset); in qed_init_cmd_mode()
514 return GET_FIELD(le32_to_cpu(p_cmd->op_data), in qed_init_cmd_mode()
522 u32 data = le32_to_cpu(p_cmd->phase_data); in qed_init_cmd_phase() local
523 u32 op_data = le32_to_cpu(p_cmd->op_data); in qed_init_cmd_phase()
525 if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase && in qed_init_cmd_phase()
526 (GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == ANY_PHASE_ID || in qed_init_cmd_phase()
527 GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == phase_id))) in qed_init_cmd_phase()
537 struct qed_dev *cdev = p_hwfn->cdev; in qed_init_run()
542 num_init_ops = cdev->fw_data->init_ops_size; in qed_init_run()
543 init_ops = cdev->fw_data->init_ops; in qed_init_run()
545 p_hwfn->unzip_buf = kzalloc(MAX_ZIPPED_SIZE * 4, GFP_ATOMIC); in qed_init_run()
546 if (!p_hwfn->unzip_buf) in qed_init_run()
547 return -ENOMEM; in qed_init_run()
551 u32 data = le32_to_cpu(cmd->raw.op_data); in qed_init_run() local
553 switch (GET_FIELD(data, INIT_CALLBACK_OP_OP)) { in qed_init_run()
555 rc = qed_init_cmd_wr(p_hwfn, p_ptt, &cmd->write, in qed_init_run()
559 qed_init_cmd_rd(p_hwfn, p_ptt, &cmd->read); in qed_init_run()
562 cmd_num += qed_init_cmd_mode(p_hwfn, &cmd->if_mode, in qed_init_run()
566 cmd_num += qed_init_cmd_phase(p_hwfn, &cmd->if_phase, in qed_init_run()
571 * sleep-able context in qed_init_run()
573 udelay(le32_to_cpu(cmd->delay.delay)); in qed_init_run()
577 rc = qed_init_cmd_cb(p_hwfn, p_ptt, &cmd->callback); in qed_init_run()
579 cmd->callback.callback_id == DMAE_READY_CB) in qed_init_run()
588 kfree(p_hwfn->unzip_buf); in qed_init_run()
589 p_hwfn->unzip_buf = NULL; in qed_init_run()
607 int qed_init_fw_data(struct qed_dev *cdev, const u8 *data) in qed_init_fw_data() argument
609 struct qed_fw_data *fw = cdev->fw_data; in qed_init_fw_data()
613 if (!data) { in qed_init_fw_data()
614 DP_NOTICE(cdev, "Invalid fw data\n"); in qed_init_fw_data()
615 return -EINVAL; in qed_init_fw_data()
619 buf_hdr = (struct bin_buffer_hdr *)data; in qed_init_fw_data()
622 fw->fw_ver_info = (struct fw_ver_info *)(data + offset); in qed_init_fw_data()
625 fw->init_ops = (union init_op *)(data + offset); in qed_init_fw_data()
628 fw->arr_data = (u32 *)(data + offset); in qed_init_fw_data()
631 fw->modes_tree_buf = (u8 *)(data + offset); in qed_init_fw_data()
633 fw->init_ops_size = len / sizeof(struct init_raw_op); in qed_init_fw_data()
636 fw->fw_overlays = (u32 *)(data + offset); in qed_init_fw_data()
638 fw->fw_overlays_len = len; in qed_init_fw_data()