Lines Matching +full:core +full:- +full:module

1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2016-2018 Mellanox Technologies. All rights reserved */
5 #include <linux/module.h>
17 #include "core.h"
31 struct mlxsw_core *core; member
40 u8 module; member
52 * 0 - Ethernet control (e.g. EMADs, LACP)
53 * 1 - Ethernet data
84 * 0 - Data packets
85 * 6 - Control packets
102 mlxsw_tx_v1_hdr_port_mid_set(txhdr, tx_info->local_port); in mlxsw_sib_tx_v1_hdr_construct()
111 err = mlxsw_reg_query(mlxsw_sib->core, MLXSW_REG(spad), spad_pl); in mlxsw_sib_hw_id_get()
114 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sib->hw_id); in mlxsw_sib_hw_id_get()
122 struct mlxsw_sib *mlxsw_sib = mlxsw_sib_port->mlxsw_sib; in mlxsw_sib_port_admin_status_set()
125 mlxsw_reg_paos_pack(paos_pl, mlxsw_sib_port->local_port, in mlxsw_sib_port_admin_status_set()
128 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(paos), paos_pl); in mlxsw_sib_port_admin_status_set()
134 struct mlxsw_sib *mlxsw_sib = mlxsw_sib_port->mlxsw_sib; in mlxsw_sib_port_mtu_set()
139 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sib_port->local_port, 0); in mlxsw_sib_port_mtu_set()
140 err = mlxsw_reg_query(mlxsw_sib->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sib_port_mtu_set()
146 return -EINVAL; in mlxsw_sib_port_mtu_set()
148 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sib_port->local_port, mtu); in mlxsw_sib_port_mtu_set()
149 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sib_port_mtu_set()
154 struct mlxsw_sib *mlxsw_sib = mlxsw_sib_port->mlxsw_sib; in mlxsw_sib_port_set()
158 mlxsw_reg_plib_local_port_set(plib_pl, mlxsw_sib_port->local_port); in mlxsw_sib_port_set()
160 err = mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(plib), plib_pl); in mlxsw_sib_port_set()
167 struct mlxsw_sib *mlxsw_sib = mlxsw_sib_port->mlxsw_sib; in mlxsw_sib_port_swid_set()
170 mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sib_port->local_port); in mlxsw_sib_port_swid_set()
171 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sib_port_swid_set()
182 err = mlxsw_reg_query(mlxsw_sib->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sib_port_module_info_get()
193 struct mlxsw_sib *mlxsw_sib = mlxsw_sib_port->mlxsw_sib; in mlxsw_sib_port_speed_set()
196 mlxsw_reg_ptys_ib_pack(ptys_pl, mlxsw_sib_port->local_port, speed, in mlxsw_sib_port_speed_set()
198 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sib_port_speed_set()
203 return mlxsw_sib->ports[local_port] != NULL; in mlxsw_sib_port_created()
207 u8 module, u8 width) in __mlxsw_sib_port_create() argument
214 return -ENOMEM; in __mlxsw_sib_port_create()
215 mlxsw_sib_port->mlxsw_sib = mlxsw_sib; in __mlxsw_sib_port_create()
216 mlxsw_sib_port->local_port = local_port; in __mlxsw_sib_port_create()
217 mlxsw_sib_port->mapping.module = module; in __mlxsw_sib_port_create()
221 dev_err(mlxsw_sib->bus_info->dev, "Port %d: Failed to set SWID\n", in __mlxsw_sib_port_create()
222 mlxsw_sib_port->local_port); in __mlxsw_sib_port_create()
227 err = mlxsw_sib_port_set(mlxsw_sib_port, module + 1); in __mlxsw_sib_port_create()
229 dev_err(mlxsw_sib->bus_info->dev, "Port %d: Failed to set IB port\n", in __mlxsw_sib_port_create()
230 mlxsw_sib_port->local_port); in __mlxsw_sib_port_create()
238 MLXSW_REG_PTYS_IB_SPEED_EDR - 1, in __mlxsw_sib_port_create()
239 BIT(3) - 1); in __mlxsw_sib_port_create()
241 dev_err(mlxsw_sib->bus_info->dev, "Port %d: Failed to set speed\n", in __mlxsw_sib_port_create()
242 mlxsw_sib_port->local_port); in __mlxsw_sib_port_create()
251 dev_err(mlxsw_sib->bus_info->dev, "Port %d: Failed to set MTU\n", in __mlxsw_sib_port_create()
252 mlxsw_sib_port->local_port); in __mlxsw_sib_port_create()
258 dev_err(mlxsw_sib->bus_info->dev, "Port %d: Failed to change admin state to UP\n", in __mlxsw_sib_port_create()
259 mlxsw_sib_port->local_port); in __mlxsw_sib_port_create()
263 mlxsw_core_port_ib_set(mlxsw_sib->core, mlxsw_sib_port->local_port, in __mlxsw_sib_port_create()
265 mlxsw_sib->ports[local_port] = mlxsw_sib_port; in __mlxsw_sib_port_create()
279 u8 module, u8 width) in mlxsw_sib_port_create() argument
283 err = mlxsw_core_port_init(mlxsw_sib->core, local_port, in mlxsw_sib_port_create()
284 module + 1, false, 0, false, 0, in mlxsw_sib_port_create()
285 mlxsw_sib->hw_id, sizeof(mlxsw_sib->hw_id)); in mlxsw_sib_port_create()
287 dev_err(mlxsw_sib->bus_info->dev, "Port %d: Failed to init core port\n", in mlxsw_sib_port_create()
291 err = __mlxsw_sib_port_create(mlxsw_sib, local_port, module, width); in mlxsw_sib_port_create()
298 mlxsw_core_port_fini(mlxsw_sib->core, local_port); in mlxsw_sib_port_create()
304 struct mlxsw_sib_port *mlxsw_sib_port = mlxsw_sib->ports[local_port]; in __mlxsw_sib_port_remove()
306 mlxsw_core_port_clear(mlxsw_sib->core, local_port, mlxsw_sib); in __mlxsw_sib_port_remove()
307 mlxsw_sib->ports[local_port] = NULL; in __mlxsw_sib_port_remove()
316 mlxsw_core_port_fini(mlxsw_sib->core, local_port); in mlxsw_sib_port_remove()
326 kfree(mlxsw_sib->ports); in mlxsw_sib_ports_remove()
332 u8 module, width; in mlxsw_sib_ports_create() local
337 mlxsw_sib->ports = kzalloc(alloc_size, GFP_KERNEL); in mlxsw_sib_ports_create()
338 if (!mlxsw_sib->ports) in mlxsw_sib_ports_create()
339 return -ENOMEM; in mlxsw_sib_ports_create()
342 err = mlxsw_sib_port_module_info_get(mlxsw_sib, i, &module, in mlxsw_sib_ports_create()
348 err = mlxsw_sib_port_create(mlxsw_sib, i, module, width); in mlxsw_sib_ports_create()
356 for (i--; i >= 1; i--) in mlxsw_sib_ports_create()
359 kfree(mlxsw_sib->ports); in mlxsw_sib_ports_create()
368 pr_info("ib link for port %d - up\n", in mlxsw_sib_pude_ib_event_func()
369 mlxsw_sib_port->mapping.module + 1); in mlxsw_sib_pude_ib_event_func()
371 pr_info("ib link for port %d - down\n", in mlxsw_sib_pude_ib_event_func()
372 mlxsw_sib_port->mapping.module + 1); in mlxsw_sib_pude_ib_event_func()
384 mlxsw_sib_port = mlxsw_sib->ports[local_port]; in mlxsw_sib_pude_event_func()
386 dev_warn(mlxsw_sib->bus_info->dev, "Port %d: Link event received for non-existent port\n", in mlxsw_sib_pude_event_func()
405 err = mlxsw_core_trap_register(mlxsw_sib->core, in mlxsw_sib_taps_init()
415 for (i--; i >= 0; i--) { in mlxsw_sib_taps_init()
416 mlxsw_core_trap_unregister(mlxsw_sib->core, in mlxsw_sib_taps_init()
429 mlxsw_core_trap_unregister(mlxsw_sib->core, in mlxsw_sib_traps_fini()
455 mlxsw_sib->core = mlxsw_core; in mlxsw_sib_init()
456 mlxsw_sib->bus_info = mlxsw_bus_info; in mlxsw_sib_init()
460 dev_err(mlxsw_sib->bus_info->dev, "Failed to get switch HW ID\n"); in mlxsw_sib_init()
466 dev_err(mlxsw_sib->bus_info->dev, "Failed to create ports\n"); in mlxsw_sib_init()
472 dev_err(mlxsw_sib->bus_info->dev, "Failed to set traps\n"); in mlxsw_sib_init()
592 MODULE_DESCRIPTION("Mellanox SwitchIB and SwitchIB-2 driver");