Lines Matching full:hw
12 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
13 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
14 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
15 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
16 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
17 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
18 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
19 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
20 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
21 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
22 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
23 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
25 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
26 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw);
30 * @hw: pointer to the hardware structure
35 static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) in ixgbe_out_i2c_byte_ack() argument
39 status = ixgbe_clock_out_i2c_byte(hw, byte); in ixgbe_out_i2c_byte_ack()
42 return ixgbe_get_i2c_ack(hw); in ixgbe_out_i2c_byte_ack()
47 * @hw: pointer to the hardware structure
52 static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) in ixgbe_in_i2c_byte_ack() argument
56 status = ixgbe_clock_in_i2c_byte(hw, byte); in ixgbe_in_i2c_byte_ack()
60 return ixgbe_clock_out_i2c_bit(hw, false); in ixgbe_in_i2c_byte_ack()
80 * @hw: pointer to the hardware structure
88 s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic_int() argument
91 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
104 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
106 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
108 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_read_i2c_combined_generic_int()
111 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_read_i2c_combined_generic_int()
114 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_read_i2c_combined_generic_int()
117 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_read_i2c_combined_generic_int()
120 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
122 if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) in ixgbe_read_i2c_combined_generic_int()
125 if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) in ixgbe_read_i2c_combined_generic_int()
128 if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) in ixgbe_read_i2c_combined_generic_int()
131 if (ixgbe_clock_in_i2c_byte(hw, &csum_byte)) in ixgbe_read_i2c_combined_generic_int()
134 if (ixgbe_clock_out_i2c_bit(hw, false)) in ixgbe_read_i2c_combined_generic_int()
136 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_combined_generic_int()
138 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
143 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_combined_generic_int()
145 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
148 hw_dbg(hw, "I2C byte read combined error - Retry.\n"); in ixgbe_read_i2c_combined_generic_int()
150 hw_dbg(hw, "I2C byte read combined error.\n"); in ixgbe_read_i2c_combined_generic_int()
158 * @hw: pointer to the hardware structure
166 s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_write_i2c_combined_generic_int() argument
169 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
181 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_combined_generic_int()
183 ixgbe_i2c_start(hw); in ixgbe_write_i2c_combined_generic_int()
185 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_write_i2c_combined_generic_int()
188 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_write_i2c_combined_generic_int()
191 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
194 if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) in ixgbe_write_i2c_combined_generic_int()
197 if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
200 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_write_i2c_combined_generic_int()
202 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_combined_generic_int()
204 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
208 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_combined_generic_int()
210 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
213 hw_dbg(hw, "I2C byte write combined error - Retry.\n"); in ixgbe_write_i2c_combined_generic_int()
215 hw_dbg(hw, "I2C byte write combined error.\n"); in ixgbe_write_i2c_combined_generic_int()
223 * @hw: pointer to hardware structure
228 static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr) in ixgbe_probe_phy() argument
232 hw->phy.mdio.prtad = phy_addr; in ixgbe_probe_phy()
233 if (mdio45_probe(&hw->phy.mdio, phy_addr) != 0) in ixgbe_probe_phy()
236 if (ixgbe_get_phy_id(hw)) in ixgbe_probe_phy()
239 hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_probe_phy()
241 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_probe_phy()
242 hw->phy.ops.read_reg(hw, in ixgbe_probe_phy()
249 hw->phy.type = ixgbe_phy_cu_unknown; in ixgbe_probe_phy()
251 hw->phy.type = ixgbe_phy_generic; in ixgbe_probe_phy()
259 * @hw: pointer to hardware structure
263 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) in ixgbe_identify_phy_generic() argument
268 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
269 if (hw->bus.lan_id) in ixgbe_identify_phy_generic()
270 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
272 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
275 if (hw->phy.type != ixgbe_phy_unknown) in ixgbe_identify_phy_generic()
278 if (hw->phy.nw_mng_if_sel) { in ixgbe_identify_phy_generic()
279 phy_addr = (hw->phy.nw_mng_if_sel & in ixgbe_identify_phy_generic()
282 if (ixgbe_probe_phy(hw, phy_addr)) in ixgbe_identify_phy_generic()
289 if (ixgbe_probe_phy(hw, phy_addr)) { in ixgbe_identify_phy_generic()
300 hw->phy.mdio.prtad = MDIO_PRTAD_NONE; in ixgbe_identify_phy_generic()
307 * @hw: pointer to the hardware structure
314 bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw) in ixgbe_check_reset_blocked() argument
319 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
322 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
324 hw_dbg(hw, "MNG_VETO bit detected.\n"); in ixgbe_check_reset_blocked()
333 * @hw: pointer to hardware structure
336 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) in ixgbe_get_phy_id() argument
342 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
346 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
347 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
349 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
350 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
393 * @hw: pointer to hardware structure
395 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) in ixgbe_reset_phy_generic() argument
401 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
402 status = ixgbe_identify_phy_generic(hw); in ixgbe_reset_phy_generic()
404 if (status != 0 || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
408 if (!hw->phy.reset_if_overtemp && in ixgbe_reset_phy_generic()
409 (IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw))) in ixgbe_reset_phy_generic()
413 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_generic()
420 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
431 if (hw->phy.type == ixgbe_phy_x550em_ext_t) { in ixgbe_reset_phy_generic()
432 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
443 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
456 hw_dbg(hw, "PHY reset polling failed to complete.\n"); in ixgbe_reset_phy_generic()
466 * @hw: pointer to hardware structure
471 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
479 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
482 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
491 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
498 hw_dbg(hw, "PHY address command did not complete.\n"); in ixgbe_read_phy_reg_mdi()
507 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
510 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
519 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
525 hw_dbg(hw, "PHY read command didn't complete\n"); in ixgbe_read_phy_reg_mdi()
532 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
542 * @hw: pointer to hardware structure
547 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
551 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
553 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_read_phy_reg_generic()
554 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_read_phy_reg_generic()
556 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
567 * @hw: pointer to hardware structure
572 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
578 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
583 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
586 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
596 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
602 hw_dbg(hw, "PHY address cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
612 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
615 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
624 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
630 hw_dbg(hw, "PHY write cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
640 * @hw: pointer to hardware structure
645 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
649 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_write_phy_reg_generic()
651 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_write_phy_reg_generic()
652 status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
654 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
662 #define IXGBE_HW_READ_REG(addr) IXGBE_READ_REG(hw, addr)
666 * @hw: pointer to hardware structure
669 static s32 ixgbe_msca_cmd(struct ixgbe_hw *hw, u32 cmd) in ixgbe_msca_cmd() argument
671 IXGBE_WRITE_REG(hw, IXGBE_MSCA, cmd); in ixgbe_msca_cmd()
680 * @hw: pointer to hardware structure
685 static s32 ixgbe_mii_bus_read_generic(struct ixgbe_hw *hw, int addr, in ixgbe_mii_bus_read_generic() argument
691 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_read_generic()
704 data = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_read_generic()
715 data = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_read_generic()
720 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_mii_bus_read_generic()
724 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_read_generic()
730 * @hw: pointer to hardware structure
736 static s32 ixgbe_mii_bus_write_generic(struct ixgbe_hw *hw, int addr, in ixgbe_mii_bus_write_generic() argument
742 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_write_generic()
745 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)val); in ixgbe_mii_bus_write_generic()
760 err = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_write_generic()
765 err = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_write_generic()
768 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_write_generic()
781 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_read() local
782 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_read()
784 return ixgbe_mii_bus_read_generic(hw, addr, regnum, gssr); in ixgbe_mii_bus_read()
798 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_write() local
799 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_write()
801 return ixgbe_mii_bus_write_generic(hw, addr, regnum, val, gssr); in ixgbe_mii_bus_write()
814 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_read() local
815 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_read()
818 return ixgbe_mii_bus_read_generic(hw, addr, regnum, gssr); in ixgbe_x550em_a_mii_bus_read()
832 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_write() local
833 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_write()
836 return ixgbe_mii_bus_write_generic(hw, addr, regnum, val, gssr); in ixgbe_x550em_a_mii_bus_write()
862 * @hw: pointer to hardware structure
864 * Returns true if hw points to lowest numbered PCI B:D.F x550_em_a device in
868 static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw) in ixgbe_x550em_a_has_mii() argument
870 struct ixgbe_adapter *adapter = hw->back; in ixgbe_x550em_a_has_mii()
896 * @hw: pointer to hardware structure
902 s32 ixgbe_mii_bus_init(struct ixgbe_hw *hw) in ixgbe_mii_bus_init() argument
906 struct ixgbe_adapter *adapter = hw->back; in ixgbe_mii_bus_init()
911 switch (hw->device_id) { in ixgbe_mii_bus_init()
922 if (!ixgbe_x550em_a_has_mii(hw)) in ixgbe_mii_bus_init()
953 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22; in ixgbe_mii_bus_init()
961 * @hw: pointer to hardware structure
965 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_generic() argument
972 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_generic()
975 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
978 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) && in ixgbe_setup_phy_link_generic()
982 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
984 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
987 if (hw->mac.type == ixgbe_mac_X550) { in ixgbe_setup_phy_link_generic()
990 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) && in ixgbe_setup_phy_link_generic()
996 if ((hw->phy.autoneg_advertised & in ixgbe_setup_phy_link_generic()
1004 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) && in ixgbe_setup_phy_link_generic()
1008 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
1012 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
1015 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) && in ixgbe_setup_phy_link_generic()
1019 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
1022 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_generic()
1026 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1031 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1039 * @hw: pointer to hardware structure
1043 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, in ixgbe_setup_phy_link_speed_generic() argument
1050 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
1053 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1056 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1059 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1062 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1065 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
1068 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL; in ixgbe_setup_phy_link_speed_generic()
1071 if (hw->phy.ops.setup_link) in ixgbe_setup_phy_link_speed_generic()
1072 hw->phy.ops.setup_link(hw); in ixgbe_setup_phy_link_speed_generic()
1079 * @hw: pointer to hardware structure
1084 static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw) in ixgbe_get_copper_speeds_supported() argument
1089 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_speeds_supported()
1095 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_get_copper_speeds_supported()
1097 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_get_copper_speeds_supported()
1099 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1101 switch (hw->mac.type) { in ixgbe_get_copper_speeds_supported()
1103 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1104 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1108 hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1119 * @hw: pointer to hardware structure
1123 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, in ixgbe_get_copper_link_capabilities_generic() argument
1130 if (!hw->phy.speeds_supported) in ixgbe_get_copper_link_capabilities_generic()
1131 status = ixgbe_get_copper_speeds_supported(hw); in ixgbe_get_copper_link_capabilities_generic()
1133 *speed = hw->phy.speeds_supported; in ixgbe_get_copper_link_capabilities_generic()
1139 * @hw: pointer to hardware structure
1146 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_phy_link_tnx() argument
1167 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
1189 * @hw: pointer to hardware structure
1196 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_tnx() argument
1202 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_tnx()
1206 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1211 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
1214 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1221 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1226 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
1229 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1236 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1242 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
1245 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1251 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_tnx()
1255 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1260 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1267 * @hw: pointer to hardware structure
1269 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) in ixgbe_reset_phy_nl() argument
1279 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_nl()
1282 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl()
1285 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1289 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1297 hw_dbg(hw, "PHY reset did not complete.\n"); in ixgbe_reset_phy_nl()
1302 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_reset_phy_nl()
1307 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
1313 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
1322 hw_dbg(hw, "DELAY: %d MS\n", edata); in ixgbe_reset_phy_nl()
1326 hw_dbg(hw, "DATA:\n"); in ixgbe_reset_phy_nl()
1328 ret_val = hw->eeprom.ops.read(hw, data_offset++, in ixgbe_reset_phy_nl()
1333 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1337 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1339 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, in ixgbe_reset_phy_nl()
1347 hw_dbg(hw, "CONTROL:\n"); in ixgbe_reset_phy_nl()
1349 hw_dbg(hw, "EOL\n"); in ixgbe_reset_phy_nl()
1352 hw_dbg(hw, "SOL\n"); in ixgbe_reset_phy_nl()
1354 hw_dbg(hw, "Bad control value\n"); in ixgbe_reset_phy_nl()
1359 hw_dbg(hw, "Bad control type\n"); in ixgbe_reset_phy_nl()
1367 hw_err(hw, "eeprom read at offset %d failed\n", data_offset); in ixgbe_reset_phy_nl()
1373 * @hw: pointer to hardware structure
1375 * Determines HW type and calls appropriate function.
1377 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_module_generic() argument
1379 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1381 return ixgbe_identify_sfp_module_generic(hw); in ixgbe_identify_module_generic()
1383 return ixgbe_identify_qsfp_module_generic(hw); in ixgbe_identify_module_generic()
1385 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1394 * @hw: pointer to hardware structure
1398 s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_sfp_module_generic() argument
1400 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_sfp_module_generic()
1403 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1412 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1413 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1418 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1420 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1428 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1431 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1438 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1444 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1467 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1469 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1471 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1473 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1475 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1478 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1479 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1482 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1485 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1486 hw, IXGBE_SFF_CABLE_SPEC_COMP, in ixgbe_identify_sfp_module_generic()
1490 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1491 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1494 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1497 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1503 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1504 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1507 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1510 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1511 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1514 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1517 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1518 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1521 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1524 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1525 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1528 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1531 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1535 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1536 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1539 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1544 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1547 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1548 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1549 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1556 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1563 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1578 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1583 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1585 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1588 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1591 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1595 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1598 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1601 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1613 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1614 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1615 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1616 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1617 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1618 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1619 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1624 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_identify_sfp_module_generic()
1627 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1629 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1630 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1631 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1632 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1633 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1634 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1636 if (hw->phy.type == ixgbe_phy_sfp_intel) in ixgbe_identify_sfp_module_generic()
1638 if (hw->allow_unsupported_sfp) { in ixgbe_identify_sfp_module_generic()
1642 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_identify_sfp_module_generic()
1643 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1649 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1650 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1651 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1652 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1659 * @hw: pointer to hardware structure
1663 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_qsfp_module_generic() argument
1665 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_qsfp_module_generic()
1668 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1679 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1680 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1685 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1687 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1694 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1698 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1700 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1706 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1713 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1714 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1715 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1717 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1720 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1721 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1723 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1732 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1736 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1740 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1753 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1754 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1755 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1758 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1762 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1767 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1768 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1771 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1776 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1781 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1788 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1795 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1808 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1810 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1812 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1815 if (hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_identify_qsfp_module_generic()
1817 if (hw->allow_unsupported_sfp) { in ixgbe_identify_qsfp_module_generic()
1821 hw_dbg(hw, "QSFP module not supported\n"); in ixgbe_identify_qsfp_module_generic()
1822 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1830 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1831 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1832 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1839 * @hw: pointer to hardware structure
1846 s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, in ixgbe_get_sfp_init_sequence_offsets() argument
1851 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
1853 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
1856 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
1859 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
1860 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
1879 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
1880 hw_err(hw, "eeprom read at %d failed\n", in ixgbe_get_sfp_init_sequence_offsets()
1895 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1901 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
1904 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_get_sfp_init_sequence_offsets()
1911 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1917 hw_dbg(hw, "No matching SFP+ module found\n"); in ixgbe_get_sfp_init_sequence_offsets()
1924 hw_err(hw, "eeprom read at offset %d failed\n", *list_offset); in ixgbe_get_sfp_init_sequence_offsets()
1930 * @hw: pointer to hardware structure
1936 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1939 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1946 * @hw: pointer to hardware structure
1952 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1955 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1962 * @hw: pointer to hardware structure
1968 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1971 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1978 * @hw: pointer to hardware structure
1982 static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr) in ixgbe_is_sfp_probe() argument
1986 hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_is_sfp_probe()
1993 * @hw: pointer to hardware structure
2002 static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_int() argument
2008 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic_int()
2011 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_read_i2c_byte_generic_int()
2013 if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) in ixgbe_read_i2c_byte_generic_int()
2019 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic_int()
2022 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2025 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_read_i2c_byte_generic_int()
2029 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2033 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic_int()
2037 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2041 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2044 status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in ixgbe_read_i2c_byte_generic_int()
2048 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2052 status = ixgbe_clock_in_i2c_byte(hw, data); in ixgbe_read_i2c_byte_generic_int()
2056 status = ixgbe_clock_out_i2c_bit(hw, nack); in ixgbe_read_i2c_byte_generic_int()
2060 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_byte_generic_int()
2062 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2066 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_byte_generic_int()
2068 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2073 hw_dbg(hw, "I2C byte read error - Retrying.\n"); in ixgbe_read_i2c_byte_generic_int()
2075 hw_dbg(hw, "I2C byte read error.\n"); in ixgbe_read_i2c_byte_generic_int()
2084 * @hw: pointer to hardware structure
2092 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
2095 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic()
2101 * @hw: pointer to hardware structure
2109 s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_unlocked() argument
2112 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic_unlocked()
2118 * @hw: pointer to hardware structure
2127 static s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_int() argument
2133 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic_int()
2135 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_byte_generic_int()
2139 ixgbe_i2c_start(hw); in ixgbe_write_i2c_byte_generic_int()
2141 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_write_i2c_byte_generic_int()
2145 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2149 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_write_i2c_byte_generic_int()
2153 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2157 status = ixgbe_clock_out_i2c_byte(hw, data); in ixgbe_write_i2c_byte_generic_int()
2161 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2165 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_byte_generic_int()
2167 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2171 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_byte_generic_int()
2174 hw_dbg(hw, "I2C byte write error - Retrying.\n"); in ixgbe_write_i2c_byte_generic_int()
2176 hw_dbg(hw, "I2C byte write error.\n"); in ixgbe_write_i2c_byte_generic_int()
2180 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2187 * @hw: pointer to hardware structure
2195 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic() argument
2198 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic()
2204 * @hw: pointer to hardware structure
2212 s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_unlocked() argument
2215 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic_unlocked()
2221 * @hw: pointer to hardware structure
2226 static void ixgbe_i2c_start(struct ixgbe_hw *hw) in ixgbe_i2c_start() argument
2228 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_start()
2230 i2cctl |= IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_start()
2233 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_start()
2234 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2239 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_start()
2244 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2253 * @hw: pointer to hardware structure
2259 static void ixgbe_i2c_stop(struct ixgbe_hw *hw) in ixgbe_i2c_stop() argument
2261 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_stop()
2262 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_i2c_stop()
2263 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_i2c_stop()
2264 u32 bb_en_bit = IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_stop()
2267 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_stop()
2268 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_stop()
2273 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_stop()
2281 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_i2c_stop()
2282 IXGBE_WRITE_FLUSH(hw); in ixgbe_i2c_stop()
2288 * @hw: pointer to hardware structure
2293 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) in ixgbe_clock_in_i2c_byte() argument
2300 ixgbe_clock_in_i2c_bit(hw, &bit); in ixgbe_clock_in_i2c_byte()
2309 * @hw: pointer to hardware structure
2314 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) in ixgbe_clock_out_i2c_byte() argument
2323 status = ixgbe_clock_out_i2c_bit(hw, bit); in ixgbe_clock_out_i2c_byte()
2330 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_byte()
2331 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_out_i2c_byte()
2332 i2cctl |= IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_out_i2c_byte()
2333 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2334 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_out_i2c_byte()
2341 * @hw: pointer to hardware structure
2345 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) in ixgbe_get_i2c_ack() argument
2347 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_ack()
2350 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2355 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_get_i2c_ack()
2357 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_get_i2c_ack()
2358 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_ack()
2360 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2368 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2369 ack = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_get_i2c_ack()
2377 hw_dbg(hw, "I2C ack was not received.\n"); in ixgbe_get_i2c_ack()
2381 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2391 * @hw: pointer to hardware structure
2396 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) in ixgbe_clock_in_i2c_bit() argument
2398 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2399 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_in_i2c_bit()
2402 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_in_i2c_bit()
2404 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2405 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_in_i2c_bit()
2407 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2412 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2413 *data = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2415 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2425 * @hw: pointer to hardware structure
2430 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) in ixgbe_clock_out_i2c_bit() argument
2433 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_bit()
2435 status = ixgbe_set_i2c_data(hw, &i2cctl, data); in ixgbe_clock_out_i2c_bit()
2437 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2442 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2449 hw_dbg(hw, "I2C data was not set to %X\n", data); in ixgbe_clock_out_i2c_bit()
2457 * @hw: pointer to hardware structure
2463 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_raise_i2c_clk() argument
2465 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_raise_i2c_clk()
2472 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2476 *i2cctl |= IXGBE_I2C_CLK_OUT(hw); in ixgbe_raise_i2c_clk()
2477 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2478 IXGBE_WRITE_FLUSH(hw); in ixgbe_raise_i2c_clk()
2482 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_raise_i2c_clk()
2483 if (i2cctl_r & IXGBE_I2C_CLK_IN(hw)) in ixgbe_raise_i2c_clk()
2490 * @hw: pointer to hardware structure
2496 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_lower_i2c_clk() argument
2499 *i2cctl &= ~IXGBE_I2C_CLK_OUT(hw); in ixgbe_lower_i2c_clk()
2500 *i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_lower_i2c_clk()
2502 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_lower_i2c_clk()
2503 IXGBE_WRITE_FLUSH(hw); in ixgbe_lower_i2c_clk()
2511 * @hw: pointer to hardware structure
2518 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) in ixgbe_set_i2c_data() argument
2520 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_set_i2c_data()
2523 *i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2525 *i2cctl &= ~IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2528 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2529 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2538 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2539 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2543 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_set_i2c_data()
2544 if (data != ixgbe_get_i2c_data(hw, i2cctl)) { in ixgbe_set_i2c_data()
2545 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); in ixgbe_set_i2c_data()
2554 * @hw: pointer to hardware structure
2560 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_get_i2c_data() argument
2562 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_data()
2566 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_get_i2c_data()
2567 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_data()
2571 if (*i2cctl & IXGBE_I2C_DATA_IN(hw)) in ixgbe_get_i2c_data()
2578 * @hw: pointer to hardware structure
2583 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) in ixgbe_i2c_bus_clear() argument
2588 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2589 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_bus_clear()
2591 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_bus_clear()
2594 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2599 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2605 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2608 ixgbe_i2c_stop(hw); in ixgbe_i2c_bus_clear()
2613 * @hw: pointer to hardware structure
2617 s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) in ixgbe_tn_check_overtemp() argument
2621 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2625 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()
2635 * @hw: pointer to hardware structure
2638 s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on) in ixgbe_set_copper_phy_power() argument
2644 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_set_copper_phy_power()
2647 if (!on && ixgbe_mng_present(hw)) in ixgbe_set_copper_phy_power()
2650 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®); in ixgbe_set_copper_phy_power()
2657 if (ixgbe_check_reset_blocked(hw)) in ixgbe_set_copper_phy_power()
2662 status = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg); in ixgbe_set_copper_phy_power()