Lines Matching +full:tcs +full:- +full:wait
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
41 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
55 switch (hw->phy.media_type) { in ixgbe_device_supports_autoneg_fc()
58 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
64 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_device_supports_autoneg_fc()
74 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI) in ixgbe_device_supports_autoneg_fc()
81 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
102 hw->device_id); in ixgbe_device_supports_autoneg_fc()
108 * ixgbe_setup_fc_generic - Set up flow control
124 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { in ixgbe_setup_fc_generic()
133 if (hw->fc.requested_mode == ixgbe_fc_default) in ixgbe_setup_fc_generic()
134 hw->fc.requested_mode = ixgbe_fc_full; in ixgbe_setup_fc_generic()
141 switch (hw->phy.media_type) { in ixgbe_setup_fc_generic()
144 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, ®_bp); in ixgbe_setup_fc_generic()
154 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_fc_generic()
171 switch (hw->fc.requested_mode) { in ixgbe_setup_fc_generic()
175 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
178 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
188 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
191 } else if (hw->phy.media_type == ixgbe_media_type_copper) { in ixgbe_setup_fc_generic()
209 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
212 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
220 if (hw->mac.type != ixgbe_mac_X540) { in ixgbe_setup_fc_generic()
222 * Enable auto-negotiation between the MAC & PHY; in ixgbe_setup_fc_generic()
229 if (hw->fc.strict_ieee) in ixgbe_setup_fc_generic()
241 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
246 ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked); in ixgbe_setup_fc_generic()
250 } else if ((hw->phy.media_type == ixgbe_media_type_copper) && in ixgbe_setup_fc_generic()
252 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_fc_generic()
261 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
276 hw->phy.media_type = hw->mac.ops.get_media_type(hw); in ixgbe_start_hw_generic()
279 hw->phy.ops.identify(hw); in ixgbe_start_hw_generic()
282 hw->mac.ops.clear_vfta(hw); in ixgbe_start_hw_generic()
285 hw->mac.ops.clear_hw_cntrs(hw); in ixgbe_start_hw_generic()
294 if (hw->mac.ops.setup_fc) { in ixgbe_start_hw_generic()
295 ret_val = hw->mac.ops.setup_fc(hw); in ixgbe_start_hw_generic()
301 switch (hw->mac.type) { in ixgbe_start_hw_generic()
305 hw->mac.ops.get_device_caps(hw, &device_caps); in ixgbe_start_hw_generic()
307 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
309 hw->need_crosstalk_fix = true; in ixgbe_start_hw_generic()
312 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
317 hw->adapter_stopped = false; in ixgbe_start_hw_generic()
323 * ixgbe_start_hw_gen2 - Init sequence for common device family
337 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
347 * ixgbe_init_hw_generic - Generic hardware initialization
361 status = hw->mac.ops.reset_hw(hw); in ixgbe_init_hw_generic()
365 status = hw->mac.ops.start_hw(hw); in ixgbe_init_hw_generic()
369 if (hw->mac.ops.init_led_link_act) in ixgbe_init_hw_generic()
370 hw->mac.ops.init_led_link_act(hw); in ixgbe_init_hw_generic()
376 * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
398 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
409 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
417 if (hw->mac.type >= ixgbe_mac_82599EB) in ixgbe_clear_hw_cntrs_generic()
434 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_clear_hw_cntrs_generic()
459 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
471 if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_X540) { in ixgbe_clear_hw_cntrs_generic()
472 if (hw->phy.id == 0) in ixgbe_clear_hw_cntrs_generic()
473 hw->phy.ops.identify(hw); in ixgbe_clear_hw_cntrs_generic()
474 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
475 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
476 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
477 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
484 * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
505 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_string_generic()
511 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); in ixgbe_read_pba_string_generic()
538 pba_num[6] = '-'; in ixgbe_read_pba_string_generic()
546 /* switch all the data but the '-' to hex char */ in ixgbe_read_pba_string_generic()
551 pba_num[offset] += 'A' - 0xA; in ixgbe_read_pba_string_generic()
557 ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); in ixgbe_read_pba_string_generic()
569 if (pba_num_size < (((u32)length * 2) - 1)) { in ixgbe_read_pba_string_generic()
576 length--; in ixgbe_read_pba_string_generic()
579 ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); in ixgbe_read_pba_string_generic()
593 * ixgbe_get_mac_addr_generic - Generic get MAC address
650 * ixgbe_get_bus_info_generic - Generic set PCI bus info
659 hw->bus.type = ixgbe_bus_type_pci_express; in ixgbe_get_bus_info_generic()
664 hw->bus.width = ixgbe_convert_bus_width(link_status); in ixgbe_get_bus_info_generic()
665 hw->bus.speed = ixgbe_convert_bus_speed(link_status); in ixgbe_get_bus_info_generic()
667 hw->mac.ops.set_lan_id(hw); in ixgbe_get_bus_info_generic()
673 * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
676 * Determines the LAN function id by reading memory-mapped registers
681 struct ixgbe_bus_info *bus = &hw->bus; in ixgbe_set_lan_id_multi_port_pcie()
686 bus->func = (reg & IXGBE_STATUS_LAN_ID) >> IXGBE_STATUS_LAN_ID_SHIFT; in ixgbe_set_lan_id_multi_port_pcie()
687 bus->lan_id = bus->func; in ixgbe_set_lan_id_multi_port_pcie()
692 bus->func ^= 0x1; in ixgbe_set_lan_id_multi_port_pcie()
695 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) { in ixgbe_set_lan_id_multi_port_pcie()
696 hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4); in ixgbe_set_lan_id_multi_port_pcie()
697 bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >> in ixgbe_set_lan_id_multi_port_pcie()
703 * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
720 hw->adapter_stopped = true; in ixgbe_stop_adapter_generic()
723 hw->mac.ops.disable_rx(hw); in ixgbe_stop_adapter_generic()
732 for (i = 0; i < hw->mac.max_tx_queues; i++) in ixgbe_stop_adapter_generic()
736 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_stop_adapter_generic()
748 * Prevent the PCI-E bus from from hanging by disabling PCI-E master in ixgbe_stop_adapter_generic()
755 * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
763 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_led_link_act_generic()
775 mac->led_link_act = i; in ixgbe_init_led_link_act_generic()
783 switch (hw->mac.type) { in ixgbe_init_led_link_act_generic()
785 mac->led_link_act = 0; in ixgbe_init_led_link_act_generic()
788 mac->led_link_act = 1; in ixgbe_init_led_link_act_generic()
791 mac->led_link_act = 2; in ixgbe_init_led_link_act_generic()
798 * ixgbe_led_on_generic - Turns on the software controllable LEDs.
819 * ixgbe_led_off_generic - Turns off the software controllable LEDs.
840 * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
848 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_generic()
852 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_generic()
853 eeprom->type = ixgbe_eeprom_none; in ixgbe_init_eeprom_params_generic()
856 eeprom->semaphore_delay = 10; in ixgbe_init_eeprom_params_generic()
858 eeprom->word_page_size = 0; in ixgbe_init_eeprom_params_generic()
866 eeprom->type = ixgbe_eeprom_spi; in ixgbe_init_eeprom_params_generic()
874 eeprom->word_size = BIT(eeprom_size + in ixgbe_init_eeprom_params_generic()
879 eeprom->address_bits = 16; in ixgbe_init_eeprom_params_generic()
881 eeprom->address_bits = 8; in ixgbe_init_eeprom_params_generic()
883 eeprom->type, eeprom->word_size, eeprom->address_bits); in ixgbe_init_eeprom_params_generic()
890 * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
896 * Reads 16 bit word(s) from EEPROM through bit-bang method
904 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_buffer_bit_bang_generic()
909 if (offset + words > hw->eeprom.word_size) in ixgbe_write_eeprom_buffer_bit_bang_generic()
916 if ((hw->eeprom.word_page_size == 0) && in ixgbe_write_eeprom_buffer_bit_bang_generic()
926 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_write_eeprom_buffer_bit_bang_generic()
927 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_write_eeprom_buffer_bit_bang_generic()
939 * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
980 if ((hw->eeprom.address_bits == 8) && in ixgbe_write_eeprom_buffer_bit_bang()
984 /* Send the Write command (8-bit opcode + addr) */ in ixgbe_write_eeprom_buffer_bit_bang()
988 hw->eeprom.address_bits); in ixgbe_write_eeprom_buffer_bit_bang()
990 page_size = hw->eeprom.word_page_size; in ixgbe_write_eeprom_buffer_bit_bang()
1002 if (((offset + i) & (page_size - 1)) == in ixgbe_write_eeprom_buffer_bit_bang()
1003 (page_size - 1)) in ixgbe_write_eeprom_buffer_bit_bang()
1010 /* Done with writing - release the EEPROM */ in ixgbe_write_eeprom_buffer_bit_bang()
1017 * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
1027 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_generic()
1029 if (offset >= hw->eeprom.word_size) in ixgbe_write_eeprom_generic()
1036 * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
1042 * Reads 16 bit word(s) from EEPROM through bit-bang method
1050 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1055 if (offset + words > hw->eeprom.word_size) in ixgbe_read_eeprom_buffer_bit_bang_generic()
1064 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_read_eeprom_buffer_bit_bang_generic()
1065 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1078 * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
1084 * Reads 16 bit word(s) from EEPROM through bit-bang method
1109 if ((hw->eeprom.address_bits == 8) && in ixgbe_read_eeprom_buffer_bit_bang()
1117 hw->eeprom.address_bits); in ixgbe_read_eeprom_buffer_bit_bang()
1131 * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
1136 * Reads 16 bit value from EEPROM through bit-bang method
1141 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_bit_bang_generic()
1143 if (offset >= hw->eeprom.word_size) in ixgbe_read_eeprom_bit_bang_generic()
1150 * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
1165 hw->eeprom.ops.init_params(hw); in ixgbe_read_eerd_buffer_generic()
1170 if (offset >= hw->eeprom.word_size) in ixgbe_read_eerd_buffer_generic()
1193 * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
1211 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX; in ixgbe_detect_eeprom_page_size_generic()
1214 hw->eeprom.word_page_size = 0; in ixgbe_detect_eeprom_page_size_generic()
1226 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; in ixgbe_detect_eeprom_page_size_generic()
1229 hw->eeprom.word_page_size); in ixgbe_detect_eeprom_page_size_generic()
1234 * ixgbe_read_eerd_generic - Read EEPROM word using EERD
1247 * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
1262 hw->eeprom.ops.init_params(hw); in ixgbe_write_eewr_buffer_generic()
1267 if (offset >= hw->eeprom.word_size) in ixgbe_write_eewr_buffer_generic()
1294 * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
1307 * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
1334 * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
1337 * Prepares EEPROM for access using bit-bang method. This function should
1345 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) != 0) in ixgbe_acquire_eeprom()
1367 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_acquire_eeprom()
1381 * ixgbe_get_eeprom_semaphore - Get hardware semaphore
1384 * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
1405 hw_dbg(hw, "Driver can't access the Eeprom - SMBI Semaphore not granted.\n"); in ixgbe_get_eeprom_semaphore()
1456 * ixgbe_release_eeprom_semaphore - Release hardware semaphore
1474 * ixgbe_ready_eeprom - Polls for EEPROM ready
1500 * On some parts, SPI write time could vary from 0-20mSec on 3.3V in ixgbe_ready_eeprom()
1501 * devices (and only 0-5mSec on 5V devices) in ixgbe_ready_eeprom()
1512 * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
1533 * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
1551 mask = BIT(count - 1); in ixgbe_shift_out_eeprom_bits()
1588 * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
1626 * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
1643 * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
1660 * ixgbe_release_eeprom - Release EEPROM, release semaphores
1681 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_release_eeprom()
1687 usleep_range(hw->eeprom.semaphore_delay * 1000, in ixgbe_release_eeprom()
1688 hw->eeprom.semaphore_delay * 2000); in ixgbe_release_eeprom()
1692 * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
1704 /* Include 0x0-0x3F in the checksum */ in ixgbe_calc_eeprom_checksum_generic()
1706 if (hw->eeprom.ops.read(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_generic()
1715 if (hw->eeprom.ops.read(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_generic()
1724 if (hw->eeprom.ops.read(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_generic()
1733 if (hw->eeprom.ops.read(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_generic()
1741 checksum = (u16)IXGBE_EEPROM_SUM - checksum; in ixgbe_calc_eeprom_checksum_generic()
1747 * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
1763 * not continue or we could be in for a very long wait while every in ixgbe_validate_eeprom_checksum_generic()
1766 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_generic()
1772 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_generic()
1778 status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum); in ixgbe_validate_eeprom_checksum_generic()
1798 * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
1808 * not continue or we could be in for a very long wait while every in ixgbe_update_eeprom_checksum_generic()
1811 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_generic()
1817 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_generic()
1823 status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_generic()
1829 * ixgbe_set_rar_generic - Set Rx address register
1842 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_rar_generic()
1851 hw->mac.ops.set_vmdq(hw, index, vmdq); in ixgbe_set_rar_generic()
1885 * ixgbe_clear_rar_generic - Remove Rx address register
1894 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_rar_generic()
1919 hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_clear_rar_generic()
1925 * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
1935 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_init_rx_addrs_generic()
1942 if (!is_valid_ether_addr(hw->mac.addr)) { in ixgbe_init_rx_addrs_generic()
1944 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1946 hw_dbg(hw, " Keeping Current RAR0 Addr =%pM\n", hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1950 hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1952 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); in ixgbe_init_rx_addrs_generic()
1956 hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_init_rx_addrs_generic()
1958 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_init_rx_addrs_generic()
1960 hw->addr_ctrl.rar_used_count = 1; in ixgbe_init_rx_addrs_generic()
1963 hw_dbg(hw, "Clearing RAR[1-%d]\n", rar_entries - 1); in ixgbe_init_rx_addrs_generic()
1970 hw->addr_ctrl.mta_in_use = 0; in ixgbe_init_rx_addrs_generic()
1971 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_init_rx_addrs_generic()
1974 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_init_rx_addrs_generic()
1977 if (hw->mac.ops.init_uta_tables) in ixgbe_init_rx_addrs_generic()
1978 hw->mac.ops.init_uta_tables(hw); in ixgbe_init_rx_addrs_generic()
1984 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
1989 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
1990 * incoming rx multicast addresses, to determine the bit-vector to check in
1991 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
1999 switch (hw->mac.mc_filter_type) { in ixgbe_mta_vector()
2017 /* vector can only be 12-bits or boundary will be exceeded */ in ixgbe_mta_vector()
2023 * ixgbe_set_mta - Set bit-vector in multicast table
2027 * Sets the bit-vector in the multicast table.
2035 hw->addr_ctrl.mta_in_use++; in ixgbe_set_mta()
2038 hw_dbg(hw, " bit-vector = 0x%03X\n", vector); in ixgbe_set_mta()
2041 * The MTA is a register array of 128 32-bit registers. It is treated in ixgbe_set_mta()
2051 hw->mac.mta_shadow[vector_reg] |= BIT(vector_bit); in ixgbe_set_mta()
2055 * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
2074 hw->addr_ctrl.num_mc_addrs = netdev_mc_count(netdev); in ixgbe_update_mc_addr_list_generic()
2075 hw->addr_ctrl.mta_in_use = 0; in ixgbe_update_mc_addr_list_generic()
2079 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in ixgbe_update_mc_addr_list_generic()
2084 ixgbe_set_mta(hw, ha->addr); in ixgbe_update_mc_addr_list_generic()
2088 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_update_mc_addr_list_generic()
2090 hw->mac.mta_shadow[i]); in ixgbe_update_mc_addr_list_generic()
2092 if (hw->addr_ctrl.mta_in_use > 0) in ixgbe_update_mc_addr_list_generic()
2094 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); in ixgbe_update_mc_addr_list_generic()
2101 * ixgbe_enable_mc_generic - Enable multicast address in RAR
2108 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_enable_mc_generic()
2110 if (a->mta_in_use > 0) in ixgbe_enable_mc_generic()
2112 hw->mac.mc_filter_type); in ixgbe_enable_mc_generic()
2118 * ixgbe_disable_mc_generic - Disable multicast address in RAR
2125 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_disable_mc_generic()
2127 if (a->mta_in_use > 0) in ixgbe_disable_mc_generic()
2128 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_disable_mc_generic()
2134 * ixgbe_fc_enable_generic - Enable flow control
2147 if (!hw->fc.pause_time) in ixgbe_fc_enable_generic()
2152 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2153 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2154 if (!hw->fc.low_water[i] || in ixgbe_fc_enable_generic()
2155 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2163 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_generic()
2182 switch (hw->fc.current_mode) { in ixgbe_fc_enable_generic()
2224 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2225 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2226 fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; in ixgbe_fc_enable_generic()
2228 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_generic()
2234 * to the Rx packet buffer size - 24KB. This allows in ixgbe_fc_enable_generic()
2238 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; in ixgbe_fc_enable_generic()
2244 /* Configure pause time (2 TCs per register) */ in ixgbe_fc_enable_generic()
2245 reg = hw->fc.pause_time * 0x00010001U; in ixgbe_fc_enable_generic()
2249 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); in ixgbe_fc_enable_generic()
2255 * ixgbe_negotiate_fc - Negotiate flow control
2281 if (hw->fc.requested_mode == ixgbe_fc_full) { in ixgbe_negotiate_fc()
2282 hw->fc.current_mode = ixgbe_fc_full; in ixgbe_negotiate_fc()
2285 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2290 hw->fc.current_mode = ixgbe_fc_tx_pause; in ixgbe_negotiate_fc()
2294 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2297 hw->fc.current_mode = ixgbe_fc_none; in ixgbe_negotiate_fc()
2304 * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
2316 * - link is up but AN did not complete, or if in ixgbe_fc_autoneg_fiber()
2317 * - link is up and AN completed but timed out in ixgbe_fc_autoneg_fiber()
2338 * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
2350 * - backplane autoneg was not completed, or if in ixgbe_fc_autoneg_backplane()
2351 * - we are 82599 and link partner is not AN enabled in ixgbe_fc_autoneg_backplane()
2357 if (hw->mac.type == ixgbe_mac_82599EB) { in ixgbe_fc_autoneg_backplane()
2377 * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
2387 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_fc_autoneg_copper()
2390 hw->phy.ops.read_reg(hw, MDIO_AN_LPA, in ixgbe_fc_autoneg_copper()
2401 * ixgbe_fc_autoneg - Configure flow control
2416 * - FC autoneg is disabled, or if in ixgbe_fc_autoneg()
2417 * - link is not up. in ixgbe_fc_autoneg()
2422 if (hw->fc.disable_fc_autoneg) in ixgbe_fc_autoneg()
2425 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_fc_autoneg()
2429 switch (hw->phy.media_type) { in ixgbe_fc_autoneg()
2453 hw->fc.fc_was_autonegged = true; in ixgbe_fc_autoneg()
2455 hw->fc.fc_was_autonegged = false; in ixgbe_fc_autoneg()
2456 hw->fc.current_mode = hw->fc.requested_mode; in ixgbe_fc_autoneg()
2461 * ixgbe_pcie_timeout_poll - Return number of times to poll for completion
2464 * System-wide timeout range is encoded in PCIe Device Control2 register.
2508 * ixgbe_disable_pcie_master - Disable PCI-express master access
2511 * Disables PCI-Express master access and verifies there are no pending
2531 hw_dbg(hw, "GIO disable did not set - requesting resets\n"); in ixgbe_disable_pcie_master()
2537 ixgbe_removed(hw->hw_addr)) in ixgbe_disable_pcie_master()
2551 * being issued by our device. We then must wait 1usec or more for any in ixgbe_disable_pcie_master()
2555 hw_dbg(hw, "GIO Master Disable bit didn't clear - requesting resets\n"); in ixgbe_disable_pcie_master()
2557 hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_disable_pcie_master()
2559 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_disable_pcie_master()
2570 if (ixgbe_removed(hw->hw_addr)) in ixgbe_disable_pcie_master()
2581 * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
2626 * ixgbe_release_swfw_sync - Release SWFW semaphore
2648 * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
2664 * prot_autoc_write_generic - Hides MAC differences needed for AUTOC write
2677 * ixgbe_disable_rx_buff_generic - Stops the receive data path
2697 /* Use interrupt-safe sleep just in case */ in ixgbe_disable_rx_buff_generic()
2710 * ixgbe_enable_rx_buff - Enables the receive data path
2728 * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
2737 hw->mac.ops.enable_rx(hw); in ixgbe_enable_rx_dma_generic()
2739 hw->mac.ops.disable_rx(hw); in ixgbe_enable_rx_dma_generic()
2745 * ixgbe_blink_led_start_generic - Blink LED based on index.
2762 * Link must be up to auto-blink the LEDs; in ixgbe_blink_led_start_generic()
2765 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_generic()
2768 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_start_generic()
2775 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_start_generic()
2793 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
2807 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_stop_generic()
2814 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_stop_generic()
2828 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
2845 ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, in ixgbe_get_san_mac_addr_offset()
2855 * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
2860 * per-port, so set_lan_id() must be called before reading the addresses.
2862 * upon for non-SFP connections, so we must call it here.
2880 hw->mac.ops.set_lan_id(hw); in ixgbe_get_san_mac_addr_generic()
2882 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_get_san_mac_addr_generic()
2885 ret_val = hw->eeprom.ops.read(hw, san_mac_offset, in ixgbe_get_san_mac_addr_generic()
2908 * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
2911 * Read PCIe configuration space, and get the MSI-X vector count from
2920 switch (hw->mac.type) { in ixgbe_get_pcie_msix_count_generic()
2938 if (ixgbe_removed(hw->hw_addr)) in ixgbe_get_pcie_msix_count_generic()
2942 /* MSI-X count is zero-based in HW */ in ixgbe_get_pcie_msix_count_generic()
2952 * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
2960 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_vmdq_generic()
2971 if (ixgbe_removed(hw->hw_addr)) in ixgbe_clear_vmdq_generic()
2990 mpsar_hi &= ~BIT(vmdq - 32); in ixgbe_clear_vmdq_generic()
2996 rar != 0 && rar != hw->mac.san_mac_rar_index) in ixgbe_clear_vmdq_generic()
2997 hw->mac.ops.clear_rar(hw, rar); in ixgbe_clear_vmdq_generic()
3003 * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
3011 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_vmdq_generic()
3025 mpsar |= BIT(vmdq - 32); in ixgbe_set_vmdq_generic()
3035 * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
3037 * ixgbe_set_vmdq_san_mac - Associate default VMDq pool index with a rx address
3043 u32 rar = hw->mac.san_mac_rar_index; in ixgbe_set_vmdq_san_mac_generic()
3050 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), BIT(vmdq - 32)); in ixgbe_set_vmdq_san_mac_generic()
3057 * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
3071 * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
3101 * pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1 in ixgbe_find_vlvf_slot()
3103 for (regindex = IXGBE_VLVF_ENTRIES; --regindex;) { in ixgbe_find_vlvf_slot()
3121 * ixgbe_set_vfta_generic - Set VLAN filter table
3140 * this is a 2 part operation - first the VFTA, then the in ixgbe_set_vfta_generic()
3146 * The VFTA is a bitstring made up of 128 32-bit registers in ixgbe_set_vfta_generic()
3148 * bits[11-5]: which register in ixgbe_set_vfta_generic()
3149 * bits[4-0]: which bit in the register in ixgbe_set_vfta_generic()
3191 !IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) { in ixgbe_set_vfta_generic()
3236 * ixgbe_clear_vfta_generic - Clear VLAN filter table
3245 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_generic()
3258 * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
3267 if (!hw->need_crosstalk_fix) in ixgbe_need_crosstalk_fix()
3271 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_need_crosstalk_fix()
3283 * ixgbe_check_mac_link_generic - Determine link and speed status
3287 * @link_up_wait_to_complete: bool used to wait for link up or not
3303 switch (hw->mac.type) { in ixgbe_check_mac_link_generic()
3314 /* sanity check - No SFP+ devices here */ in ixgbe_check_mac_link_generic()
3356 if ((hw->mac.type >= ixgbe_mac_X550) && in ixgbe_check_mac_link_generic()
3366 if ((hw->mac.type >= ixgbe_mac_X550) && in ixgbe_check_mac_link_generic()
3374 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || in ixgbe_check_mac_link_generic()
3375 hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) { in ixgbe_check_mac_link_generic()
3387 * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
3408 if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset)) in ixgbe_get_wwn_prefix_generic()
3417 if (hw->eeprom.ops.read(hw, offset, &caps)) in ixgbe_get_wwn_prefix_generic()
3424 if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) in ixgbe_get_wwn_prefix_generic()
3428 if (hw->eeprom.ops.read(hw, offset, wwpn_prefix)) in ixgbe_get_wwn_prefix_generic()
3439 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
3441 * @enable: enable or disable switch for MAC anti-spoofing
3442 * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
3451 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_mac_anti_spoofing()
3463 * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
3465 * @enable: enable or disable switch for VLAN anti-spoofing
3466 * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
3475 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_vlan_anti_spoofing()
3487 * ixgbe_get_device_caps_generic - Get additional device capabilities
3496 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); in ixgbe_get_device_caps_generic()
3502 * ixgbe_set_rxpba_generic - Initialize RX packet buffer
3513 u32 pbsize = hw->mac.rx_pb_size; in ixgbe_set_rxpba_generic()
3518 pbsize -= headroom; in ixgbe_set_rxpba_generic()
3532 pbsize -= rxpktsize * (num_pb / 2); in ixgbe_set_rxpba_generic()
3538 /* Divide the remaining Rx packet buffer evenly among the TCs */ in ixgbe_set_rxpba_generic()
3539 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
3548 * Setup Tx packet buffer and threshold equally for all TCs in ixgbe_set_rxpba_generic()
3553 txpbthresh = (txpktsize / 1024) - IXGBE_TXPKT_SIZE_MAX; in ixgbe_set_rxpba_generic()
3559 /* Clear unused TCs, if any, to zero buffer size*/ in ixgbe_set_rxpba_generic()
3568 * ixgbe_calculate_checksum - Calculate checksum for buffer
3586 return (u8) (0 - sum); in ixgbe_calculate_checksum()
3590 * ixgbe_hic_unlocked - Issue command to manageability block unlocked
3594 * @timeout: time in ms to wait for command completion
3610 hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length); in ixgbe_hic_unlocked()
3659 * ixgbe_host_interface_command - Issue command to manageability block
3664 * @timeout: time in ms to wait for command completion
3689 hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length); in ixgbe_host_interface_command()
3693 status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
3709 bp->u32arr[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi); in ixgbe_host_interface_command()
3710 le32_to_cpus(&bp->u32arr[bi]); in ixgbe_host_interface_command()
3714 buf_len = bp->hdr.buf_len; in ixgbe_host_interface_command()
3729 bp->u32arr[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi); in ixgbe_host_interface_command()
3730 le32_to_cpus(&bp->u32arr[bi]); in ixgbe_host_interface_command()
3734 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
3740 * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
3765 fw_cmd.port_num = hw->bus.func; in ixgbe_set_fw_drv_ver_generic()
3797 * ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo
3813 if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) in ixgbe_clear_tx_pending()
3824 /* wait for a last completion before clearing buffers */ in ixgbe_clear_tx_pending()
3835 if (ixgbe_removed(hw->hw_addr)) in ixgbe_clear_tx_pending()
3869 * ixgbe_get_ets_data - Extracts the ETS bit data
3881 status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, ets_offset); in ixgbe_get_ets_data()
3888 status = hw->eeprom.ops.read(hw, *ets_offset, ets_cfg); in ixgbe_get_ets_data()
3899 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
3912 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_get_thermal_sensor_data_generic()
3930 status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i), in ixgbe_get_thermal_sensor_data_generic()
3941 status = hw->phy.ops.read_i2c_byte(hw, in ixgbe_get_thermal_sensor_data_generic()
3944 &data->sensor[i].temp); in ixgbe_get_thermal_sensor_data_generic()
3954 * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
3970 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_init_thermal_sensor_thresh_generic()
3992 if (hw->eeprom.ops.read(hw, ets_offset + 1 + i, &ets_sensor)) { in ixgbe_init_thermal_sensor_thresh_generic()
4003 hw->phy.ops.write_i2c_byte(hw, in ixgbe_init_thermal_sensor_thresh_generic()
4010 data->sensor[i].location = sensor_location; in ixgbe_init_thermal_sensor_thresh_generic()
4011 data->sensor[i].caution_thresh = therm_limit; in ixgbe_init_thermal_sensor_thresh_generic()
4012 data->sensor[i].max_op_thresh = therm_limit - low_thresh_delta; in ixgbe_init_thermal_sensor_thresh_generic()
4019 * ixgbe_get_orom_version - Return option ROM from EEPROM
4024 * if valid option ROM version, nvm_ver->or_valid set to true
4025 * else nvm_ver->or_valid is false.
4032 nvm_ver->or_valid = false; in ixgbe_get_orom_version()
4034 hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset); in ixgbe_get_orom_version()
4040 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh); in ixgbe_get_orom_version()
4041 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl); in ixgbe_get_orom_version()
4049 nvm_ver->or_valid = true; in ixgbe_get_orom_version()
4050 nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT; in ixgbe_get_orom_version()
4051 nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) | in ixgbe_get_orom_version()
4053 nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK; in ixgbe_get_orom_version()
4062 * if valid OEM product version, nvm_ver->oem_valid set to true
4063 * else nvm_ver->oem_valid is false.
4070 nvm_ver->oem_valid = false; in ixgbe_get_oem_prod_version()
4071 hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset); in ixgbe_get_oem_prod_version()
4078 hw->eeprom.ops.read(hw, offset, &mod_len); in ixgbe_get_oem_prod_version()
4079 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap); in ixgbe_get_oem_prod_version()
4086 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver); in ixgbe_get_oem_prod_version()
4087 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num); in ixgbe_get_oem_prod_version()
4094 nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT; in ixgbe_get_oem_prod_version()
4095 nvm_ver->oem_minor = prod_ver & NVM_VER_MASK; in ixgbe_get_oem_prod_version()
4096 nvm_ver->oem_release = rel_num; in ixgbe_get_oem_prod_version()
4097 nvm_ver->oem_valid = true; in ixgbe_get_oem_prod_version()
4101 * ixgbe_get_etk_id - Return Etrack ID from EEPROM
4113 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l)) in ixgbe_get_etk_id()
4115 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h)) in ixgbe_get_etk_id()
4122 nvm_ver->etk_id = etk_id_h; in ixgbe_get_etk_id()
4123 nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
4125 nvm_ver->etk_id = etk_id_l; in ixgbe_get_etk_id()
4126 nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
4136 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_disable_rx_generic()
4143 hw->mac.set_lben = true; in ixgbe_disable_rx_generic()
4145 hw->mac.set_lben = false; in ixgbe_disable_rx_generic()
4160 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_enable_rx_generic()
4161 if (hw->mac.set_lben) { in ixgbe_enable_rx_generic()
4167 hw->mac.set_lben = false; in ixgbe_enable_rx_generic()
4172 /** ixgbe_mng_present - returns true when management capability is present
4179 if (hw->mac.type < ixgbe_mac_82599EB) in ixgbe_mng_present()
4188 * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
4206 /* Mask off requested but non-supported speeds */ in ixgbe_setup_mac_link_multispeed_fiber()
4207 status = hw->mac.ops.get_link_capabilities(hw, &link_speed, &autoneg); in ixgbe_setup_mac_link_multispeed_fiber()
4221 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
4223 hw->mac.ops.set_rate_select_speed(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4234 /* Allow module to change analog characteristics (1G->10G) */ in ixgbe_setup_mac_link_multispeed_fiber()
4237 status = hw->mac.ops.setup_mac_link(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4244 if (hw->mac.ops.flap_tx_laser) in ixgbe_setup_mac_link_multispeed_fiber()
4245 hw->mac.ops.flap_tx_laser(hw); in ixgbe_setup_mac_link_multispeed_fiber()
4247 /* Wait for the controller to acquire link. Per IEEE 802.3ap, in ixgbe_setup_mac_link_multispeed_fiber()
4248 * Section 73.10.2, we may have to wait up to 500ms if KR is in ixgbe_setup_mac_link_multispeed_fiber()
4252 /* Wait for the link partner to also set speed */ in ixgbe_setup_mac_link_multispeed_fiber()
4256 status = hw->mac.ops.check_link(hw, &link_speed, in ixgbe_setup_mac_link_multispeed_fiber()
4272 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
4274 hw->mac.ops.set_rate_select_speed(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4285 /* Allow module to change analog characteristics (10G->1G) */ in ixgbe_setup_mac_link_multispeed_fiber()
4288 status = hw->mac.ops.setup_mac_link(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4295 if (hw->mac.ops.flap_tx_laser) in ixgbe_setup_mac_link_multispeed_fiber()
4296 hw->mac.ops.flap_tx_laser(hw); in ixgbe_setup_mac_link_multispeed_fiber()
4298 /* Wait for the link partner to also set speed */ in ixgbe_setup_mac_link_multispeed_fiber()
4302 status = hw->mac.ops.check_link(hw, &link_speed, &link_up, in ixgbe_setup_mac_link_multispeed_fiber()
4322 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_multispeed_fiber()
4325 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
4328 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
4334 * ixgbe_set_soft_rate_select_speed - Set module link speed
4360 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
4370 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
4379 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()
4389 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()