Lines Matching +full:0 +full:x02000000

34 #define IGC_ADVTXD_MAC_TSTAMP	0x00080000 /* IEEE1588 Timestamp packet */
35 #define IGC_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
36 #define IGC_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
37 #define IGC_ADVTXD_DCMD_EOP	0x01000000 /* End of Packet */
38 #define IGC_ADVTXD_DCMD_IFCS	0x02000000 /* Insert FCS (Ethernet CRC) */
39 #define IGC_ADVTXD_DCMD_RS	0x08000000 /* Report Status */
40 #define IGC_ADVTXD_DCMD_DEXT	0x20000000 /* Descriptor extension (1=Adv) */
41 #define IGC_ADVTXD_DCMD_VLE	0x40000000 /* VLAN pkt enable */
42 #define IGC_ADVTXD_DCMD_TSE	0x80000000 /* TCP Seg enable */
80 #define IGC_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
83 #define IGC_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */
88 #define IGC_SRRCTL_DESCTYPE_ADV_ONEBUF	0x02000000