Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
10 static s32 igb_phy_setup_autoneg(struct e1000_hw *hw);
11 static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw,
13 static s32 igb_wait_autoneg(struct e1000_hw *hw);
14 static s32 igb_set_master_slave_mode(struct e1000_hw *hw);
31 * igb_check_reset_block - Check if PHY reset is blocked
32 * @hw: pointer to the HW structure
38 s32 igb_check_reset_block(struct e1000_hw *hw) in igb_check_reset_block() argument
48 * igb_get_phy_id - Retrieve the PHY ID and revision
49 * @hw: pointer to the HW structure
54 s32 igb_get_phy_id(struct e1000_hw *hw) in igb_get_phy_id() argument
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id()
61 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
74 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igb_get_phy_id()
75 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igb_get_phy_id()
82 * igb_phy_reset_dsp - Reset PHY DSP
83 * @hw: pointer to the HW structure
87 static s32 igb_phy_reset_dsp(struct e1000_hw *hw) in igb_phy_reset_dsp() argument
91 if (!(hw->phy.ops.write_reg)) in igb_phy_reset_dsp()
94 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1); in igb_phy_reset_dsp()
98 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0); in igb_phy_reset_dsp()
105 * igb_read_phy_reg_mdic - Read MDI control register
106 * @hw: pointer to the HW structure
113 s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) in igb_read_phy_reg_mdic() argument
115 struct e1000_phy_info *phy = &hw->phy; in igb_read_phy_reg_mdic()
121 ret_val = -E1000_ERR_PARAM; in igb_read_phy_reg_mdic()
125 /* Set up Op-code, Phy Address, and register offset in the MDI in igb_read_phy_reg_mdic()
130 (phy->addr << E1000_MDIC_PHY_SHIFT) | in igb_read_phy_reg_mdic()
147 ret_val = -E1000_ERR_PHY; in igb_read_phy_reg_mdic()
152 ret_val = -E1000_ERR_PHY; in igb_read_phy_reg_mdic()
162 * igb_write_phy_reg_mdic - Write MDI control register
163 * @hw: pointer to the HW structure
169 s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) in igb_write_phy_reg_mdic() argument
171 struct e1000_phy_info *phy = &hw->phy; in igb_write_phy_reg_mdic()
177 ret_val = -E1000_ERR_PARAM; in igb_write_phy_reg_mdic()
181 /* Set up Op-code, Phy Address, and register offset in the MDI in igb_write_phy_reg_mdic()
187 (phy->addr << E1000_MDIC_PHY_SHIFT) | in igb_write_phy_reg_mdic()
204 ret_val = -E1000_ERR_PHY; in igb_write_phy_reg_mdic()
209 ret_val = -E1000_ERR_PHY; in igb_write_phy_reg_mdic()
218 * igb_read_phy_reg_i2c - Read PHY register using i2c
219 * @hw: pointer to the HW structure
226 s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data) in igb_read_phy_reg_i2c() argument
228 struct e1000_phy_info *phy = &hw->phy; in igb_read_phy_reg_i2c()
231 /* Set up Op-code, Phy Address, and register address in the I2CCMD in igb_read_phy_reg_i2c()
236 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) | in igb_read_phy_reg_i2c()
250 return -E1000_ERR_PHY; in igb_read_phy_reg_i2c()
254 return -E1000_ERR_PHY; in igb_read_phy_reg_i2c()
257 /* Need to byte-swap the 16-bit value. */ in igb_read_phy_reg_i2c()
264 * igb_write_phy_reg_i2c - Write PHY register using i2c
265 * @hw: pointer to the HW structure
271 s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data) in igb_write_phy_reg_i2c() argument
273 struct e1000_phy_info *phy = &hw->phy; in igb_write_phy_reg_i2c()
278 if ((hw->phy.addr == 0) || (hw->phy.addr > 7)) { in igb_write_phy_reg_i2c()
280 hw->phy.addr); in igb_write_phy_reg_i2c()
281 return -E1000_ERR_CONFIG; in igb_write_phy_reg_i2c()
287 /* Set up Op-code, Phy Address, and register address in the I2CCMD in igb_write_phy_reg_i2c()
292 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) | in igb_write_phy_reg_i2c()
307 return -E1000_ERR_PHY; in igb_write_phy_reg_i2c()
311 return -E1000_ERR_PHY; in igb_write_phy_reg_i2c()
318 * igb_read_sfp_data_byte - Reads SFP module data.
319 * @hw: pointer to the HW structure
330 s32 igb_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data) in igb_read_sfp_data_byte() argument
338 return -E1000_ERR_PHY; in igb_read_sfp_data_byte()
341 /* Set up Op-code, EEPROM Address,in the I2CCMD in igb_read_sfp_data_byte()
359 return -E1000_ERR_PHY; in igb_read_sfp_data_byte()
363 return -E1000_ERR_PHY; in igb_read_sfp_data_byte()
371 * igb_read_phy_reg_igp - Read igp PHY register
372 * @hw: pointer to the HW structure
380 s32 igb_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) in igb_read_phy_reg_igp() argument
384 if (!(hw->phy.ops.acquire)) in igb_read_phy_reg_igp()
387 ret_val = hw->phy.ops.acquire(hw); in igb_read_phy_reg_igp()
392 ret_val = igb_write_phy_reg_mdic(hw, in igb_read_phy_reg_igp()
396 hw->phy.ops.release(hw); in igb_read_phy_reg_igp()
401 ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, in igb_read_phy_reg_igp()
404 hw->phy.ops.release(hw); in igb_read_phy_reg_igp()
411 * igb_write_phy_reg_igp - Write igp PHY register
412 * @hw: pointer to the HW structure
419 s32 igb_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) in igb_write_phy_reg_igp() argument
423 if (!(hw->phy.ops.acquire)) in igb_write_phy_reg_igp()
426 ret_val = hw->phy.ops.acquire(hw); in igb_write_phy_reg_igp()
431 ret_val = igb_write_phy_reg_mdic(hw, in igb_write_phy_reg_igp()
435 hw->phy.ops.release(hw); in igb_write_phy_reg_igp()
440 ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, in igb_write_phy_reg_igp()
443 hw->phy.ops.release(hw); in igb_write_phy_reg_igp()
450 * igb_copper_link_setup_82580 - Setup 82580 PHY for copper link
451 * @hw: pointer to the HW structure
453 * Sets up Carrier-sense on Transmit and downshift values.
455 s32 igb_copper_link_setup_82580(struct e1000_hw *hw) in igb_copper_link_setup_82580() argument
457 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_82580()
461 if (phy->reset_disable) { in igb_copper_link_setup_82580()
466 if (phy->type == e1000_phy_82580) { in igb_copper_link_setup_82580()
467 ret_val = hw->phy.ops.reset(hw); in igb_copper_link_setup_82580()
474 /* Enable CRS on TX. This must be set for half-duplex operation. */ in igb_copper_link_setup_82580()
475 ret_val = phy->ops.read_reg(hw, I82580_CFG_REG, &phy_data); in igb_copper_link_setup_82580()
484 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data); in igb_copper_link_setup_82580()
489 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data); in igb_copper_link_setup_82580()
494 * 0 - Auto (default) in igb_copper_link_setup_82580()
495 * 1 - MDI mode in igb_copper_link_setup_82580()
496 * 2 - MDI-X mode in igb_copper_link_setup_82580()
498 switch (hw->phy.mdix) { in igb_copper_link_setup_82580()
509 ret_val = hw->phy.ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); in igb_copper_link_setup_82580()
516 * igb_copper_link_setup_m88 - Setup m88 PHY's for copper link
517 * @hw: pointer to the HW structure
519 * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock
522 s32 igb_copper_link_setup_m88(struct e1000_hw *hw) in igb_copper_link_setup_m88() argument
524 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_m88()
528 if (phy->reset_disable) { in igb_copper_link_setup_m88()
533 /* Enable CRS on TX. This must be set for half-duplex operation. */ in igb_copper_link_setup_m88()
534 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_copper_link_setup_m88()
541 * MDI/MDI-X = 0 (default) in igb_copper_link_setup_m88()
542 * 0 - Auto for all speeds in igb_copper_link_setup_m88()
543 * 1 - MDI mode in igb_copper_link_setup_m88()
544 * 2 - MDI-X mode in igb_copper_link_setup_m88()
545 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in igb_copper_link_setup_m88()
549 switch (phy->mdix) { in igb_copper_link_setup_m88()
568 * 0 - Disabled in igb_copper_link_setup_m88()
569 * 1 - Enabled in igb_copper_link_setup_m88()
572 if (phy->disable_polarity_correction == 1) in igb_copper_link_setup_m88()
575 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_copper_link_setup_m88()
579 if (phy->revision < E1000_REVISION_4) { in igb_copper_link_setup_m88()
583 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in igb_copper_link_setup_m88()
590 if ((phy->revision == E1000_REVISION_2) && in igb_copper_link_setup_m88()
591 (phy->id == M88E1111_I_PHY_ID)) { in igb_copper_link_setup_m88()
592 /* 82573L PHY - set the downshift counter to 5x. */ in igb_copper_link_setup_m88()
602 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in igb_copper_link_setup_m88()
609 ret_val = igb_phy_sw_reset(hw); in igb_copper_link_setup_m88()
620 * igb_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link
621 * @hw: pointer to the HW structure
623 * Sets up MDI/MDI-X and polarity for i347-AT4, m88e1322 and m88e1112 PHY's.
626 s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw) in igb_copper_link_setup_m88_gen2() argument
628 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_m88_gen2()
632 if (phy->reset_disable) in igb_copper_link_setup_m88_gen2()
635 /* Enable CRS on Tx. This must be set for half-duplex operation. */ in igb_copper_link_setup_m88_gen2()
636 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_copper_link_setup_m88_gen2()
641 * MDI/MDI-X = 0 (default) in igb_copper_link_setup_m88_gen2()
642 * 0 - Auto for all speeds in igb_copper_link_setup_m88_gen2()
643 * 1 - MDI mode in igb_copper_link_setup_m88_gen2()
644 * 2 - MDI-X mode in igb_copper_link_setup_m88_gen2()
645 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in igb_copper_link_setup_m88_gen2()
649 switch (phy->mdix) { in igb_copper_link_setup_m88_gen2()
658 if (phy->id != M88E1112_E_PHY_ID) { in igb_copper_link_setup_m88_gen2()
672 * 0 - Disabled in igb_copper_link_setup_m88_gen2()
673 * 1 - Enabled in igb_copper_link_setup_m88_gen2()
676 if (phy->disable_polarity_correction == 1) in igb_copper_link_setup_m88_gen2()
680 if (phy->id == M88E1543_E_PHY_ID) { in igb_copper_link_setup_m88_gen2()
683 phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_copper_link_setup_m88_gen2()
687 ret_val = igb_phy_sw_reset(hw); in igb_copper_link_setup_m88_gen2()
698 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_copper_link_setup_m88_gen2()
703 ret_val = igb_phy_sw_reset(hw); in igb_copper_link_setup_m88_gen2()
708 ret_val = igb_set_master_slave_mode(hw); in igb_copper_link_setup_m88_gen2()
716 * igb_copper_link_setup_igp - Setup igp PHY's for copper link
717 * @hw: pointer to the HW structure
719 * Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for
722 s32 igb_copper_link_setup_igp(struct e1000_hw *hw) in igb_copper_link_setup_igp() argument
724 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_igp()
728 if (phy->reset_disable) { in igb_copper_link_setup_igp()
733 ret_val = phy->ops.reset(hw); in igb_copper_link_setup_igp()
745 * non-IGP1 PHYs. in igb_copper_link_setup_igp()
747 if (phy->type == e1000_phy_igp) { in igb_copper_link_setup_igp()
749 if (phy->ops.set_d3_lplu_state) in igb_copper_link_setup_igp()
750 ret_val = phy->ops.set_d3_lplu_state(hw, false); in igb_copper_link_setup_igp()
758 ret_val = phy->ops.set_d0_lplu_state(hw, false); in igb_copper_link_setup_igp()
763 /* Configure mdi-mdix settings */ in igb_copper_link_setup_igp()
764 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data); in igb_copper_link_setup_igp()
770 switch (phy->mdix) { in igb_copper_link_setup_igp()
782 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, data); in igb_copper_link_setup_igp()
786 /* set auto-master slave resolution settings */ in igb_copper_link_setup_igp()
787 if (hw->mac.autoneg) { in igb_copper_link_setup_igp()
792 if (phy->autoneg_advertised == ADVERTISE_1000_FULL) { in igb_copper_link_setup_igp()
794 ret_val = phy->ops.read_reg(hw, in igb_copper_link_setup_igp()
801 ret_val = phy->ops.write_reg(hw, in igb_copper_link_setup_igp()
808 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data); in igb_copper_link_setup_igp()
813 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data); in igb_copper_link_setup_igp()
818 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data); in igb_copper_link_setup_igp()
823 phy->original_ms_type = (data & CR_1000T_MS_ENABLE) ? in igb_copper_link_setup_igp()
829 switch (phy->ms_type) { in igb_copper_link_setup_igp()
842 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data); in igb_copper_link_setup_igp()
852 * igb_copper_link_autoneg - Setup/Enable autoneg for copper link
853 * @hw: pointer to the HW structure
860 static s32 igb_copper_link_autoneg(struct e1000_hw *hw) in igb_copper_link_autoneg() argument
862 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_autoneg()
869 phy->autoneg_advertised &= phy->autoneg_mask; in igb_copper_link_autoneg()
874 if (phy->autoneg_advertised == 0) in igb_copper_link_autoneg()
875 phy->autoneg_advertised = phy->autoneg_mask; in igb_copper_link_autoneg()
877 hw_dbg("Reconfiguring auto-neg advertisement params\n"); in igb_copper_link_autoneg()
878 ret_val = igb_phy_setup_autoneg(hw); in igb_copper_link_autoneg()
880 hw_dbg("Error Setting up Auto-Negotiation\n"); in igb_copper_link_autoneg()
883 hw_dbg("Restarting Auto-Neg\n"); in igb_copper_link_autoneg()
885 /* Restart auto-negotiation by setting the Auto Neg Enable bit and in igb_copper_link_autoneg()
888 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igb_copper_link_autoneg()
893 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igb_copper_link_autoneg()
897 /* Does the user want to wait for Auto-Neg to complete here, or in igb_copper_link_autoneg()
900 if (phy->autoneg_wait_to_complete) { in igb_copper_link_autoneg()
901 ret_val = igb_wait_autoneg(hw); in igb_copper_link_autoneg()
908 hw->mac.get_link_status = true; in igb_copper_link_autoneg()
915 * igb_phy_setup_autoneg - Configure PHY for auto-negotiation
916 * @hw: pointer to the HW structure
918 * Reads the MII auto-neg advertisement register and/or the 1000T control
919 * register and if the PHY is already setup for auto-negotiation, then
920 * return successful. Otherwise, setup advertisement and flow control to
921 * the appropriate values for the wanted auto-negotiation.
923 static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) in igb_phy_setup_autoneg() argument
925 struct e1000_phy_info *phy = &hw->phy; in igb_phy_setup_autoneg()
930 phy->autoneg_advertised &= phy->autoneg_mask; in igb_phy_setup_autoneg()
932 /* Read the MII Auto-Neg Advertisement Register (Address 4). */ in igb_phy_setup_autoneg()
933 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); in igb_phy_setup_autoneg()
937 if (phy->autoneg_mask & ADVERTISE_1000_FULL) { in igb_phy_setup_autoneg()
938 /* Read the MII 1000Base-T Control Register (Address 9). */ in igb_phy_setup_autoneg()
939 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, in igb_phy_setup_autoneg()
952 /* First we clear all the 10/100 mb speed bits in the Auto-Neg in igb_phy_setup_autoneg()
954 * the 1000Base-T Control Register (Address 9). in igb_phy_setup_autoneg()
962 hw_dbg("autoneg_advertised %x\n", phy->autoneg_advertised); in igb_phy_setup_autoneg()
965 if (phy->autoneg_advertised & ADVERTISE_10_HALF) { in igb_phy_setup_autoneg()
971 if (phy->autoneg_advertised & ADVERTISE_10_FULL) { in igb_phy_setup_autoneg()
977 if (phy->autoneg_advertised & ADVERTISE_100_HALF) { in igb_phy_setup_autoneg()
983 if (phy->autoneg_advertised & ADVERTISE_100_FULL) { in igb_phy_setup_autoneg()
989 if (phy->autoneg_advertised & ADVERTISE_1000_HALF) in igb_phy_setup_autoneg()
993 if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { in igb_phy_setup_autoneg()
998 /* Check for a software override of the flow control settings, and in igb_phy_setup_autoneg()
1000 * auto-negotiation is enabled, then software will have to set the in igb_phy_setup_autoneg()
1001 * "PAUSE" bits to the correct value in the Auto-Negotiation in igb_phy_setup_autoneg()
1002 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto- in igb_phy_setup_autoneg()
1006 * 0: Flow control is completely disabled in igb_phy_setup_autoneg()
1007 * 1: Rx flow control is enabled (we can receive pause frames in igb_phy_setup_autoneg()
1009 * 2: Tx flow control is enabled (we can send pause frames in igb_phy_setup_autoneg()
1011 * 3: Both Rx and TX flow control (symmetric) are enabled. in igb_phy_setup_autoneg()
1012 * other: No software override. The flow control configuration in igb_phy_setup_autoneg()
1015 switch (hw->fc.current_mode) { in igb_phy_setup_autoneg()
1017 /* Flow control (RX & TX) is completely disabled by a in igb_phy_setup_autoneg()
1018 * software over-ride. in igb_phy_setup_autoneg()
1023 /* RX Flow control is enabled, and TX Flow control is in igb_phy_setup_autoneg()
1024 * disabled, by a software over-ride. in igb_phy_setup_autoneg()
1030 * hw's ability to send PAUSE frames. in igb_phy_setup_autoneg()
1035 /* TX Flow control is enabled, and RX Flow control is in igb_phy_setup_autoneg()
1036 * disabled, by a software over-ride. in igb_phy_setup_autoneg()
1042 /* Flow control (both RX and TX) is enabled by a software in igb_phy_setup_autoneg()
1043 * over-ride. in igb_phy_setup_autoneg()
1048 hw_dbg("Flow control param set incorrectly\n"); in igb_phy_setup_autoneg()
1049 ret_val = -E1000_ERR_CONFIG; in igb_phy_setup_autoneg()
1053 ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg); in igb_phy_setup_autoneg()
1057 hw_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in igb_phy_setup_autoneg()
1059 if (phy->autoneg_mask & ADVERTISE_1000_FULL) { in igb_phy_setup_autoneg()
1060 ret_val = phy->ops.write_reg(hw, in igb_phy_setup_autoneg()
1072 * igb_setup_copper_link - Configure copper link settings
1073 * @hw: pointer to the HW structure
1075 * Calls the appropriate function to configure the link for auto-neg or forced
1077 * to configure collision distance and flow control are called. If link is
1078 * not established, we return -E1000_ERR_PHY (-2).
1080 s32 igb_setup_copper_link(struct e1000_hw *hw) in igb_setup_copper_link() argument
1085 if (hw->mac.autoneg) { in igb_setup_copper_link()
1086 /* Setup autoneg and flow control advertisement and perform in igb_setup_copper_link()
1089 ret_val = igb_copper_link_autoneg(hw); in igb_setup_copper_link()
1097 ret_val = hw->phy.ops.force_speed_duplex(hw); in igb_setup_copper_link()
1107 ret_val = igb_phy_has_link(hw, COPPER_LINK_UP_LIMIT, 10, &link); in igb_setup_copper_link()
1113 igb_config_collision_dist(hw); in igb_setup_copper_link()
1114 ret_val = igb_config_fc_after_link_up(hw); in igb_setup_copper_link()
1124 * igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY
1125 * @hw: pointer to the HW structure
1128 * auto-crossover to force MDI manually. Waits for link and returns
1129 * successful if link up is successful, else -E1000_ERR_PHY (-2).
1131 s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw) in igb_phy_force_speed_duplex_igp() argument
1133 struct e1000_phy_info *phy = &hw->phy; in igb_phy_force_speed_duplex_igp()
1138 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_igp()
1142 igb_phy_force_speed_duplex_setup(hw, &phy_data); in igb_phy_force_speed_duplex_igp()
1144 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_igp()
1148 /* Clear Auto-Crossover to force MDI manually. IGP requires MDI in igb_phy_force_speed_duplex_igp()
1151 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); in igb_phy_force_speed_duplex_igp()
1158 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data); in igb_phy_force_speed_duplex_igp()
1166 if (phy->autoneg_wait_to_complete) { in igb_phy_force_speed_duplex_igp()
1169 ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, 10000, &link); in igb_phy_force_speed_duplex_igp()
1177 ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, 10000, &link); in igb_phy_force_speed_duplex_igp()
1187 * igb_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY
1188 * @hw: pointer to the HW structure
1191 * auto-crossover to force MDI manually. Resets the PHY to commit the
1196 s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) in igb_phy_force_speed_duplex_m88() argument
1198 struct e1000_phy_info *phy = &hw->phy; in igb_phy_force_speed_duplex_m88()
1203 /* I210 and I211 devices support Auto-Crossover in forced operation. */ in igb_phy_force_speed_duplex_m88()
1204 if (phy->type != e1000_phy_i210) { in igb_phy_force_speed_duplex_m88()
1205 /* Clear Auto-Crossover to force MDI manually. M88E1000 in igb_phy_force_speed_duplex_m88()
1208 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, in igb_phy_force_speed_duplex_m88()
1214 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, in igb_phy_force_speed_duplex_m88()
1222 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_m88()
1226 igb_phy_force_speed_duplex_setup(hw, &phy_data); in igb_phy_force_speed_duplex_m88()
1228 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_m88()
1233 ret_val = igb_phy_sw_reset(hw); in igb_phy_force_speed_duplex_m88()
1237 if (phy->autoneg_wait_to_complete) { in igb_phy_force_speed_duplex_m88()
1240 ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, 100000, &link); in igb_phy_force_speed_duplex_m88()
1247 switch (hw->phy.id) { in igb_phy_force_speed_duplex_m88()
1256 if (hw->phy.type != e1000_phy_m88) in igb_phy_force_speed_duplex_m88()
1266 ret_val = phy->ops.write_reg(hw, in igb_phy_force_speed_duplex_m88()
1271 ret_val = igb_phy_reset_dsp(hw); in igb_phy_force_speed_duplex_m88()
1278 ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, in igb_phy_force_speed_duplex_m88()
1284 if (hw->phy.type != e1000_phy_m88 || in igb_phy_force_speed_duplex_m88()
1285 hw->phy.id == I347AT4_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1286 hw->phy.id == M88E1112_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1287 hw->phy.id == M88E1543_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1288 hw->phy.id == M88E1512_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1289 hw->phy.id == I210_I_PHY_ID) in igb_phy_force_speed_duplex_m88()
1292 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data); in igb_phy_force_speed_duplex_m88()
1296 /* Resetting the phy means we need to re-force TX_CLK in the in igb_phy_force_speed_duplex_m88()
1301 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data); in igb_phy_force_speed_duplex_m88()
1305 /* In addition, we must re-enable CRS on Tx for both half and full in igb_phy_force_speed_duplex_m88()
1308 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_phy_force_speed_duplex_m88()
1313 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_phy_force_speed_duplex_m88()
1320 * igb_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex
1321 * @hw: pointer to the HW structure
1324 * Forces speed and duplex on the PHY by doing the following: disable flow
1326 * disable auto-negotiation, configure duplex, configure speed, configure
1327 * the collision distance, write configuration to CTRL register. The
1331 static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, in igb_phy_force_speed_duplex_setup() argument
1334 struct e1000_mac_info *mac = &hw->mac; in igb_phy_force_speed_duplex_setup()
1335 u32 ctrl; in igb_phy_force_speed_duplex_setup() local
1337 /* Turn off flow control when forcing speed/duplex */ in igb_phy_force_speed_duplex_setup()
1338 hw->fc.current_mode = e1000_fc_none; in igb_phy_force_speed_duplex_setup()
1341 ctrl = rd32(E1000_CTRL); in igb_phy_force_speed_duplex_setup()
1342 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in igb_phy_force_speed_duplex_setup()
1343 ctrl &= ~E1000_CTRL_SPD_SEL; in igb_phy_force_speed_duplex_setup()
1346 ctrl &= ~E1000_CTRL_ASDE; in igb_phy_force_speed_duplex_setup()
1352 if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { in igb_phy_force_speed_duplex_setup()
1353 ctrl &= ~E1000_CTRL_FD; in igb_phy_force_speed_duplex_setup()
1357 ctrl |= E1000_CTRL_FD; in igb_phy_force_speed_duplex_setup()
1363 if (mac->forced_speed_duplex & E1000_ALL_100_SPEED) { in igb_phy_force_speed_duplex_setup()
1364 ctrl |= E1000_CTRL_SPD_100; in igb_phy_force_speed_duplex_setup()
1369 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); in igb_phy_force_speed_duplex_setup()
1375 igb_config_collision_dist(hw); in igb_phy_force_speed_duplex_setup()
1377 wr32(E1000_CTRL, ctrl); in igb_phy_force_speed_duplex_setup()
1381 * igb_set_d3_lplu_state - Sets low power link up state for D3
1382 * @hw: pointer to the HW structure
1394 s32 igb_set_d3_lplu_state(struct e1000_hw *hw, bool active) in igb_set_d3_lplu_state() argument
1396 struct e1000_phy_info *phy = &hw->phy; in igb_set_d3_lplu_state()
1400 if (!(hw->phy.ops.read_reg)) in igb_set_d3_lplu_state()
1403 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in igb_set_d3_lplu_state()
1409 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in igb_set_d3_lplu_state()
1418 if (phy->smart_speed == e1000_smart_speed_on) { in igb_set_d3_lplu_state()
1419 ret_val = phy->ops.read_reg(hw, in igb_set_d3_lplu_state()
1426 ret_val = phy->ops.write_reg(hw, in igb_set_d3_lplu_state()
1431 } else if (phy->smart_speed == e1000_smart_speed_off) { in igb_set_d3_lplu_state()
1432 ret_val = phy->ops.read_reg(hw, in igb_set_d3_lplu_state()
1439 ret_val = phy->ops.write_reg(hw, in igb_set_d3_lplu_state()
1445 } else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) || in igb_set_d3_lplu_state()
1446 (phy->autoneg_advertised == E1000_ALL_NOT_GIG) || in igb_set_d3_lplu_state()
1447 (phy->autoneg_advertised == E1000_ALL_10_SPEED)) { in igb_set_d3_lplu_state()
1449 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in igb_set_d3_lplu_state()
1455 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in igb_set_d3_lplu_state()
1461 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in igb_set_d3_lplu_state()
1470 * igb_check_downshift - Checks whether a downshift in speed occurred
1471 * @hw: pointer to the HW structure
1477 s32 igb_check_downshift(struct e1000_hw *hw) in igb_check_downshift() argument
1479 struct e1000_phy_info *phy = &hw->phy; in igb_check_downshift()
1483 switch (phy->type) { in igb_check_downshift()
1498 phy->speed_downgraded = false; in igb_check_downshift()
1503 ret_val = phy->ops.read_reg(hw, offset, &phy_data); in igb_check_downshift()
1506 phy->speed_downgraded = (phy_data & mask) ? true : false; in igb_check_downshift()
1513 * igb_check_polarity_m88 - Checks the polarity.
1514 * @hw: pointer to the HW structure
1516 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
1520 s32 igb_check_polarity_m88(struct e1000_hw *hw) in igb_check_polarity_m88() argument
1522 struct e1000_phy_info *phy = &hw->phy; in igb_check_polarity_m88()
1526 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data); in igb_check_polarity_m88()
1529 phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY) in igb_check_polarity_m88()
1537 * igb_check_polarity_igp - Checks the polarity.
1538 * @hw: pointer to the HW structure
1540 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
1545 static s32 igb_check_polarity_igp(struct e1000_hw *hw) in igb_check_polarity_igp() argument
1547 struct e1000_phy_info *phy = &hw->phy; in igb_check_polarity_igp()
1554 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data); in igb_check_polarity_igp()
1570 ret_val = phy->ops.read_reg(hw, offset, &data); in igb_check_polarity_igp()
1573 phy->cable_polarity = (data & mask) in igb_check_polarity_igp()
1582 * igb_wait_autoneg - Wait for auto-neg completion
1583 * @hw: pointer to the HW structure
1585 * Waits for auto-negotiation to complete or for the auto-negotiation time
1588 static s32 igb_wait_autoneg(struct e1000_hw *hw) in igb_wait_autoneg() argument
1594 for (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) { in igb_wait_autoneg()
1595 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_wait_autoneg()
1598 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_wait_autoneg()
1606 /* PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation in igb_wait_autoneg()
1613 * igb_phy_has_link - Polls PHY for link
1614 * @hw: pointer to the HW structure
1621 s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations, in igb_phy_has_link() argument
1632 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_phy_has_link()
1643 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_phy_has_link()
1660 * igb_get_cable_length_m88 - Determine cable length for m88 PHY
1661 * @hw: pointer to the HW structure
1669 * 1 50 - 80 meters
1670 * 2 80 - 110 meters
1671 * 3 110 - 140 meters
1674 s32 igb_get_cable_length_m88(struct e1000_hw *hw) in igb_get_cable_length_m88() argument
1676 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_m88()
1680 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in igb_get_cable_length_m88()
1686 if (index >= ARRAY_SIZE(e1000_m88_cable_length_table) - 1) { in igb_get_cable_length_m88()
1687 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_m88()
1691 phy->min_cable_length = e1000_m88_cable_length_table[index]; in igb_get_cable_length_m88()
1692 phy->max_cable_length = e1000_m88_cable_length_table[index + 1]; in igb_get_cable_length_m88()
1694 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2; in igb_get_cable_length_m88()
1700 s32 igb_get_cable_length_m88_gen2(struct e1000_hw *hw) in igb_get_cable_length_m88_gen2() argument
1702 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_m88_gen2()
1709 switch (hw->phy.id) { in igb_get_cable_length_m88_gen2()
1715 ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1720 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x07); in igb_get_cable_length_m88_gen2()
1725 ret_val = phy->ops.read_reg(hw, I347AT4_PCDC, &phy_data2); in igb_get_cable_length_m88_gen2()
1732 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL0, &phy_data); in igb_get_cable_length_m88_gen2()
1736 phy->pair_length[0] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1737 len_tot = phy->pair_length[0]; in igb_get_cable_length_m88_gen2()
1738 len_min = phy->pair_length[0]; in igb_get_cable_length_m88_gen2()
1739 len_max = phy->pair_length[0]; in igb_get_cable_length_m88_gen2()
1742 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL1, &phy_data); in igb_get_cable_length_m88_gen2()
1746 phy->pair_length[1] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1747 len_tot += phy->pair_length[1]; in igb_get_cable_length_m88_gen2()
1748 len_min = min(len_min, phy->pair_length[1]); in igb_get_cable_length_m88_gen2()
1749 len_max = max(len_max, phy->pair_length[1]); in igb_get_cable_length_m88_gen2()
1752 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL2, &phy_data); in igb_get_cable_length_m88_gen2()
1756 phy->pair_length[2] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1757 len_tot += phy->pair_length[2]; in igb_get_cable_length_m88_gen2()
1758 len_min = min(len_min, phy->pair_length[2]); in igb_get_cable_length_m88_gen2()
1759 len_max = max(len_max, phy->pair_length[2]); in igb_get_cable_length_m88_gen2()
1762 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL3, &phy_data); in igb_get_cable_length_m88_gen2()
1766 phy->pair_length[3] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1767 len_tot += phy->pair_length[3]; in igb_get_cable_length_m88_gen2()
1768 len_min = min(len_min, phy->pair_length[3]); in igb_get_cable_length_m88_gen2()
1769 len_max = max(len_max, phy->pair_length[3]); in igb_get_cable_length_m88_gen2()
1772 phy->min_cable_length = len_min; in igb_get_cable_length_m88_gen2()
1773 phy->max_cable_length = len_max; in igb_get_cable_length_m88_gen2()
1774 phy->cable_length = len_tot / 4; in igb_get_cable_length_m88_gen2()
1777 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1784 ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1789 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x05); in igb_get_cable_length_m88_gen2()
1793 ret_val = phy->ops.read_reg(hw, M88E1112_VCT_DSP_DISTANCE, in igb_get_cable_length_m88_gen2()
1800 if (index >= ARRAY_SIZE(e1000_m88_cable_length_table) - 1) { in igb_get_cable_length_m88_gen2()
1801 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_m88_gen2()
1805 phy->min_cable_length = e1000_m88_cable_length_table[index]; in igb_get_cable_length_m88_gen2()
1806 phy->max_cable_length = e1000_m88_cable_length_table[index + 1]; in igb_get_cable_length_m88_gen2()
1808 phy->cable_length = (phy->min_cable_length + in igb_get_cable_length_m88_gen2()
1809 phy->max_cable_length) / 2; in igb_get_cable_length_m88_gen2()
1812 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1819 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_m88_gen2()
1828 * igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY
1829 * @hw: pointer to the HW structure
1838 s32 igb_get_cable_length_igp_2(struct e1000_hw *hw) in igb_get_cable_length_igp_2() argument
1840 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_igp_2()
1844 u16 min_agc_index = ARRAY_SIZE(e1000_igp_2_cable_length_table) - 1; in igb_get_cable_length_igp_2()
1854 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data); in igb_get_cable_length_igp_2()
1869 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_igp_2()
1884 agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] + in igb_get_cable_length_igp_2()
1886 agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2); in igb_get_cable_length_igp_2()
1888 /* Calculate cable length with the error range of +/- 10 meters. */ in igb_get_cable_length_igp_2()
1889 phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ? in igb_get_cable_length_igp_2()
1890 (agc_value - IGP02E1000_AGC_RANGE) : 0; in igb_get_cable_length_igp_2()
1891 phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE; in igb_get_cable_length_igp_2()
1893 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2; in igb_get_cable_length_igp_2()
1900 * igb_get_phy_info_m88 - Retrieve PHY information
1901 * @hw: pointer to the HW structure
1905 * determine the polarity and 10base-T extended distance. Read the PHY
1909 s32 igb_get_phy_info_m88(struct e1000_hw *hw) in igb_get_phy_info_m88() argument
1911 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_info_m88()
1916 if (phy->media_type != e1000_media_type_copper) { in igb_get_phy_info_m88()
1918 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_m88()
1922 ret_val = igb_phy_has_link(hw, 1, 0, &link); in igb_get_phy_info_m88()
1928 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_m88()
1932 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_get_phy_info_m88()
1936 phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL) in igb_get_phy_info_m88()
1939 ret_val = igb_check_polarity_m88(hw); in igb_get_phy_info_m88()
1943 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in igb_get_phy_info_m88()
1947 phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX) ? true : false; in igb_get_phy_info_m88()
1950 ret_val = phy->ops.get_cable_length(hw); in igb_get_phy_info_m88()
1954 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in igb_get_phy_info_m88()
1958 phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS) in igb_get_phy_info_m88()
1962 phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS) in igb_get_phy_info_m88()
1967 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; in igb_get_phy_info_m88()
1968 phy->local_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_m88()
1969 phy->remote_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_m88()
1977 * igb_get_phy_info_igp - Retrieve igp PHY information
1978 * @hw: pointer to the HW structure
1981 * set/determine 10base-T extended distance and polarity correction. Read
1985 s32 igb_get_phy_info_igp(struct e1000_hw *hw) in igb_get_phy_info_igp() argument
1987 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_info_igp()
1992 ret_val = igb_phy_has_link(hw, 1, 0, &link); in igb_get_phy_info_igp()
1998 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_igp()
2002 phy->polarity_correction = true; in igb_get_phy_info_igp()
2004 ret_val = igb_check_polarity_igp(hw); in igb_get_phy_info_igp()
2008 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data); in igb_get_phy_info_igp()
2012 phy->is_mdix = (data & IGP01E1000_PSSR_MDIX) ? true : false; in igb_get_phy_info_igp()
2016 ret_val = phy->ops.get_cable_length(hw); in igb_get_phy_info_igp()
2020 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data); in igb_get_phy_info_igp()
2024 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS) in igb_get_phy_info_igp()
2028 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS) in igb_get_phy_info_igp()
2032 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; in igb_get_phy_info_igp()
2033 phy->local_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_igp()
2034 phy->remote_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_igp()
2042 * igb_phy_sw_reset - PHY software reset
2043 * @hw: pointer to the HW structure
2048 s32 igb_phy_sw_reset(struct e1000_hw *hw) in igb_phy_sw_reset() argument
2053 if (!(hw->phy.ops.read_reg)) in igb_phy_sw_reset()
2056 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igb_phy_sw_reset()
2061 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igb_phy_sw_reset()
2072 * igb_phy_hw_reset - PHY hardware reset
2073 * @hw: pointer to the HW structure
2080 s32 igb_phy_hw_reset(struct e1000_hw *hw) in igb_phy_hw_reset() argument
2082 struct e1000_phy_info *phy = &hw->phy; in igb_phy_hw_reset()
2084 u32 ctrl; in igb_phy_hw_reset() local
2086 ret_val = igb_check_reset_block(hw); in igb_phy_hw_reset()
2092 ret_val = phy->ops.acquire(hw); in igb_phy_hw_reset()
2096 ctrl = rd32(E1000_CTRL); in igb_phy_hw_reset()
2097 wr32(E1000_CTRL, ctrl | E1000_CTRL_PHY_RST); in igb_phy_hw_reset()
2100 udelay(phy->reset_delay_us); in igb_phy_hw_reset()
2102 wr32(E1000_CTRL, ctrl); in igb_phy_hw_reset()
2107 phy->ops.release(hw); in igb_phy_hw_reset()
2109 ret_val = phy->ops.get_cfg_done(hw); in igb_phy_hw_reset()
2116 * igb_phy_init_script_igp3 - Inits the IGP3 PHY
2117 * @hw: pointer to the HW structure
2121 s32 igb_phy_init_script_igp3(struct e1000_hw *hw) in igb_phy_init_script_igp3() argument
2126 /* Enable rise/fall, 10-mode work in class-A */ in igb_phy_init_script_igp3()
2127 hw->phy.ops.write_reg(hw, 0x2F5B, 0x9018); in igb_phy_init_script_igp3()
2129 hw->phy.ops.write_reg(hw, 0x2F52, 0x0000); in igb_phy_init_script_igp3()
2131 hw->phy.ops.write_reg(hw, 0x2FB1, 0x8B24); in igb_phy_init_script_igp3()
2133 hw->phy.ops.write_reg(hw, 0x2FB2, 0xF8F0); in igb_phy_init_script_igp3()
2135 hw->phy.ops.write_reg(hw, 0x2010, 0x10B0); in igb_phy_init_script_igp3()
2137 hw->phy.ops.write_reg(hw, 0x2011, 0x0000); in igb_phy_init_script_igp3()
2139 hw->phy.ops.write_reg(hw, 0x20DD, 0x249A); in igb_phy_init_script_igp3()
2141 hw->phy.ops.write_reg(hw, 0x20DE, 0x00D3); in igb_phy_init_script_igp3()
2143 hw->phy.ops.write_reg(hw, 0x28B4, 0x04CE); in igb_phy_init_script_igp3()
2145 hw->phy.ops.write_reg(hw, 0x2F70, 0x29E4); in igb_phy_init_script_igp3()
2147 hw->phy.ops.write_reg(hw, 0x0000, 0x0140); in igb_phy_init_script_igp3()
2149 hw->phy.ops.write_reg(hw, 0x1F30, 0x1606); in igb_phy_init_script_igp3()
2151 hw->phy.ops.write_reg(hw, 0x1F31, 0xB814); in igb_phy_init_script_igp3()
2153 hw->phy.ops.write_reg(hw, 0x1F35, 0x002A); in igb_phy_init_script_igp3()
2155 hw->phy.ops.write_reg(hw, 0x1F3E, 0x0067); in igb_phy_init_script_igp3()
2157 hw->phy.ops.write_reg(hw, 0x1F54, 0x0065); in igb_phy_init_script_igp3()
2159 hw->phy.ops.write_reg(hw, 0x1F55, 0x002A); in igb_phy_init_script_igp3()
2161 hw->phy.ops.write_reg(hw, 0x1F56, 0x002A); in igb_phy_init_script_igp3()
2163 hw->phy.ops.write_reg(hw, 0x1F72, 0x3FB0); in igb_phy_init_script_igp3()
2165 hw->phy.ops.write_reg(hw, 0x1F76, 0xC0FF); in igb_phy_init_script_igp3()
2167 hw->phy.ops.write_reg(hw, 0x1F77, 0x1DEC); in igb_phy_init_script_igp3()
2169 hw->phy.ops.write_reg(hw, 0x1F78, 0xF9EF); in igb_phy_init_script_igp3()
2171 hw->phy.ops.write_reg(hw, 0x1F79, 0x0210); in igb_phy_init_script_igp3()
2173 hw->phy.ops.write_reg(hw, 0x1895, 0x0003); in igb_phy_init_script_igp3()
2175 hw->phy.ops.write_reg(hw, 0x1796, 0x0008); in igb_phy_init_script_igp3()
2177 hw->phy.ops.write_reg(hw, 0x1798, 0xD008); in igb_phy_init_script_igp3()
2181 hw->phy.ops.write_reg(hw, 0x1898, 0xD918); in igb_phy_init_script_igp3()
2183 hw->phy.ops.write_reg(hw, 0x187A, 0x0800); in igb_phy_init_script_igp3()
2184 /* Enable LPLU and disable AN to 1000 in non-D0a states, in igb_phy_init_script_igp3()
2187 hw->phy.ops.write_reg(hw, 0x0019, 0x008D); in igb_phy_init_script_igp3()
2189 hw->phy.ops.write_reg(hw, 0x001B, 0x2080); in igb_phy_init_script_igp3()
2191 hw->phy.ops.write_reg(hw, 0x0014, 0x0045); in igb_phy_init_script_igp3()
2193 hw->phy.ops.write_reg(hw, 0x0000, 0x1340); in igb_phy_init_script_igp3()
2199 * igb_initialize_M88E1512_phy - Initialize M88E1512 PHY
2200 * @hw: pointer to the HW structure
2204 s32 igb_initialize_M88E1512_phy(struct e1000_hw *hw) in igb_initialize_M88E1512_phy() argument
2206 struct e1000_phy_info *phy = &hw->phy; in igb_initialize_M88E1512_phy()
2210 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in igb_initialize_M88E1512_phy()
2214 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in igb_initialize_M88E1512_phy()
2218 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in igb_initialize_M88E1512_phy()
2222 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in igb_initialize_M88E1512_phy()
2226 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in igb_initialize_M88E1512_phy()
2230 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in igb_initialize_M88E1512_phy()
2234 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in igb_initialize_M88E1512_phy()
2238 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xCC0C); in igb_initialize_M88E1512_phy()
2242 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in igb_initialize_M88E1512_phy()
2247 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in igb_initialize_M88E1512_phy()
2251 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x000D); in igb_initialize_M88E1512_phy()
2256 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in igb_initialize_M88E1512_phy()
2260 /* Change mode to SGMII-to-Copper */ in igb_initialize_M88E1512_phy()
2261 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in igb_initialize_M88E1512_phy()
2266 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in igb_initialize_M88E1512_phy()
2270 ret_val = igb_phy_sw_reset(hw); in igb_initialize_M88E1512_phy()
2283 * igb_initialize_M88E1543_phy - Initialize M88E1512 PHY
2284 * @hw: pointer to the HW structure
2288 s32 igb_initialize_M88E1543_phy(struct e1000_hw *hw) in igb_initialize_M88E1543_phy() argument
2290 struct e1000_phy_info *phy = &hw->phy; in igb_initialize_M88E1543_phy()
2294 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in igb_initialize_M88E1543_phy()
2298 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in igb_initialize_M88E1543_phy()
2302 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in igb_initialize_M88E1543_phy()
2306 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in igb_initialize_M88E1543_phy()
2310 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in igb_initialize_M88E1543_phy()
2314 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in igb_initialize_M88E1543_phy()
2318 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in igb_initialize_M88E1543_phy()
2322 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xDC0C); in igb_initialize_M88E1543_phy()
2326 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in igb_initialize_M88E1543_phy()
2331 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in igb_initialize_M88E1543_phy()
2335 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x0C0D); in igb_initialize_M88E1543_phy()
2340 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in igb_initialize_M88E1543_phy()
2344 /* Change mode to SGMII-to-Copper */ in igb_initialize_M88E1543_phy()
2345 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in igb_initialize_M88E1543_phy()
2350 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x1); in igb_initialize_M88E1543_phy()
2354 /* Change mode to 1000BASE-X/SGMII and autoneg enable */ in igb_initialize_M88E1543_phy()
2355 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_FIBER_CTRL, 0x9140); in igb_initialize_M88E1543_phy()
2360 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in igb_initialize_M88E1543_phy()
2364 ret_val = igb_phy_sw_reset(hw); in igb_initialize_M88E1543_phy()
2377 * igb_power_up_phy_copper - Restore copper link in case of PHY power down
2378 * @hw: pointer to the HW structure
2383 void igb_power_up_phy_copper(struct e1000_hw *hw) in igb_power_up_phy_copper() argument
2388 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igb_power_up_phy_copper()
2390 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igb_power_up_phy_copper()
2394 * igb_power_down_phy_copper - Power down copper PHY
2395 * @hw: pointer to the HW structure
2400 void igb_power_down_phy_copper(struct e1000_hw *hw) in igb_power_down_phy_copper() argument
2405 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igb_power_down_phy_copper()
2407 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igb_power_down_phy_copper()
2412 * igb_check_polarity_82580 - Checks the polarity.
2413 * @hw: pointer to the HW structure
2415 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
2419 static s32 igb_check_polarity_82580(struct e1000_hw *hw) in igb_check_polarity_82580() argument
2421 struct e1000_phy_info *phy = &hw->phy; in igb_check_polarity_82580()
2426 ret_val = phy->ops.read_reg(hw, I82580_PHY_STATUS_2, &data); in igb_check_polarity_82580()
2429 phy->cable_polarity = (data & I82580_PHY_STATUS2_REV_POLARITY) in igb_check_polarity_82580()
2437 * igb_phy_force_speed_duplex_82580 - Force speed/duplex for I82580 PHY
2438 * @hw: pointer to the HW structure
2441 * auto-crossover to force MDI manually. Waits for link and returns
2442 * successful if link up is successful, else -E1000_ERR_PHY (-2).
2444 s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw) in igb_phy_force_speed_duplex_82580() argument
2446 struct e1000_phy_info *phy = &hw->phy; in igb_phy_force_speed_duplex_82580()
2451 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_82580()
2455 igb_phy_force_speed_duplex_setup(hw, &phy_data); in igb_phy_force_speed_duplex_82580()
2457 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_82580()
2461 /* Clear Auto-Crossover to force MDI manually. 82580 requires MDI in igb_phy_force_speed_duplex_82580()
2464 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data); in igb_phy_force_speed_duplex_82580()
2470 ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); in igb_phy_force_speed_duplex_82580()
2478 if (phy->autoneg_wait_to_complete) { in igb_phy_force_speed_duplex_82580()
2481 ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, 100000, &link); in igb_phy_force_speed_duplex_82580()
2489 ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, 100000, &link); in igb_phy_force_speed_duplex_82580()
2499 * igb_get_phy_info_82580 - Retrieve I82580 PHY information
2500 * @hw: pointer to the HW structure
2503 * set/determine 10base-T extended distance and polarity correction. Read
2507 s32 igb_get_phy_info_82580(struct e1000_hw *hw) in igb_get_phy_info_82580() argument
2509 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_info_82580()
2514 ret_val = igb_phy_has_link(hw, 1, 0, &link); in igb_get_phy_info_82580()
2520 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_82580()
2524 phy->polarity_correction = true; in igb_get_phy_info_82580()
2526 ret_val = igb_check_polarity_82580(hw); in igb_get_phy_info_82580()
2530 ret_val = phy->ops.read_reg(hw, I82580_PHY_STATUS_2, &data); in igb_get_phy_info_82580()
2534 phy->is_mdix = (data & I82580_PHY_STATUS2_MDIX) ? true : false; in igb_get_phy_info_82580()
2538 ret_val = hw->phy.ops.get_cable_length(hw); in igb_get_phy_info_82580()
2542 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data); in igb_get_phy_info_82580()
2546 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS) in igb_get_phy_info_82580()
2550 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS) in igb_get_phy_info_82580()
2554 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; in igb_get_phy_info_82580()
2555 phy->local_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_82580()
2556 phy->remote_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_82580()
2564 * igb_get_cable_length_82580 - Determine cable length for 82580 PHY
2565 * @hw: pointer to the HW structure
2570 s32 igb_get_cable_length_82580(struct e1000_hw *hw) in igb_get_cable_length_82580() argument
2572 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_82580()
2576 ret_val = phy->ops.read_reg(hw, I82580_PHY_DIAG_STATUS, &phy_data); in igb_get_cable_length_82580()
2584 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_82580()
2586 phy->cable_length = length; in igb_get_cable_length_82580()
2593 * igb_set_master_slave_mode - Setup PHY for Master/slave mode
2594 * @hw: pointer to the HW structure
2598 static s32 igb_set_master_slave_mode(struct e1000_hw *hw) in igb_set_master_slave_mode() argument
2604 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data); in igb_set_master_slave_mode()
2609 hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ? in igb_set_master_slave_mode()
2614 switch (hw->phy.ms_type) { in igb_set_master_slave_mode()
2629 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data); in igb_set_master_slave_mode()