Lines Matching +full:ram +full:- +full:code
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * i40e_init_nvm_ops - Initialize NVM function pointers
14 * We are accessing FLASH always thru the Shadow RAM.
18 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
30 nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB; in i40e_init_nvm()
36 nvm->timeout = I40E_MAX_NVM_TIMEOUT; in i40e_init_nvm()
37 nvm->blank_nvm_mode = false; in i40e_init_nvm()
39 nvm->blank_nvm_mode = true; in i40e_init_nvm()
48 * i40e_acquire_nvm - Generic request for acquiring the NVM ownership
62 if (hw->nvm.blank_nvm_mode) in i40e_acquire_nvm()
71 hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime; in i40e_acquire_nvm()
76 access, time_left, ret_code, hw->aq.asq_last_status); in i40e_acquire_nvm()
89 hw->nvm.hw_semaphore_timeout = in i40e_acquire_nvm()
95 hw->nvm.hw_semaphore_timeout = 0; in i40e_acquire_nvm()
98 time_left, ret_code, hw->aq.asq_last_status); in i40e_acquire_nvm()
107 * i40e_release_nvm - Generic request for releasing the NVM ownership
117 if (hw->nvm.blank_nvm_mode) in i40e_release_nvm()
126 (total_delay < hw->aq.asq_cmd_timeout)) { in i40e_release_nvm()
136 * i40e_poll_sr_srctl_done_bit - Polls the GLNVM_SRCTL done bit
139 * Polls the SRCTL Shadow RAM register done bit.
161 * i40e_read_nvm_word_srctl - Reads Shadow RAM via SRCTL register
163 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
164 * @data: word read from the Shadow RAM
166 * Reads one 16 bit word from the Shadow RAM using the GLNVM_SRCTL register.
174 if (offset >= hw->nvm.sr_size) { in i40e_read_nvm_word_srctl()
176 "NVM read error: offset %d beyond Shadow RAM limit %d\n", in i40e_read_nvm_word_srctl()
177 offset, hw->nvm.sr_size); in i40e_read_nvm_word_srctl()
201 "NVM read error: Couldn't access Shadow RAM address: 0x%x\n", in i40e_read_nvm_word_srctl()
209 * i40e_read_nvm_aq - Read Shadow RAM.
214 * @data: buffer with words to write to the Shadow RAM
217 * Writes a 16 bit words buffer to the Shadow RAM using the admin command.
228 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_read_nvm_aq()
231 * We cannot do it for the module-based model, as we did not acquire in i40e_read_nvm_aq()
233 * Firmware will check the module-based model. in i40e_read_nvm_aq()
235 if ((offset + words) > hw->nvm.sr_size) in i40e_read_nvm_aq()
237 "NVM write error: offset %d beyond Shadow RAM limit %d\n", in i40e_read_nvm_aq()
238 (offset + words), hw->nvm.sr_size); in i40e_read_nvm_aq()
244 else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS) in i40e_read_nvm_aq()
260 * i40e_read_nvm_word_aq - Reads Shadow RAM via AQ
262 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
263 * @data: word read from the Shadow RAM
265 * Reads one 16 bit word from the Shadow RAM using the AdminQ
279 * __i40e_read_nvm_word - Reads nvm word, assumes caller does the locking
281 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
282 * @data: word read from the Shadow RAM
284 * Reads one 16 bit word from the Shadow RAM.
292 if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) in __i40e_read_nvm_word()
299 * i40e_read_nvm_word - Reads nvm word and acquire lock if necessary
301 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
302 * @data: word read from the Shadow RAM
304 * Reads one 16 bit word from the Shadow RAM.
311 if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK) in i40e_read_nvm_word()
318 if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK) in i40e_read_nvm_word()
325 * i40e_read_nvm_module_data - Reads NVM Buffer to specified memory location
349 "Reading nvm word failed.Error code: %d.\n", in i40e_read_nvm_module_data()
366 /* Pointer points outside of the Shared RAM mapped area */ in i40e_read_nvm_module_data()
368 "Reading nvm data failed. Pointer points outside of the Shared RAM mapped area.\n"); in i40e_read_nvm_module_data()
372 /* Read from the Shadow RAM */ in i40e_read_nvm_module_data()
378 "Reading nvm word failed.Error code: %d.\n", in i40e_read_nvm_module_data()
390 "Reading nvm buffer failed.Error code: %d.\n", in i40e_read_nvm_module_data()
399 * i40e_read_nvm_buffer_srctl - Reads Shadow RAM buffer via SRCTL register
401 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
403 * @data: words read from the Shadow RAM
423 /* Update the number of words read from the Shadow RAM */ in i40e_read_nvm_buffer_srctl()
430 * i40e_read_nvm_buffer_aq - Reads Shadow RAM buffer via AQ
432 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
434 * @data: words read from the Shadow RAM
456 (u16)(I40E_SR_SECTOR_SIZE_IN_WORDS - in i40e_read_nvm_buffer_aq()
459 read_size = min((*words - words_read), in i40e_read_nvm_buffer_aq()
487 * __i40e_read_nvm_buffer - Reads nvm buffer, caller must acquire lock
489 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
491 * @data: words read from the Shadow RAM
500 if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) in __i40e_read_nvm_buffer()
507 * i40e_read_nvm_buffer - Reads Shadow RAM buffer and acquire lock if necessary
509 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
511 * @data: words read from the Shadow RAM
522 if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) { in i40e_read_nvm_buffer()
537 * i40e_write_nvm_aq - Writes Shadow RAM.
542 * @data: buffer with words to write to the Shadow RAM
545 * Writes a 16 bit words buffer to the Shadow RAM using the admin command.
555 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_write_nvm_aq()
558 * We cannot do it for the module-based model, as we did not acquire in i40e_write_nvm_aq()
560 * Firmware will check the module-based model. in i40e_write_nvm_aq()
562 if ((offset + words) > hw->nvm.sr_size) in i40e_write_nvm_aq()
564 "NVM write error: offset %d beyond Shadow RAM limit %d\n", in i40e_write_nvm_aq()
565 (offset + words), hw->nvm.sr_size); in i40e_write_nvm_aq()
571 else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS) in i40e_write_nvm_aq()
588 * i40e_calc_nvm_checksum - Calculates and returns the checksum
592 * This function calculates SW Checksum that covers the whole 64kB shadow RAM
593 * except the VPD and PCIe ALT Auto-load modules. The structure and size of VPD
621 /* read pointer to PCIe Alt Auto-load module */ in i40e_calc_nvm_checksum()
629 /* Calculate SW checksum that covers the whole 64kB shadow RAM in i40e_calc_nvm_checksum()
630 * except the VPD and PCIe ALT Auto-load modules in i40e_calc_nvm_checksum()
632 for (i = 0; i < hw->nvm.sr_size; i++) { in i40e_calc_nvm_checksum()
663 *checksum = (u16)I40E_SR_SW_CHECKSUM_BASE - checksum_local; in i40e_calc_nvm_checksum()
671 * i40e_update_nvm_checksum - Updates the NVM checksum
694 * i40e_validate_nvm_checksum - Validate EEPROM checksum
801 * i40e_nvmupd_command - Process an NVM update command
805 * @perrno: pointer to return error code
824 hw->nvmupd_state, in i40e_nvmupd_command()
825 hw->nvm_release_on_done, hw->nvm_wait_opcode, in i40e_nvmupd_command()
826 cmd->command, cmd->config, cmd->offset, cmd->data_size); in i40e_nvmupd_command()
829 *perrno = -EFAULT; in i40e_nvmupd_command()
839 if (!cmd->data_size) { in i40e_nvmupd_command()
840 *perrno = -EFAULT; in i40e_nvmupd_command()
844 bytes[0] = hw->nvmupd_state; in i40e_nvmupd_command()
846 if (cmd->data_size >= 4) { in i40e_nvmupd_command()
848 *((u16 *)&bytes[2]) = hw->nvm_wait_opcode; in i40e_nvmupd_command()
852 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) in i40e_nvmupd_command()
853 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_command()
859 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) { in i40e_nvmupd_command()
862 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_command()
873 mutex_lock(&hw->aq.arq_mutex); in i40e_nvmupd_command()
874 switch (hw->nvmupd_state) { in i40e_nvmupd_command()
892 if (cmd->offset == 0xffff) { in i40e_nvmupd_command()
899 *perrno = -EBUSY; in i40e_nvmupd_command()
905 "NVMUPD: no such state %d\n", hw->nvmupd_state); in i40e_nvmupd_command()
907 *perrno = -ESRCH; in i40e_nvmupd_command()
911 mutex_unlock(&hw->aq.arq_mutex); in i40e_nvmupd_command()
916 * i40e_nvmupd_state_init - Handle NVM update state Init
920 * @perrno: pointer to return error code
939 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
950 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
956 hw->nvmupd_state = I40E_NVMUPD_STATE_READING; in i40e_nvmupd_state_init()
964 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
970 hw->nvm_release_on_done = true; in i40e_nvmupd_state_init()
971 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_erase; in i40e_nvmupd_state_init()
972 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
981 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
987 hw->nvm_release_on_done = true; in i40e_nvmupd_state_init()
988 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
989 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
998 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1004 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1005 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_init()
1014 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1018 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_init()
1020 hw->aq.asq_last_status) : in i40e_nvmupd_state_init()
1021 -EIO; in i40e_nvmupd_state_init()
1024 hw->nvm_release_on_done = true; in i40e_nvmupd_state_init()
1025 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1026 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1048 *perrno = -ESRCH; in i40e_nvmupd_state_init()
1055 * i40e_nvmupd_state_reading - Handle NVM update state Reading
1059 * @perrno: pointer to return error code
1082 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_reading()
1090 *perrno = -ESRCH; in i40e_nvmupd_state_reading()
1097 * i40e_nvmupd_state_writing - Handle NVM update state Writing
1101 * @perrno: pointer to return error code
1121 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1122 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_writing()
1129 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1131 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1132 -EIO; in i40e_nvmupd_state_writing()
1133 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1135 hw->nvm_release_on_done = true; in i40e_nvmupd_state_writing()
1136 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1137 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_writing()
1145 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1147 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1148 -EIO; in i40e_nvmupd_state_writing()
1149 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1151 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1152 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_writing()
1160 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1162 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1163 -EIO; in i40e_nvmupd_state_writing()
1164 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1166 hw->nvm_release_on_done = true; in i40e_nvmupd_state_writing()
1167 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1168 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_writing()
1177 *perrno = -ESRCH; in i40e_nvmupd_state_writing()
1181 /* In some circumstances, a multi-write transaction takes longer in i40e_nvmupd_state_writing()
1187 if (status && (hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) && in i40e_nvmupd_state_writing()
1190 u32 old_asq_status = hw->aq.asq_last_status; in i40e_nvmupd_state_writing()
1194 if (gtime >= hw->nvm.hw_semaphore_timeout) { in i40e_nvmupd_state_writing()
1197 gtime, hw->nvm.hw_semaphore_timeout); in i40e_nvmupd_state_writing()
1203 hw->aq.asq_last_status); in i40e_nvmupd_state_writing()
1205 hw->aq.asq_last_status = old_asq_status; in i40e_nvmupd_state_writing()
1217 * i40e_nvmupd_clear_wait_state - clear wait state on hw
1224 hw->nvm_wait_opcode); in i40e_nvmupd_clear_wait_state()
1226 if (hw->nvm_release_on_done) { in i40e_nvmupd_clear_wait_state()
1228 hw->nvm_release_on_done = false; in i40e_nvmupd_clear_wait_state()
1230 hw->nvm_wait_opcode = 0; in i40e_nvmupd_clear_wait_state()
1232 if (hw->aq.arq_last_status) { in i40e_nvmupd_clear_wait_state()
1233 hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR; in i40e_nvmupd_clear_wait_state()
1237 switch (hw->nvmupd_state) { in i40e_nvmupd_clear_wait_state()
1239 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_clear_wait_state()
1243 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; in i40e_nvmupd_clear_wait_state()
1252 * i40e_nvmupd_check_wait_event - handle NVM update operation events
1262 if (opcode == hw->nvm_wait_opcode) { in i40e_nvmupd_check_wait_event()
1263 memcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len); in i40e_nvmupd_check_wait_event()
1269 * i40e_nvmupd_validate_command - Validate given command
1272 * @perrno: pointer to return error code
1286 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_validate_command()
1287 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_validate_command()
1290 if ((cmd->data_size < 1) || in i40e_nvmupd_validate_command()
1291 (cmd->data_size > I40E_NVMUPD_MAX_DATA)) { in i40e_nvmupd_validate_command()
1294 cmd->data_size); in i40e_nvmupd_validate_command()
1295 *perrno = -EFAULT; in i40e_nvmupd_validate_command()
1299 switch (cmd->command) { in i40e_nvmupd_validate_command()
1364 * i40e_nvmupd_exec_aq - Run an AQ command
1368 * @perrno: pointer to return error code
1385 if (cmd->offset == 0xffff) in i40e_nvmupd_exec_aq()
1389 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_exec_aq()
1392 memset(&hw->nvm_wb_desc, 0, aq_desc_len); in i40e_nvmupd_exec_aq()
1395 if (cmd->data_size < aq_desc_len) { in i40e_nvmupd_exec_aq()
1398 cmd->data_size, aq_desc_len); in i40e_nvmupd_exec_aq()
1399 *perrno = -EINVAL; in i40e_nvmupd_exec_aq()
1405 aq_data_len = cmd->data_size - aq_desc_len; in i40e_nvmupd_exec_aq()
1406 buff_size = max_t(u32, aq_data_len, le16_to_cpu(aq_desc->datalen)); in i40e_nvmupd_exec_aq()
1408 if (!hw->nvm_buff.va) { in i40e_nvmupd_exec_aq()
1409 status = i40e_allocate_virt_mem(hw, &hw->nvm_buff, in i40e_nvmupd_exec_aq()
1410 hw->aq.asq_buf_size); in i40e_nvmupd_exec_aq()
1417 if (hw->nvm_buff.va) { in i40e_nvmupd_exec_aq()
1418 buff = hw->nvm_buff.va; in i40e_nvmupd_exec_aq()
1423 if (cmd->offset) in i40e_nvmupd_exec_aq()
1424 memset(&hw->nvm_aq_event_desc, 0, aq_desc_len); in i40e_nvmupd_exec_aq()
1433 i40e_aq_str(hw, hw->aq.asq_last_status)); in i40e_nvmupd_exec_aq()
1434 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_exec_aq()
1439 if (cmd->offset) { in i40e_nvmupd_exec_aq()
1440 hw->nvm_wait_opcode = cmd->offset; in i40e_nvmupd_exec_aq()
1441 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_exec_aq()
1448 * i40e_nvmupd_get_aq_result - Get the results from the previous exec_aq
1452 * @perrno: pointer to return error code
1468 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_wb_desc.datalen); in i40e_nvmupd_get_aq_result()
1471 if (cmd->offset > aq_total_len) { in i40e_nvmupd_get_aq_result()
1473 __func__, cmd->offset, aq_total_len); in i40e_nvmupd_get_aq_result()
1474 *perrno = -EINVAL; in i40e_nvmupd_get_aq_result()
1479 if (cmd->data_size > (aq_total_len - cmd->offset)) { in i40e_nvmupd_get_aq_result()
1480 int new_len = aq_total_len - cmd->offset; in i40e_nvmupd_get_aq_result()
1483 __func__, cmd->data_size, new_len); in i40e_nvmupd_get_aq_result()
1484 cmd->data_size = new_len; in i40e_nvmupd_get_aq_result()
1487 remainder = cmd->data_size; in i40e_nvmupd_get_aq_result()
1488 if (cmd->offset < aq_desc_len) { in i40e_nvmupd_get_aq_result()
1489 u32 len = aq_desc_len - cmd->offset; in i40e_nvmupd_get_aq_result()
1491 len = min(len, cmd->data_size); in i40e_nvmupd_get_aq_result()
1493 __func__, cmd->offset, cmd->offset + len); in i40e_nvmupd_get_aq_result()
1495 buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset; in i40e_nvmupd_get_aq_result()
1499 remainder -= len; in i40e_nvmupd_get_aq_result()
1500 buff = hw->nvm_buff.va; in i40e_nvmupd_get_aq_result()
1502 buff = hw->nvm_buff.va + (cmd->offset - aq_desc_len); in i40e_nvmupd_get_aq_result()
1506 int start_byte = buff - (u8 *)hw->nvm_buff.va; in i40e_nvmupd_get_aq_result()
1517 * i40e_nvmupd_get_aq_event - Get the Admin Queue event from previous exec_aq
1521 * @perrno: pointer to return error code
1535 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen); in i40e_nvmupd_get_aq_event()
1538 if (cmd->data_size > aq_total_len) { in i40e_nvmupd_get_aq_event()
1541 __func__, cmd->data_size, aq_total_len); in i40e_nvmupd_get_aq_event()
1542 cmd->data_size = aq_total_len; in i40e_nvmupd_get_aq_event()
1545 memcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size); in i40e_nvmupd_get_aq_event()
1551 * i40e_nvmupd_nvm_read - Read NVM
1555 * @perrno: pointer to return error code
1568 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_read()
1569 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_read()
1573 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_read()
1575 status = i40e_aq_read_nvm(hw, module, cmd->offset, (u16)cmd->data_size, in i40e_nvmupd_nvm_read()
1580 module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_read()
1583 status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_read()
1584 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_read()
1591 * i40e_nvmupd_nvm_erase - Erase an NVM module
1594 * @perrno: pointer to return error code
1607 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_erase()
1608 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_erase()
1612 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_erase()
1614 status = i40e_aq_erase_nvm(hw, module, cmd->offset, (u16)cmd->data_size, in i40e_nvmupd_nvm_erase()
1619 module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_erase()
1622 status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_erase()
1623 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_erase()
1630 * i40e_nvmupd_nvm_write - Write NVM
1634 * @perrno: pointer to return error code
1648 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_write()
1649 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_write()
1651 preservation_flags = i40e_nvmupd_get_preservation_flags(cmd->config); in i40e_nvmupd_nvm_write()
1654 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_write()
1656 status = i40e_aq_update_nvm(hw, module, cmd->offset, in i40e_nvmupd_nvm_write()
1657 (u16)cmd->data_size, bytes, last, in i40e_nvmupd_nvm_write()
1662 module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_write()
1665 status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_write()
1666 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_write()