Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
10 static s32 e1000_check_downshift(struct e1000_hw *hw);
11 static s32 e1000_check_polarity(struct e1000_hw *hw,
13 static void e1000_clear_hw_cntrs(struct e1000_hw *hw);
14 static void e1000_clear_vfta(struct e1000_hw *hw);
15 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw,
17 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw);
18 static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
19 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
20 static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
22 static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
23 static s32 e1000_id_led_init(struct e1000_hw *hw);
24 static void e1000_init_rx_addrs(struct e1000_hw *hw);
25 static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
27 static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
29 static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
30 static s32 e1000_wait_autoneg(struct e1000_hw *hw);
31 static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);
32 static s32 e1000_set_phy_type(struct e1000_hw *hw);
33 static void e1000_phy_init_script(struct e1000_hw *hw);
34 static s32 e1000_setup_copper_link(struct e1000_hw *hw);
35 static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw);
36 static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw);
37 static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw);
38 static s32 e1000_config_mac_to_phy(struct e1000_hw *hw);
39 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
40 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
41 static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count);
42 static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw);
43 static s32 e1000_phy_reset_dsp(struct e1000_hw *hw);
44 static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset,
46 static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset,
48 static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw);
49 static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd);
50 static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd);
51 static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count);
52 static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
54 static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
56 static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count);
57 static s32 e1000_acquire_eeprom(struct e1000_hw *hw);
58 static void e1000_release_eeprom(struct e1000_hw *hw);
59 static void e1000_standby_eeprom(struct e1000_hw *hw);
60 static s32 e1000_set_vco_speed(struct e1000_hw *hw);
61 static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw);
62 static s32 e1000_set_phy_mode(struct e1000_hw *hw);
63 static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
65 static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
88 * e1000_set_phy_type - Set the phy type member in the hw struct.
89 * @hw: Struct containing variables accessed by shared code
91 static s32 e1000_set_phy_type(struct e1000_hw *hw) in e1000_set_phy_type() argument
93 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
94 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
96 switch (hw->phy_id) { in e1000_set_phy_type()
102 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
105 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
106 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
108 hw->mac_type == e1000_82547_rev_2) in e1000_set_phy_type()
109 hw->phy_type = e1000_phy_igp; in e1000_set_phy_type()
112 hw->phy_type = e1000_phy_8211; in e1000_set_phy_type()
115 hw->phy_type = e1000_phy_8201; in e1000_set_phy_type()
119 hw->phy_type = e1000_phy_undefined; in e1000_set_phy_type()
120 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
127 * e1000_phy_init_script - IGP phy init script - initializes the GbE PHY
128 * @hw: Struct containing variables accessed by shared code
130 static void e1000_phy_init_script(struct e1000_hw *hw) in e1000_phy_init_script() argument
134 if (hw->phy_init_script) { in e1000_phy_init_script()
140 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data); in e1000_phy_init_script()
143 e1000_write_phy_reg(hw, 0x2F5B, 0x0003); in e1000_phy_init_script()
146 e1000_write_phy_reg(hw, 0x0000, 0x0140); in e1000_phy_init_script()
149 switch (hw->mac_type) { in e1000_phy_init_script()
152 e1000_write_phy_reg(hw, 0x1F95, 0x0001); in e1000_phy_init_script()
153 e1000_write_phy_reg(hw, 0x1F71, 0xBD21); in e1000_phy_init_script()
154 e1000_write_phy_reg(hw, 0x1F79, 0x0018); in e1000_phy_init_script()
155 e1000_write_phy_reg(hw, 0x1F30, 0x1600); in e1000_phy_init_script()
156 e1000_write_phy_reg(hw, 0x1F31, 0x0014); in e1000_phy_init_script()
157 e1000_write_phy_reg(hw, 0x1F32, 0x161C); in e1000_phy_init_script()
158 e1000_write_phy_reg(hw, 0x1F94, 0x0003); in e1000_phy_init_script()
159 e1000_write_phy_reg(hw, 0x1F96, 0x003F); in e1000_phy_init_script()
160 e1000_write_phy_reg(hw, 0x2010, 0x0008); in e1000_phy_init_script()
165 e1000_write_phy_reg(hw, 0x1F73, 0x0099); in e1000_phy_init_script()
171 e1000_write_phy_reg(hw, 0x0000, 0x3300); in e1000_phy_init_script()
175 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data); in e1000_phy_init_script()
177 if (hw->mac_type == e1000_82547) { in e1000_phy_init_script()
181 e1000_read_phy_reg(hw, in e1000_phy_init_script()
186 e1000_read_phy_reg(hw, in e1000_phy_init_script()
196 coarse -= in e1000_phy_init_script()
198 fine -= IGP01E1000_ANALOG_FUSE_FINE_1; in e1000_phy_init_script()
201 fine -= IGP01E1000_ANALOG_FUSE_FINE_10; in e1000_phy_init_script()
209 e1000_write_phy_reg(hw, in e1000_phy_init_script()
212 e1000_write_phy_reg(hw, in e1000_phy_init_script()
221 * e1000_set_mac_type - Set the mac type member in the hw struct.
222 * @hw: Struct containing variables accessed by shared code
224 s32 e1000_set_mac_type(struct e1000_hw *hw) in e1000_set_mac_type() argument
226 switch (hw->device_id) { in e1000_set_mac_type()
228 switch (hw->revision_id) { in e1000_set_mac_type()
230 hw->mac_type = e1000_82542_rev2_0; in e1000_set_mac_type()
233 hw->mac_type = e1000_82542_rev2_1; in e1000_set_mac_type()
237 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
242 hw->mac_type = e1000_82543; in e1000_set_mac_type()
248 hw->mac_type = e1000_82544; in e1000_set_mac_type()
255 hw->mac_type = e1000_82540; in e1000_set_mac_type()
259 hw->mac_type = e1000_82545; in e1000_set_mac_type()
264 hw->mac_type = e1000_82545_rev_3; in e1000_set_mac_type()
269 hw->mac_type = e1000_82546; in e1000_set_mac_type()
277 hw->mac_type = e1000_82546_rev_3; in e1000_set_mac_type()
282 hw->mac_type = e1000_82541; in e1000_set_mac_type()
288 hw->mac_type = e1000_82541_rev_2; in e1000_set_mac_type()
292 hw->mac_type = e1000_82547; in e1000_set_mac_type()
295 hw->mac_type = e1000_82547_rev_2; in e1000_set_mac_type()
298 hw->mac_type = e1000_ce4100; in e1000_set_mac_type()
302 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
305 switch (hw->mac_type) { in e1000_set_mac_type()
310 hw->asf_firmware_present = true; in e1000_set_mac_type()
319 if (hw->mac_type == e1000_82543) in e1000_set_mac_type()
320 hw->bad_tx_carr_stats_fd = true; in e1000_set_mac_type()
322 if (hw->mac_type > e1000_82544) in e1000_set_mac_type()
323 hw->has_smbus = true; in e1000_set_mac_type()
329 * e1000_set_media_type - Set media type and TBI compatibility.
330 * @hw: Struct containing variables accessed by shared code
332 void e1000_set_media_type(struct e1000_hw *hw) in e1000_set_media_type() argument
336 if (hw->mac_type != e1000_82543) { in e1000_set_media_type()
338 hw->tbi_compatibility_en = false; in e1000_set_media_type()
341 switch (hw->device_id) { in e1000_set_media_type()
344 hw->media_type = e1000_media_type_internal_serdes; in e1000_set_media_type()
347 switch (hw->mac_type) { in e1000_set_media_type()
350 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
353 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
358 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
360 hw->tbi_compatibility_en = false; in e1000_set_media_type()
362 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
370 * e1000_reset_hw - reset the hardware completely
371 * @hw: Struct containing variables accessed by shared code
375 s32 e1000_reset_hw(struct e1000_hw *hw) in e1000_reset_hw() argument
377 u32 ctrl; in e1000_reset_hw() local
384 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
386 e1000_pci_clear_mwi(hw); in e1000_reset_hw()
402 hw->tbi_compatibility_on = false; in e1000_reset_hw()
409 ctrl = er32(CTRL); in e1000_reset_hw()
412 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_reset_hw()
413 ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST)); in e1000_reset_hw()
420 * the current PCI configuration. The global reset bit is self- in e1000_reset_hw()
425 switch (hw->mac_type) { in e1000_reset_hw()
432 /* These controllers can't ack the 64-bit write when issuing the in e1000_reset_hw()
433 * reset, so use IO-mapping as a workaround to issue the reset in e1000_reset_hw()
435 E1000_WRITE_REG_IO(hw, CTRL, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
440 ew32(CTRL_DUP, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
444 ew32(CTRL, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
448 /* After MAC reset, force reload of EEPROM to restore power-on settings in e1000_reset_hw()
452 switch (hw->mac_type) { in e1000_reset_hw()
475 ret_val = e1000_get_auto_rd_done(hw); in e1000_reset_hw()
481 /* Disable HW ARPs on ASF enabled adapters */ in e1000_reset_hw()
482 if (hw->mac_type >= e1000_82540) { in e1000_reset_hw()
488 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_reset_hw()
489 e1000_phy_init_script(hw); in e1000_reset_hw()
506 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
507 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) in e1000_reset_hw()
508 e1000_pci_set_mwi(hw); in e1000_reset_hw()
515 * e1000_init_hw - Performs basic configuration of the adapter.
516 * @hw: Struct containing variables accessed by shared code
519 * post-reset uninitialized state. Initializes the receive address registers,
521 * configuration and flow control settings. Clears all on-chip counters. Leaves
524 s32 e1000_init_hw(struct e1000_hw *hw) in e1000_init_hw() argument
526 u32 ctrl; in e1000_init_hw() local
533 ret_val = e1000_id_led_init(hw); in e1000_init_hw()
540 e1000_set_media_type(hw); in e1000_init_hw()
544 if (hw->mac_type < e1000_82545_rev_3) in e1000_init_hw()
546 e1000_clear_vfta(hw); in e1000_init_hw()
549 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
551 e1000_pci_clear_mwi(hw); in e1000_init_hw()
558 * Receive Address Registers (RARs 0 - 15). in e1000_init_hw()
560 e1000_init_rx_addrs(hw); in e1000_init_hw()
563 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
567 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) in e1000_init_hw()
568 e1000_pci_set_mwi(hw); in e1000_init_hw()
575 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); in e1000_init_hw()
582 /* Set the PCI priority bit correctly in the CTRL register. This in e1000_init_hw()
587 if (hw->dma_fairness && hw->mac_type <= e1000_82543) { in e1000_init_hw()
588 ctrl = er32(CTRL); in e1000_init_hw()
589 ew32(CTRL, ctrl | E1000_CTRL_PRIOR); in e1000_init_hw()
592 switch (hw->mac_type) { in e1000_init_hw()
597 /* Workaround for PCI-X problem when BIOS sets MMRBC in e1000_init_hw()
600 if (hw->bus_type == e1000_bus_type_pcix && in e1000_init_hw()
601 e1000_pcix_get_mmrbc(hw) > 2048) in e1000_init_hw()
602 e1000_pcix_set_mmrbc(hw, 2048); in e1000_init_hw()
606 /* Call a subroutine to configure the link and setup flow control. */ in e1000_init_hw()
607 ret_val = e1000_setup_link(hw); in e1000_init_hw()
609 /* Set the transmit descriptor write-back policy */ in e1000_init_hw()
610 if (hw->mac_type > e1000_82544) { in e1000_init_hw()
611 ctrl = er32(TXDCTL); in e1000_init_hw()
612 ctrl = in e1000_init_hw()
613 (ctrl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw()
615 ew32(TXDCTL, ctrl); in e1000_init_hw()
623 e1000_clear_hw_cntrs(hw); in e1000_init_hw()
625 if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER || in e1000_init_hw()
626 hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) { in e1000_init_hw()
639 * e1000_adjust_serdes_amplitude - Adjust SERDES output amplitude based on EEPROM setting.
640 * @hw: Struct containing variables accessed by shared code.
642 static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw) in e1000_adjust_serdes_amplitude() argument
647 if (hw->media_type != e1000_media_type_internal_serdes) in e1000_adjust_serdes_amplitude()
650 switch (hw->mac_type) { in e1000_adjust_serdes_amplitude()
658 ret_val = e1000_read_eeprom(hw, EEPROM_SERDES_AMPLITUDE, 1, in e1000_adjust_serdes_amplitude()
667 e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data); in e1000_adjust_serdes_amplitude()
676 * e1000_setup_link - Configures flow control and link settings.
677 * @hw: Struct containing variables accessed by shared code
679 * Determines which flow control settings to use. Calls the appropriate media-
680 * specific link configuration function. Configures the flow control settings.
685 s32 e1000_setup_link(struct e1000_hw *hw) in e1000_setup_link() argument
692 * that determine the hardware's default PAUSE (flow control) mode, in e1000_setup_link()
693 * a bit that determines whether the HW defaults to enabling or in e1000_setup_link()
694 * disabling auto-negotiation, and the direction of the in e1000_setup_link()
695 * SW defined pins. If there is no SW over-ride of the flow in e1000_setup_link()
696 * control setting, then the variable hw->fc will in e1000_setup_link()
699 if (hw->fc == E1000_FC_DEFAULT) { in e1000_setup_link()
700 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG, in e1000_setup_link()
704 return -E1000_ERR_EEPROM; in e1000_setup_link()
707 hw->fc = E1000_FC_NONE; in e1000_setup_link()
710 hw->fc = E1000_FC_TX_PAUSE; in e1000_setup_link()
712 hw->fc = E1000_FC_FULL; in e1000_setup_link()
715 /* We want to save off the original Flow Control configuration just in e1000_setup_link()
717 * hub or switch with different Flow Control capabilities. in e1000_setup_link()
719 if (hw->mac_type == e1000_82542_rev2_0) in e1000_setup_link()
720 hw->fc &= (~E1000_FC_TX_PAUSE); in e1000_setup_link()
722 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) in e1000_setup_link()
723 hw->fc &= (~E1000_FC_RX_PAUSE); in e1000_setup_link()
725 hw->original_fc = hw->fc; in e1000_setup_link()
727 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc); in e1000_setup_link()
736 if (hw->mac_type == e1000_82543) { in e1000_setup_link()
737 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG, in e1000_setup_link()
741 return -E1000_ERR_EEPROM; in e1000_setup_link()
749 ret_val = (hw->media_type == e1000_media_type_copper) ? in e1000_setup_link()
750 e1000_setup_copper_link(hw) : e1000_setup_fiber_serdes_link(hw); in e1000_setup_link()
752 /* Initialize the flow control address, type, and PAUSE timer in e1000_setup_link()
753 * registers to their default values. This is done even if flow in e1000_setup_link()
757 e_dbg("Initializing the Flow Control address, type and timer regs\n"); in e1000_setup_link()
763 ew32(FCTTV, hw->fc_pause_time); in e1000_setup_link()
765 /* Set the flow control receive threshold registers. Normally, in e1000_setup_link()
771 if (!(hw->fc & E1000_FC_TX_PAUSE)) { in e1000_setup_link()
779 if (hw->fc_send_xon) { in e1000_setup_link()
780 ew32(FCRTL, (hw->fc_low_water | E1000_FCRTL_XONE)); in e1000_setup_link()
781 ew32(FCRTH, hw->fc_high_water); in e1000_setup_link()
783 ew32(FCRTL, hw->fc_low_water); in e1000_setup_link()
784 ew32(FCRTH, hw->fc_high_water); in e1000_setup_link()
791 * e1000_setup_fiber_serdes_link - prepare fiber or serdes link
792 * @hw: Struct containing variables accessed by shared code
798 static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw) in e1000_setup_fiber_serdes_link() argument
800 u32 ctrl; in e1000_setup_fiber_serdes_link() local
813 ctrl = er32(CTRL); in e1000_setup_fiber_serdes_link()
814 if (hw->media_type == e1000_media_type_fiber) in e1000_setup_fiber_serdes_link()
815 signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; in e1000_setup_fiber_serdes_link()
817 ret_val = e1000_adjust_serdes_amplitude(hw); in e1000_setup_fiber_serdes_link()
822 ctrl &= ~(E1000_CTRL_LRST); in e1000_setup_fiber_serdes_link()
825 ret_val = e1000_set_vco_speed(hw); in e1000_setup_fiber_serdes_link()
829 e1000_config_collision_dist(hw); in e1000_setup_fiber_serdes_link()
831 /* Check for a software override of the flow control settings, and setup in e1000_setup_fiber_serdes_link()
832 * the device accordingly. If auto-negotiation is enabled, then in e1000_setup_fiber_serdes_link()
834 * the Tranmsit Config Word Register (TXCW) and re-start in e1000_setup_fiber_serdes_link()
835 * auto-negotiation. However, if auto-negotiation is disabled, then in e1000_setup_fiber_serdes_link()
836 * software will have to manually configure the two flow control enable in e1000_setup_fiber_serdes_link()
837 * bits in the CTRL register. in e1000_setup_fiber_serdes_link()
840 * 0: Flow control is completely disabled in e1000_setup_fiber_serdes_link()
841 * 1: Rx flow control is enabled (we can receive pause frames, but in e1000_setup_fiber_serdes_link()
843 * 2: Tx flow control is enabled (we can send pause frames but we do in e1000_setup_fiber_serdes_link()
845 * 3: Both Rx and TX flow control (symmetric) are enabled. in e1000_setup_fiber_serdes_link()
847 switch (hw->fc) { in e1000_setup_fiber_serdes_link()
849 /* Flow ctrl is completely disabled by a software over-ride */ in e1000_setup_fiber_serdes_link()
853 /* Rx Flow control is enabled and Tx Flow control is disabled by in e1000_setup_fiber_serdes_link()
854 * a software over-ride. Since there really isn't a way to in e1000_setup_fiber_serdes_link()
863 /* Tx Flow control is enabled, and Rx Flow control is disabled, in e1000_setup_fiber_serdes_link()
864 * by a software over-ride. in e1000_setup_fiber_serdes_link()
869 /* Flow control (both Rx and Tx) is enabled by a software in e1000_setup_fiber_serdes_link()
870 * over-ride. in e1000_setup_fiber_serdes_link()
875 e_dbg("Flow control param set incorrectly\n"); in e1000_setup_fiber_serdes_link()
876 return -E1000_ERR_CONFIG; in e1000_setup_fiber_serdes_link()
879 /* Since auto-negotiation is enabled, take the link out of reset (the in e1000_setup_fiber_serdes_link()
881 * will restart auto-negotiation. If auto-negotiation is successful in e1000_setup_fiber_serdes_link()
882 * then the link-up status bit will be set and the flow control enable in e1000_setup_fiber_serdes_link()
885 e_dbg("Auto-negotiation enabled\n"); in e1000_setup_fiber_serdes_link()
888 ew32(CTRL, ctrl); in e1000_setup_fiber_serdes_link()
891 hw->txcw = txcw; in e1000_setup_fiber_serdes_link()
895 * "Link-Up" indication in the Device Status Register. Time-out if a in e1000_setup_fiber_serdes_link()
896 * link isn't seen in 500 milliseconds seconds (Auto-negotiation should in e1000_setup_fiber_serdes_link()
901 if (hw->media_type == e1000_media_type_internal_serdes || in e1000_setup_fiber_serdes_link()
902 (er32(CTRL) & E1000_CTRL_SWDPIN1) == signal) { in e1000_setup_fiber_serdes_link()
911 e_dbg("Never got a valid link from auto-neg!!!\n"); in e1000_setup_fiber_serdes_link()
912 hw->autoneg_failed = 1; in e1000_setup_fiber_serdes_link()
916 * communicate with non-autonegotiating link partners. in e1000_setup_fiber_serdes_link()
918 ret_val = e1000_check_for_link(hw); in e1000_setup_fiber_serdes_link()
923 hw->autoneg_failed = 0; in e1000_setup_fiber_serdes_link()
925 hw->autoneg_failed = 0; in e1000_setup_fiber_serdes_link()
935 * e1000_copper_link_rtl_setup - Copper link setup for e1000_phy_rtl series.
936 * @hw: Struct containing variables accessed by shared code
940 static s32 e1000_copper_link_rtl_setup(struct e1000_hw *hw) in e1000_copper_link_rtl_setup() argument
945 ret_val = e1000_phy_reset(hw); in e1000_copper_link_rtl_setup()
954 static s32 gbe_dhg_phy_setup(struct e1000_hw *hw) in gbe_dhg_phy_setup() argument
959 switch (hw->phy_type) { in gbe_dhg_phy_setup()
961 ret_val = e1000_copper_link_rtl_setup(hw); in gbe_dhg_phy_setup()
980 ret_val = e1000_copper_link_rtl_setup(hw); in gbe_dhg_phy_setup()
996 * e1000_copper_link_preconfig - early configuration for copper
997 * @hw: Struct containing variables accessed by shared code
1001 static s32 e1000_copper_link_preconfig(struct e1000_hw *hw) in e1000_copper_link_preconfig() argument
1003 u32 ctrl; in e1000_copper_link_preconfig() local
1007 ctrl = er32(CTRL); in e1000_copper_link_preconfig()
1012 if (hw->mac_type > e1000_82543) { in e1000_copper_link_preconfig()
1013 ctrl |= E1000_CTRL_SLU; in e1000_copper_link_preconfig()
1014 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_copper_link_preconfig()
1015 ew32(CTRL, ctrl); in e1000_copper_link_preconfig()
1017 ctrl |= in e1000_copper_link_preconfig()
1019 ew32(CTRL, ctrl); in e1000_copper_link_preconfig()
1020 ret_val = e1000_phy_hw_reset(hw); in e1000_copper_link_preconfig()
1026 ret_val = e1000_detect_gig_phy(hw); in e1000_copper_link_preconfig()
1031 e_dbg("Phy ID = %x\n", hw->phy_id); in e1000_copper_link_preconfig()
1034 ret_val = e1000_set_phy_mode(hw); in e1000_copper_link_preconfig()
1038 if ((hw->mac_type == e1000_82545_rev_3) || in e1000_copper_link_preconfig()
1039 (hw->mac_type == e1000_82546_rev_3)) { in e1000_copper_link_preconfig()
1041 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_copper_link_preconfig()
1044 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in e1000_copper_link_preconfig()
1047 if (hw->mac_type <= e1000_82543 || in e1000_copper_link_preconfig()
1048 hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || in e1000_copper_link_preconfig()
1049 hw->mac_type == e1000_82541_rev_2 || in e1000_copper_link_preconfig()
1050 hw->mac_type == e1000_82547_rev_2) in e1000_copper_link_preconfig()
1051 hw->phy_reset_disable = false; in e1000_copper_link_preconfig()
1057 * e1000_copper_link_igp_setup - Copper link setup for e1000_phy_igp series.
1058 * @hw: Struct containing variables accessed by shared code
1060 static s32 e1000_copper_link_igp_setup(struct e1000_hw *hw) in e1000_copper_link_igp_setup() argument
1066 if (hw->phy_reset_disable) in e1000_copper_link_igp_setup()
1069 ret_val = e1000_phy_reset(hw); in e1000_copper_link_igp_setup()
1084 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_igp_setup()
1086 ret_val = e1000_set_d3_lplu_state(hw, false); in e1000_copper_link_igp_setup()
1093 /* Configure mdi-mdix settings */ in e1000_copper_link_igp_setup()
1094 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); in e1000_copper_link_igp_setup()
1098 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_copper_link_igp_setup()
1099 hw->dsp_config_state = e1000_dsp_config_disabled; in e1000_copper_link_igp_setup()
1104 hw->mdix = 1; in e1000_copper_link_igp_setup()
1107 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
1110 switch (hw->mdix) { in e1000_copper_link_igp_setup()
1123 ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data); in e1000_copper_link_igp_setup()
1127 /* set auto-master slave resolution settings */ in e1000_copper_link_igp_setup()
1128 if (hw->autoneg) { in e1000_copper_link_igp_setup()
1129 e1000_ms_type phy_ms_setting = hw->master_slave; in e1000_copper_link_igp_setup()
1131 if (hw->ffe_config_state == e1000_ffe_config_active) in e1000_copper_link_igp_setup()
1132 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_copper_link_igp_setup()
1134 if (hw->dsp_config_state == e1000_dsp_config_activated) in e1000_copper_link_igp_setup()
1135 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
1141 if (hw->autoneg_advertised == ADVERTISE_1000_FULL) { in e1000_copper_link_igp_setup()
1144 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_copper_link_igp_setup()
1150 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_copper_link_igp_setup()
1156 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_data); in e1000_copper_link_igp_setup()
1161 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data); in e1000_copper_link_igp_setup()
1166 ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_data); in e1000_copper_link_igp_setup()
1171 hw->original_master_slave = (phy_data & CR_1000T_MS_ENABLE) ? in e1000_copper_link_igp_setup()
1189 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data); in e1000_copper_link_igp_setup()
1198 * e1000_copper_link_mgp_setup - Copper link setup for e1000_phy_m88 series.
1199 * @hw: Struct containing variables accessed by shared code
1201 static s32 e1000_copper_link_mgp_setup(struct e1000_hw *hw) in e1000_copper_link_mgp_setup() argument
1206 if (hw->phy_reset_disable) in e1000_copper_link_mgp_setup()
1209 /* Enable CRS on TX. This must be set for half-duplex operation. */ in e1000_copper_link_mgp_setup()
1210 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_copper_link_mgp_setup()
1217 * MDI/MDI-X = 0 (default) in e1000_copper_link_mgp_setup()
1218 * 0 - Auto for all speeds in e1000_copper_link_mgp_setup()
1219 * 1 - MDI mode in e1000_copper_link_mgp_setup()
1220 * 2 - MDI-X mode in e1000_copper_link_mgp_setup()
1221 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in e1000_copper_link_mgp_setup()
1225 switch (hw->mdix) { in e1000_copper_link_mgp_setup()
1244 * 0 - Disabled in e1000_copper_link_mgp_setup()
1245 * 1 - Enabled in e1000_copper_link_mgp_setup()
1248 if (hw->disable_polarity_correction == 1) in e1000_copper_link_mgp_setup()
1250 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in e1000_copper_link_mgp_setup()
1254 if (hw->phy_revision < M88E1011_I_REV_4) { in e1000_copper_link_mgp_setup()
1259 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_copper_link_mgp_setup()
1266 if ((hw->phy_revision == E1000_REVISION_2) && in e1000_copper_link_mgp_setup()
1267 (hw->phy_id == M88E1111_I_PHY_ID)) { in e1000_copper_link_mgp_setup()
1271 ret_val = e1000_write_phy_reg(hw, in e1000_copper_link_mgp_setup()
1282 ret_val = e1000_write_phy_reg(hw, in e1000_copper_link_mgp_setup()
1291 ret_val = e1000_phy_reset(hw); in e1000_copper_link_mgp_setup()
1301 * e1000_copper_link_autoneg - setup auto-neg
1302 * @hw: Struct containing variables accessed by shared code
1304 * Setup auto-negotiation and flow control advertisements,
1305 * and then perform auto-negotiation.
1307 static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) in e1000_copper_link_autoneg() argument
1312 /* Perform some bounds checking on the hw->autoneg_advertised in e1000_copper_link_autoneg()
1315 hw->autoneg_advertised &= AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
1320 if (hw->autoneg_advertised == 0) in e1000_copper_link_autoneg()
1321 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
1324 if (hw->phy_type == e1000_phy_8201) in e1000_copper_link_autoneg()
1325 hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL; in e1000_copper_link_autoneg()
1327 e_dbg("Reconfiguring auto-neg advertisement params\n"); in e1000_copper_link_autoneg()
1328 ret_val = e1000_phy_setup_autoneg(hw); in e1000_copper_link_autoneg()
1330 e_dbg("Error Setting up Auto-Negotiation\n"); in e1000_copper_link_autoneg()
1333 e_dbg("Restarting Auto-Neg\n"); in e1000_copper_link_autoneg()
1335 /* Restart auto-negotiation by setting the Auto Neg Enable bit and in e1000_copper_link_autoneg()
1338 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); in e1000_copper_link_autoneg()
1343 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data); in e1000_copper_link_autoneg()
1347 /* Does the user want to wait for Auto-Neg to complete here, or in e1000_copper_link_autoneg()
1350 if (hw->wait_autoneg_complete) { in e1000_copper_link_autoneg()
1351 ret_val = e1000_wait_autoneg(hw); in e1000_copper_link_autoneg()
1359 hw->get_link_status = true; in e1000_copper_link_autoneg()
1365 * e1000_copper_link_postconfig - post link setup
1366 * @hw: Struct containing variables accessed by shared code
1373 * 2) Set up flow control on the MAC to that established with
1377 static s32 e1000_copper_link_postconfig(struct e1000_hw *hw) in e1000_copper_link_postconfig() argument
1381 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) { in e1000_copper_link_postconfig()
1382 e1000_config_collision_dist(hw); in e1000_copper_link_postconfig()
1384 ret_val = e1000_config_mac_to_phy(hw); in e1000_copper_link_postconfig()
1390 ret_val = e1000_config_fc_after_link_up(hw); in e1000_copper_link_postconfig()
1392 e_dbg("Error Configuring Flow Control\n"); in e1000_copper_link_postconfig()
1397 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_postconfig()
1398 ret_val = e1000_config_dsp_after_link_change(hw, true); in e1000_copper_link_postconfig()
1409 * e1000_setup_copper_link - phy/speed/duplex setting
1410 * @hw: Struct containing variables accessed by shared code
1414 static s32 e1000_setup_copper_link(struct e1000_hw *hw) in e1000_setup_copper_link() argument
1421 ret_val = e1000_copper_link_preconfig(hw); in e1000_setup_copper_link()
1425 if (hw->phy_type == e1000_phy_igp) { in e1000_setup_copper_link()
1426 ret_val = e1000_copper_link_igp_setup(hw); in e1000_setup_copper_link()
1429 } else if (hw->phy_type == e1000_phy_m88) { in e1000_setup_copper_link()
1430 ret_val = e1000_copper_link_mgp_setup(hw); in e1000_setup_copper_link()
1434 ret_val = gbe_dhg_phy_setup(hw); in e1000_setup_copper_link()
1441 if (hw->autoneg) { in e1000_setup_copper_link()
1442 /* Setup autoneg and flow control advertisement in e1000_setup_copper_link()
1445 ret_val = e1000_copper_link_autoneg(hw); in e1000_setup_copper_link()
1453 ret_val = e1000_phy_force_speed_duplex(hw); in e1000_setup_copper_link()
1464 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_setup_copper_link()
1467 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_setup_copper_link()
1473 ret_val = e1000_copper_link_postconfig(hw); in e1000_setup_copper_link()
1488 * e1000_phy_setup_autoneg - phy settings
1489 * @hw: Struct containing variables accessed by shared code
1491 * Configures PHY autoneg and flow control advertisement settings
1493 s32 e1000_phy_setup_autoneg(struct e1000_hw *hw) in e1000_phy_setup_autoneg() argument
1499 /* Read the MII Auto-Neg Advertisement Register (Address 4). */ in e1000_phy_setup_autoneg()
1500 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
1504 /* Read the MII 1000Base-T Control Register (Address 9). */ in e1000_phy_setup_autoneg()
1505 ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg); in e1000_phy_setup_autoneg()
1508 else if (hw->phy_type == e1000_phy_8201) in e1000_phy_setup_autoneg()
1518 /* First we clear all the 10/100 mb speed bits in the Auto-Neg in e1000_phy_setup_autoneg()
1520 * the 1000Base-T Control Register (Address 9). in e1000_phy_setup_autoneg()
1525 e_dbg("autoneg_advertised %x\n", hw->autoneg_advertised); in e1000_phy_setup_autoneg()
1528 if (hw->autoneg_advertised & ADVERTISE_10_HALF) { in e1000_phy_setup_autoneg()
1534 if (hw->autoneg_advertised & ADVERTISE_10_FULL) { in e1000_phy_setup_autoneg()
1540 if (hw->autoneg_advertised & ADVERTISE_100_HALF) { in e1000_phy_setup_autoneg()
1546 if (hw->autoneg_advertised & ADVERTISE_100_FULL) { in e1000_phy_setup_autoneg()
1552 if (hw->autoneg_advertised & ADVERTISE_1000_HALF) { in e1000_phy_setup_autoneg()
1558 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) { in e1000_phy_setup_autoneg()
1563 /* Check for a software override of the flow control settings, and in e1000_phy_setup_autoneg()
1565 * auto-negotiation is enabled, then software will have to set the in e1000_phy_setup_autoneg()
1566 * "PAUSE" bits to the correct value in the Auto-Negotiation in e1000_phy_setup_autoneg()
1567 * Advertisement Register (PHY_AUTONEG_ADV) and re-start in e1000_phy_setup_autoneg()
1568 * auto-negotiation. in e1000_phy_setup_autoneg()
1571 * 0: Flow control is completely disabled in e1000_phy_setup_autoneg()
1572 * 1: Rx flow control is enabled (we can receive pause frames in e1000_phy_setup_autoneg()
1574 * 2: Tx flow control is enabled (we can send pause frames in e1000_phy_setup_autoneg()
1576 * 3: Both Rx and TX flow control (symmetric) are enabled. in e1000_phy_setup_autoneg()
1577 * other: No software override. The flow control configuration in e1000_phy_setup_autoneg()
1580 switch (hw->fc) { in e1000_phy_setup_autoneg()
1582 /* Flow control (RX & TX) is completely disabled by a in e1000_phy_setup_autoneg()
1583 * software over-ride. in e1000_phy_setup_autoneg()
1588 /* RX Flow control is enabled, and TX Flow control is in e1000_phy_setup_autoneg()
1589 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
1595 * hw's ability to send PAUSE frames. in e1000_phy_setup_autoneg()
1600 /* TX Flow control is enabled, and RX Flow control is in e1000_phy_setup_autoneg()
1601 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
1607 /* Flow control (both RX and TX) is enabled by a software in e1000_phy_setup_autoneg()
1608 * over-ride. in e1000_phy_setup_autoneg()
1613 e_dbg("Flow control param set incorrectly\n"); in e1000_phy_setup_autoneg()
1614 return -E1000_ERR_CONFIG; in e1000_phy_setup_autoneg()
1617 ret_val = e1000_write_phy_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
1621 e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
1623 if (hw->phy_type == e1000_phy_8201) { in e1000_phy_setup_autoneg()
1626 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, in e1000_phy_setup_autoneg()
1636 * e1000_phy_force_speed_duplex - force link settings
1637 * @hw: Struct containing variables accessed by shared code
1639 * Force PHY speed and duplex settings to hw->forced_speed_duplex
1641 static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw) in e1000_phy_force_speed_duplex() argument
1643 u32 ctrl; in e1000_phy_force_speed_duplex() local
1650 /* Turn off Flow control if we are forcing speed and duplex. */ in e1000_phy_force_speed_duplex()
1651 hw->fc = E1000_FC_NONE; in e1000_phy_force_speed_duplex()
1653 e_dbg("hw->fc = %d\n", hw->fc); in e1000_phy_force_speed_duplex()
1656 ctrl = er32(CTRL); in e1000_phy_force_speed_duplex()
1658 /* Set the bits to Force Speed and Duplex in the Device Ctrl Reg. */ in e1000_phy_force_speed_duplex()
1659 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_phy_force_speed_duplex()
1660 ctrl &= ~(DEVICE_SPEED_MASK); in e1000_phy_force_speed_duplex()
1663 ctrl &= ~E1000_CTRL_ASDE; in e1000_phy_force_speed_duplex()
1666 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg); in e1000_phy_force_speed_duplex()
1675 if (hw->forced_speed_duplex == e1000_100_full || in e1000_phy_force_speed_duplex()
1676 hw->forced_speed_duplex == e1000_10_full) { in e1000_phy_force_speed_duplex()
1680 ctrl |= E1000_CTRL_FD; in e1000_phy_force_speed_duplex()
1687 ctrl &= ~E1000_CTRL_FD; in e1000_phy_force_speed_duplex()
1693 if (hw->forced_speed_duplex == e1000_100_full || in e1000_phy_force_speed_duplex()
1694 hw->forced_speed_duplex == e1000_100_half) { in e1000_phy_force_speed_duplex()
1696 ctrl |= E1000_CTRL_SPD_100; in e1000_phy_force_speed_duplex()
1702 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); in e1000_phy_force_speed_duplex()
1708 e1000_config_collision_dist(hw); in e1000_phy_force_speed_duplex()
1711 ew32(CTRL, ctrl); in e1000_phy_force_speed_duplex()
1713 if (hw->phy_type == e1000_phy_m88) { in e1000_phy_force_speed_duplex()
1715 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_force_speed_duplex()
1719 /* Clear Auto-Crossover to force MDI manually. M88E1000 requires in e1000_phy_force_speed_duplex()
1724 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in e1000_phy_force_speed_duplex()
1733 /* Disable MDI-X support for 10/100 */ in e1000_phy_force_speed_duplex()
1735 /* Clear Auto-Crossover to force MDI manually. IGP requires MDI in e1000_phy_force_speed_duplex()
1739 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); in e1000_phy_force_speed_duplex()
1747 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data); in e1000_phy_force_speed_duplex()
1753 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg); in e1000_phy_force_speed_duplex()
1760 * Since we are forcing speed and duplex, Auto-Neg is not enabled. in e1000_phy_force_speed_duplex()
1766 if (hw->wait_autoneg_complete) { in e1000_phy_force_speed_duplex()
1772 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_phy_force_speed_duplex()
1773 /* Read the MII Status Register and wait for Auto-Neg in e1000_phy_force_speed_duplex()
1777 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
1782 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
1790 if ((i == 0) && (hw->phy_type == e1000_phy_m88)) { in e1000_phy_force_speed_duplex()
1794 ret_val = e1000_phy_reset_dsp(hw); in e1000_phy_force_speed_duplex()
1800 /* This loop will early-out if the link condition has been in e1000_phy_force_speed_duplex()
1803 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_phy_force_speed_duplex()
1807 /* Read the MII Status Register and wait for Auto-Neg in e1000_phy_force_speed_duplex()
1811 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
1816 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
1822 if (hw->phy_type == e1000_phy_m88) { in e1000_phy_force_speed_duplex()
1823 /* Because we reset the PHY above, we need to re-force TX_CLK in in e1000_phy_force_speed_duplex()
1829 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_phy_force_speed_duplex()
1836 e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_phy_force_speed_duplex()
1846 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_force_speed_duplex()
1852 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in e1000_phy_force_speed_duplex()
1856 if ((hw->mac_type == e1000_82544 || in e1000_phy_force_speed_duplex()
1857 hw->mac_type == e1000_82543) && in e1000_phy_force_speed_duplex()
1858 (!hw->autoneg) && in e1000_phy_force_speed_duplex()
1859 (hw->forced_speed_duplex == e1000_10_full || in e1000_phy_force_speed_duplex()
1860 hw->forced_speed_duplex == e1000_10_half)) { in e1000_phy_force_speed_duplex()
1861 ret_val = e1000_polarity_reversal_workaround(hw); in e1000_phy_force_speed_duplex()
1870 * e1000_config_collision_dist - set collision distance register
1871 * @hw: Struct containing variables accessed by shared code
1877 void e1000_config_collision_dist(struct e1000_hw *hw) in e1000_config_collision_dist() argument
1881 if (hw->mac_type < e1000_82543) in e1000_config_collision_dist()
1896 * e1000_config_mac_to_phy - sync phy and mac settings
1897 * @hw: Struct containing variables accessed by shared code
1903 static s32 e1000_config_mac_to_phy(struct e1000_hw *hw) in e1000_config_mac_to_phy() argument
1905 u32 ctrl; in e1000_config_mac_to_phy() local
1912 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) in e1000_config_mac_to_phy()
1918 ctrl = er32(CTRL); in e1000_config_mac_to_phy()
1919 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_config_mac_to_phy()
1920 ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS); in e1000_config_mac_to_phy()
1922 switch (hw->phy_type) { in e1000_config_mac_to_phy()
1924 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); in e1000_config_mac_to_phy()
1929 ctrl |= E1000_CTRL_FD; in e1000_config_mac_to_phy()
1931 ctrl &= ~E1000_CTRL_FD; in e1000_config_mac_to_phy()
1934 ctrl |= E1000_CTRL_SPD_100; in e1000_config_mac_to_phy()
1936 ctrl |= E1000_CTRL_SPD_10; in e1000_config_mac_to_phy()
1938 e1000_config_collision_dist(hw); in e1000_config_mac_to_phy()
1944 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, in e1000_config_mac_to_phy()
1950 ctrl |= E1000_CTRL_FD; in e1000_config_mac_to_phy()
1952 ctrl &= ~E1000_CTRL_FD; in e1000_config_mac_to_phy()
1954 e1000_config_collision_dist(hw); in e1000_config_mac_to_phy()
1960 ctrl |= E1000_CTRL_SPD_1000; in e1000_config_mac_to_phy()
1963 ctrl |= E1000_CTRL_SPD_100; in e1000_config_mac_to_phy()
1967 ew32(CTRL, ctrl); in e1000_config_mac_to_phy()
1972 * e1000_force_mac_fc - force flow control settings
1973 * @hw: Struct containing variables accessed by shared code
1975 * Forces the MAC's flow control settings.
1982 s32 e1000_force_mac_fc(struct e1000_hw *hw) in e1000_force_mac_fc() argument
1984 u32 ctrl; in e1000_force_mac_fc() local
1987 ctrl = er32(CTRL); in e1000_force_mac_fc()
1989 /* Because we didn't get link via the internal auto-negotiation in e1000_force_mac_fc()
1991 * auto-neg), we have to manually enable/disable transmit an in e1000_force_mac_fc()
1992 * receive flow control. in e1000_force_mac_fc()
1994 * The "Case" statement below enables/disable flow control in e1000_force_mac_fc()
1995 * according to the "hw->fc" parameter. in e1000_force_mac_fc()
1998 * 0: Flow control is completely disabled in e1000_force_mac_fc()
1999 * 1: Rx flow control is enabled (we can receive pause in e1000_force_mac_fc()
2001 * 2: Tx flow control is enabled (we can send pause frames in e1000_force_mac_fc()
2003 * 3: Both Rx and TX flow control (symmetric) is enabled. in e1000_force_mac_fc()
2007 switch (hw->fc) { in e1000_force_mac_fc()
2009 ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); in e1000_force_mac_fc()
2012 ctrl &= (~E1000_CTRL_TFCE); in e1000_force_mac_fc()
2013 ctrl |= E1000_CTRL_RFCE; in e1000_force_mac_fc()
2016 ctrl &= (~E1000_CTRL_RFCE); in e1000_force_mac_fc()
2017 ctrl |= E1000_CTRL_TFCE; in e1000_force_mac_fc()
2020 ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE); in e1000_force_mac_fc()
2023 e_dbg("Flow control param set incorrectly\n"); in e1000_force_mac_fc()
2024 return -E1000_ERR_CONFIG; in e1000_force_mac_fc()
2027 /* Disable TX Flow Control for 82542 (rev 2.0) */ in e1000_force_mac_fc()
2028 if (hw->mac_type == e1000_82542_rev2_0) in e1000_force_mac_fc()
2029 ctrl &= (~E1000_CTRL_TFCE); in e1000_force_mac_fc()
2031 ew32(CTRL, ctrl); in e1000_force_mac_fc()
2036 * e1000_config_fc_after_link_up - configure flow control after autoneg
2037 * @hw: Struct containing variables accessed by shared code
2039 * Configures flow control settings after link is established
2041 * Forces MAC flow control settings if link was forced. When in MII/GMII mode
2042 * and autonegotiation is enabled, the MAC flow control settings will be set
2043 * based on the flow control negotiated by the PHY. In TBI mode, the TFCE
2044 * and RFCE bits will be automatically set to the negotiated flow control mode.
2046 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw) in e1000_config_fc_after_link_up() argument
2055 /* Check for the case where we have fiber media and auto-neg failed in e1000_config_fc_after_link_up()
2059 if (((hw->media_type == e1000_media_type_fiber) && in e1000_config_fc_after_link_up()
2060 (hw->autoneg_failed)) || in e1000_config_fc_after_link_up()
2061 ((hw->media_type == e1000_media_type_internal_serdes) && in e1000_config_fc_after_link_up()
2062 (hw->autoneg_failed)) || in e1000_config_fc_after_link_up()
2063 ((hw->media_type == e1000_media_type_copper) && in e1000_config_fc_after_link_up()
2064 (!hw->autoneg))) { in e1000_config_fc_after_link_up()
2065 ret_val = e1000_force_mac_fc(hw); in e1000_config_fc_after_link_up()
2067 e_dbg("Error forcing flow control settings\n"); in e1000_config_fc_after_link_up()
2072 /* Check for the case where we have copper media and auto-neg is in e1000_config_fc_after_link_up()
2073 * enabled. In this case, we need to check and see if Auto-Neg in e1000_config_fc_after_link_up()
2075 * flow control configured. in e1000_config_fc_after_link_up()
2077 if ((hw->media_type == e1000_media_type_copper) && hw->autoneg) { in e1000_config_fc_after_link_up()
2082 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up()
2085 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up()
2093 * Ability Register (Address 5) to determine how flow in e1000_config_fc_after_link_up()
2096 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, in e1000_config_fc_after_link_up()
2100 ret_val = e1000_read_phy_reg(hw, PHY_LP_ABILITY, in e1000_config_fc_after_link_up()
2108 * determine flow control for both the PHY and the link in e1000_config_fc_after_link_up()
2111 * PAUSE resolution bits and how flow control is in e1000_config_fc_after_link_up()
2117 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2129 * Symmetric Flow Control is enabled at both ends. The in e1000_config_fc_after_link_up()
2132 * For Symmetric Flow Control: in e1000_config_fc_after_link_up()
2136 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2144 * to advertise FULL flow control because we in e1000_config_fc_after_link_up()
2149 if (hw->original_fc == E1000_FC_FULL) { in e1000_config_fc_after_link_up()
2150 hw->fc = E1000_FC_FULL; in e1000_config_fc_after_link_up()
2151 e_dbg("Flow Control = FULL.\n"); in e1000_config_fc_after_link_up()
2153 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2155 ("Flow Control = RX PAUSE frames only.\n"); in e1000_config_fc_after_link_up()
2162 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2170 hw->fc = E1000_FC_TX_PAUSE; in e1000_config_fc_after_link_up()
2172 ("Flow Control = TX PAUSE frames only.\n"); in e1000_config_fc_after_link_up()
2178 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2186 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2188 ("Flow Control = RX PAUSE frames only.\n"); in e1000_config_fc_after_link_up()
2190 /* Per the IEEE spec, at this point flow control should in e1000_config_fc_after_link_up()
2193 * advertise desired flow control, but can be forced on in e1000_config_fc_after_link_up()
2194 * the link partner. So if we advertised no flow in e1000_config_fc_after_link_up()
2197 * Only or Full Flow Control) and the link partner in e1000_config_fc_after_link_up()
2199 * enable Rx Flow Control only. We can do this safely in e1000_config_fc_after_link_up()
2201 * didn't want flow control enabled, and we enable Rx, in e1000_config_fc_after_link_up()
2204 * to have flow control enabled, then by us enabling Rx in e1000_config_fc_after_link_up()
2212 else if ((hw->original_fc == E1000_FC_NONE || in e1000_config_fc_after_link_up()
2213 hw->original_fc == E1000_FC_TX_PAUSE) || in e1000_config_fc_after_link_up()
2214 hw->fc_strict_ieee) { in e1000_config_fc_after_link_up()
2215 hw->fc = E1000_FC_NONE; in e1000_config_fc_after_link_up()
2216 e_dbg("Flow Control = NONE.\n"); in e1000_config_fc_after_link_up()
2218 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2220 ("Flow Control = RX PAUSE frames only.\n"); in e1000_config_fc_after_link_up()
2223 /* Now we need to do one last check... If we auto- in e1000_config_fc_after_link_up()
2224 * negotiated to HALF DUPLEX, flow control should not be in e1000_config_fc_after_link_up()
2228 e1000_get_speed_and_duplex(hw, &speed, &duplex); in e1000_config_fc_after_link_up()
2236 hw->fc = E1000_FC_NONE; in e1000_config_fc_after_link_up()
2239 * controller to use the correct flow control settings. in e1000_config_fc_after_link_up()
2241 ret_val = e1000_force_mac_fc(hw); in e1000_config_fc_after_link_up()
2244 ("Error forcing flow control settings\n"); in e1000_config_fc_after_link_up()
2256 * e1000_check_for_serdes_link_generic - Check for link (Serdes)
2257 * @hw: pointer to the HW structure
2262 static s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) in e1000_check_for_serdes_link_generic() argument
2265 u32 ctrl; in e1000_check_for_serdes_link_generic() local
2269 ctrl = er32(CTRL); in e1000_check_for_serdes_link_generic()
2273 /* If we don't have link (auto-negotiation failed or link partner in e1000_check_for_serdes_link_generic()
2274 * cannot auto-negotiate), and our link partner is not trying to in e1000_check_for_serdes_link_generic()
2275 * auto-negotiate with us (we are receiving idles or data), in e1000_check_for_serdes_link_generic()
2276 * we need to force link up. We also need to give auto-negotiation in e1000_check_for_serdes_link_generic()
2279 /* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */ in e1000_check_for_serdes_link_generic()
2281 if (hw->autoneg_failed == 0) { in e1000_check_for_serdes_link_generic()
2282 hw->autoneg_failed = 1; in e1000_check_for_serdes_link_generic()
2287 /* Disable auto-negotiation in the TXCW register */ in e1000_check_for_serdes_link_generic()
2288 ew32(TXCW, (hw->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_serdes_link_generic()
2290 /* Force link-up and also force full-duplex. */ in e1000_check_for_serdes_link_generic()
2291 ctrl = er32(CTRL); in e1000_check_for_serdes_link_generic()
2292 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD); in e1000_check_for_serdes_link_generic()
2293 ew32(CTRL, ctrl); in e1000_check_for_serdes_link_generic()
2295 /* Configure Flow Control after forcing link up. */ in e1000_check_for_serdes_link_generic()
2296 ret_val = e1000_config_fc_after_link_up(hw); in e1000_check_for_serdes_link_generic()
2298 e_dbg("Error configuring flow control\n"); in e1000_check_for_serdes_link_generic()
2301 } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { in e1000_check_for_serdes_link_generic()
2303 * sets, re-enable auto-negotiation in the TXCW register in e1000_check_for_serdes_link_generic()
2305 * in an attempt to auto-negotiate with our link partner. in e1000_check_for_serdes_link_generic()
2308 ew32(TXCW, hw->txcw); in e1000_check_for_serdes_link_generic()
2309 ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000_check_for_serdes_link_generic()
2311 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2313 /* If we force link for non-auto-negotiation switch, check in e1000_check_for_serdes_link_generic()
2322 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2323 e_dbg("SERDES: Link up - forced.\n"); in e1000_check_for_serdes_link_generic()
2326 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2327 e_dbg("SERDES: Link down - force failed.\n"); in e1000_check_for_serdes_link_generic()
2339 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2340 e_dbg("SERDES: Link up - autoneg " in e1000_check_for_serdes_link_generic()
2343 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2344 e_dbg("SERDES: Link down - invalid" in e1000_check_for_serdes_link_generic()
2348 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2349 e_dbg("SERDES: Link down - no sync.\n"); in e1000_check_for_serdes_link_generic()
2352 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2353 e_dbg("SERDES: Link down - autoneg failed\n"); in e1000_check_for_serdes_link_generic()
2363 * @hw: Struct containing variables accessed by shared code
2368 s32 e1000_check_for_link(struct e1000_hw *hw) in e1000_check_for_link() argument
2376 er32(CTRL); in e1000_check_for_link()
2383 if ((hw->media_type == e1000_media_type_fiber) || in e1000_check_for_link()
2384 (hw->media_type == e1000_media_type_internal_serdes)) { in e1000_check_for_link()
2387 if (hw->media_type == e1000_media_type_fiber) { in e1000_check_for_link()
2389 hw->get_link_status = false; in e1000_check_for_link()
2394 * registers to see if Auto-Neg has completed and/or if our link in e1000_check_for_link()
2399 if ((hw->media_type == e1000_media_type_copper) && hw->get_link_status) { in e1000_check_for_link()
2405 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_check_for_link()
2408 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_check_for_link()
2413 hw->get_link_status = false; in e1000_check_for_link()
2415 * immediately after link-up in e1000_check_for_link()
2417 e1000_check_downshift(hw); in e1000_check_for_link()
2428 if ((hw->mac_type == e1000_82544 || in e1000_check_for_link()
2429 hw->mac_type == e1000_82543) && in e1000_check_for_link()
2430 (!hw->autoneg) && in e1000_check_for_link()
2431 (hw->forced_speed_duplex == e1000_10_full || in e1000_check_for_link()
2432 hw->forced_speed_duplex == e1000_10_half)) { in e1000_check_for_link()
2435 e1000_polarity_reversal_workaround(hw); in e1000_check_for_link()
2443 e1000_config_dsp_after_link_change(hw, false); in e1000_check_for_link()
2450 if (!hw->autoneg) in e1000_check_for_link()
2451 return -E1000_ERR_CONFIG; in e1000_check_for_link()
2454 e1000_config_dsp_after_link_change(hw, true); in e1000_check_for_link()
2456 /* We have a M88E1000 PHY and Auto-Neg is enabled. If we in e1000_check_for_link()
2464 if ((hw->mac_type >= e1000_82544) && in e1000_check_for_link()
2465 (hw->mac_type != e1000_ce4100)) in e1000_check_for_link()
2466 e1000_config_collision_dist(hw); in e1000_check_for_link()
2468 ret_val = e1000_config_mac_to_phy(hw); in e1000_check_for_link()
2476 /* Configure Flow Control now that Auto-Neg has completed. in e1000_check_for_link()
2477 * First, we need to restore the desired flow control settings in e1000_check_for_link()
2478 * because we may have had to re-autoneg with a different link in e1000_check_for_link()
2481 ret_val = e1000_config_fc_after_link_up(hw); in e1000_check_for_link()
2483 e_dbg("Error configuring flow control\n"); in e1000_check_for_link()
2488 * auto-negotiated link. These are conditions for checking the in e1000_check_for_link()
2495 if (hw->tbi_compatibility_en) { in e1000_check_for_link()
2499 e1000_get_speed_and_duplex(hw, &speed, &duplex); in e1000_check_for_link()
2510 if (hw->tbi_compatibility_on) { in e1000_check_for_link()
2517 hw->tbi_compatibility_on = false; in e1000_check_for_link()
2526 if (!hw->tbi_compatibility_on) { in e1000_check_for_link()
2527 hw->tbi_compatibility_on = true; in e1000_check_for_link()
2536 if ((hw->media_type == e1000_media_type_fiber) || in e1000_check_for_link()
2537 (hw->media_type == e1000_media_type_internal_serdes)) in e1000_check_for_link()
2538 e1000_check_for_serdes_link_generic(hw); in e1000_check_for_link()
2545 * @hw: Struct containing variables accessed by shared code
2551 s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex) in e1000_get_speed_and_duplex() argument
2557 if (hw->mac_type >= e1000_82543) { in e1000_get_speed_and_duplex()
2587 if (hw->phy_type == e1000_phy_igp && hw->speed_downgraded) { in e1000_get_speed_and_duplex()
2588 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_EXP, &phy_data); in e1000_get_speed_and_duplex()
2596 e1000_read_phy_reg(hw, PHY_LP_ABILITY, &phy_data); in e1000_get_speed_and_duplex()
2612 * @hw: Struct containing variables accessed by shared code
2616 static s32 e1000_wait_autoneg(struct e1000_hw *hw) in e1000_wait_autoneg() argument
2622 e_dbg("Waiting for Auto-Neg to complete.\n"); in e1000_wait_autoneg()
2625 for (i = PHY_AUTO_NEG_TIME; i > 0; i--) { in e1000_wait_autoneg()
2626 /* Read the MII Status Register and wait for Auto-Neg in e1000_wait_autoneg()
2629 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_wait_autoneg()
2632 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_wait_autoneg()
2644 * e1000_raise_mdi_clk - Raises the Management Data Clock
2645 * @hw: Struct containing variables accessed by shared code
2646 * @ctrl: Device control register's current value
2648 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl) in e1000_raise_mdi_clk() argument
2653 ew32(CTRL, (*ctrl | E1000_CTRL_MDC)); in e1000_raise_mdi_clk()
2659 * e1000_lower_mdi_clk - Lowers the Management Data Clock
2660 * @hw: Struct containing variables accessed by shared code
2661 * @ctrl: Device control register's current value
2663 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl) in e1000_lower_mdi_clk() argument
2668 ew32(CTRL, (*ctrl & ~E1000_CTRL_MDC)); in e1000_lower_mdi_clk()
2674 * e1000_shift_out_mdi_bits - Shifts data bits out to the PHY
2675 * @hw: Struct containing variables accessed by shared code
2681 static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count) in e1000_shift_out_mdi_bits() argument
2683 u32 ctrl; in e1000_shift_out_mdi_bits() local
2691 mask <<= (count - 1); in e1000_shift_out_mdi_bits()
2693 ctrl = er32(CTRL); in e1000_shift_out_mdi_bits()
2696 ctrl |= (E1000_CTRL_MDIO_DIR | E1000_CTRL_MDC_DIR); in e1000_shift_out_mdi_bits()
2705 ctrl |= E1000_CTRL_MDIO; in e1000_shift_out_mdi_bits()
2707 ctrl &= ~E1000_CTRL_MDIO; in e1000_shift_out_mdi_bits()
2709 ew32(CTRL, ctrl); in e1000_shift_out_mdi_bits()
2714 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_out_mdi_bits()
2715 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_out_mdi_bits()
2722 * e1000_shift_in_mdi_bits - Shifts data bits in from the PHY
2723 * @hw: Struct containing variables accessed by shared code
2727 static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw) in e1000_shift_in_mdi_bits() argument
2729 u32 ctrl; in e1000_shift_in_mdi_bits() local
2740 ctrl = er32(CTRL); in e1000_shift_in_mdi_bits()
2745 ctrl &= ~E1000_CTRL_MDIO_DIR; in e1000_shift_in_mdi_bits()
2746 ctrl &= ~E1000_CTRL_MDIO; in e1000_shift_in_mdi_bits()
2748 ew32(CTRL, ctrl); in e1000_shift_in_mdi_bits()
2755 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
2756 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
2760 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
2761 ctrl = er32(CTRL); in e1000_shift_in_mdi_bits()
2763 if (ctrl & E1000_CTRL_MDIO) in e1000_shift_in_mdi_bits()
2765 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
2768 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
2769 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
2775 * e1000_read_phy_reg - read a phy register
2776 * @hw: Struct containing variables accessed by shared code
2783 s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data) in e1000_read_phy_reg() argument
2790 if ((hw->phy_type == e1000_phy_igp) && in e1000_read_phy_reg()
2792 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, in e1000_read_phy_reg()
2798 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr, in e1000_read_phy_reg()
2806 static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, in e1000_read_phy_reg_ex() argument
2811 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; in e1000_read_phy_reg_ex()
2815 return -E1000_ERR_PARAM; in e1000_read_phy_reg_ex()
2818 if (hw->mac_type > e1000_82543) { in e1000_read_phy_reg_ex()
2819 /* Set up Op-code, Phy Address, and register address in the MDI in e1000_read_phy_reg_ex()
2823 if (hw->mac_type == e1000_ce4100) { in e1000_read_phy_reg_ex()
2843 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2849 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2870 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2874 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2883 e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE); in e1000_read_phy_reg_ex()
2900 e1000_shift_out_mdi_bits(hw, mdic, 14); in e1000_read_phy_reg_ex()
2903 * need to "shift in" the 16-bit value (18 total bits) of the in e1000_read_phy_reg_ex()
2906 *phy_data = e1000_shift_in_mdi_bits(hw); in e1000_read_phy_reg_ex()
2912 * e1000_write_phy_reg - write a phy register
2914 * @hw: Struct containing variables accessed by shared code
2920 s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data) in e1000_write_phy_reg() argument
2927 if ((hw->phy_type == e1000_phy_igp) && in e1000_write_phy_reg()
2929 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, in e1000_write_phy_reg()
2937 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr, in e1000_write_phy_reg()
2944 static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr, in e1000_write_phy_reg_ex() argument
2949 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; in e1000_write_phy_reg_ex()
2953 return -E1000_ERR_PARAM; in e1000_write_phy_reg_ex()
2956 if (hw->mac_type > e1000_82543) { in e1000_write_phy_reg_ex()
2957 /* Set up Op-code, Phy Address, register address, and data in e1000_write_phy_reg_ex()
2962 if (hw->mac_type == e1000_ce4100) { in e1000_write_phy_reg_ex()
2982 return -E1000_ERR_PHY; in e1000_write_phy_reg_ex()
3003 return -E1000_ERR_PHY; in e1000_write_phy_reg_ex()
3012 e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE); in e1000_write_phy_reg_ex()
3025 e1000_shift_out_mdi_bits(hw, mdic, 32); in e1000_write_phy_reg_ex()
3032 * e1000_phy_hw_reset - reset the phy, hardware style
3033 * @hw: Struct containing variables accessed by shared code
3035 * Returns the PHY to the power-on reset state
3037 s32 e1000_phy_hw_reset(struct e1000_hw *hw) in e1000_phy_hw_reset() argument
3039 u32 ctrl, ctrl_ext; in e1000_phy_hw_reset() local
3044 if (hw->mac_type > e1000_82543) { in e1000_phy_hw_reset()
3048 * and de-assert. in e1000_phy_hw_reset()
3050 ctrl = er32(CTRL); in e1000_phy_hw_reset()
3051 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST); in e1000_phy_hw_reset()
3056 ew32(CTRL, ctrl); in e1000_phy_hw_reset()
3076 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_phy_hw_reset()
3085 return e1000_get_phy_cfg_done(hw); in e1000_phy_hw_reset()
3089 * e1000_phy_reset - reset the phy to commit settings
3090 * @hw: Struct containing variables accessed by shared code
3095 s32 e1000_phy_reset(struct e1000_hw *hw) in e1000_phy_reset() argument
3100 switch (hw->phy_type) { in e1000_phy_reset()
3102 ret_val = e1000_phy_hw_reset(hw); in e1000_phy_reset()
3107 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); in e1000_phy_reset()
3112 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data); in e1000_phy_reset()
3120 if (hw->phy_type == e1000_phy_igp) in e1000_phy_reset()
3121 e1000_phy_init_script(hw); in e1000_phy_reset()
3127 * e1000_detect_gig_phy - check the phy type
3128 * @hw: Struct containing variables accessed by shared code
3132 static s32 e1000_detect_gig_phy(struct e1000_hw *hw) in e1000_detect_gig_phy() argument
3138 if (hw->phy_id != 0) in e1000_detect_gig_phy()
3142 ret_val = e1000_read_phy_reg(hw, PHY_ID1, &phy_id_high); in e1000_detect_gig_phy()
3146 hw->phy_id = (u32)(phy_id_high << 16); in e1000_detect_gig_phy()
3148 ret_val = e1000_read_phy_reg(hw, PHY_ID2, &phy_id_low); in e1000_detect_gig_phy()
3152 hw->phy_id |= (u32)(phy_id_low & PHY_REVISION_MASK); in e1000_detect_gig_phy()
3153 hw->phy_revision = (u32)phy_id_low & ~PHY_REVISION_MASK; in e1000_detect_gig_phy()
3155 switch (hw->mac_type) { in e1000_detect_gig_phy()
3157 if (hw->phy_id == M88E1000_E_PHY_ID) in e1000_detect_gig_phy()
3161 if (hw->phy_id == M88E1000_I_PHY_ID) in e1000_detect_gig_phy()
3169 if (hw->phy_id == M88E1011_I_PHY_ID) in e1000_detect_gig_phy()
3173 if ((hw->phy_id == RTL8211B_PHY_ID) || in e1000_detect_gig_phy()
3174 (hw->phy_id == RTL8201N_PHY_ID) || in e1000_detect_gig_phy()
3175 (hw->phy_id == M88E1118_E_PHY_ID)) in e1000_detect_gig_phy()
3182 if (hw->phy_id == IGP01E1000_I_PHY_ID) in e1000_detect_gig_phy()
3186 e_dbg("Invalid MAC type %d\n", hw->mac_type); in e1000_detect_gig_phy()
3187 return -E1000_ERR_CONFIG; in e1000_detect_gig_phy()
3189 phy_init_status = e1000_set_phy_type(hw); in e1000_detect_gig_phy()
3192 e_dbg("PHY ID 0x%X detected\n", hw->phy_id); in e1000_detect_gig_phy()
3195 e_dbg("Invalid PHY ID 0x%X\n", hw->phy_id); in e1000_detect_gig_phy()
3196 return -E1000_ERR_PHY; in e1000_detect_gig_phy()
3200 * e1000_phy_reset_dsp - reset DSP
3201 * @hw: Struct containing variables accessed by shared code
3205 static s32 e1000_phy_reset_dsp(struct e1000_hw *hw) in e1000_phy_reset_dsp() argument
3210 ret_val = e1000_write_phy_reg(hw, 29, 0x001d); in e1000_phy_reset_dsp()
3213 ret_val = e1000_write_phy_reg(hw, 30, 0x00c1); in e1000_phy_reset_dsp()
3216 ret_val = e1000_write_phy_reg(hw, 30, 0x0000); in e1000_phy_reset_dsp()
3226 * e1000_phy_igp_get_info - get igp specific registers
3227 * @hw: Struct containing variables accessed by shared code
3232 static s32 e1000_phy_igp_get_info(struct e1000_hw *hw, in e1000_phy_igp_get_info() argument
3240 * and it stored in the hw->speed_downgraded parameter. in e1000_phy_igp_get_info()
3242 phy_info->downshift = (e1000_downshift) hw->speed_downgraded; in e1000_phy_igp_get_info()
3245 phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_normal; in e1000_phy_igp_get_info()
3248 phy_info->polarity_correction = e1000_polarity_reversal_enabled; in e1000_phy_igp_get_info()
3251 ret_val = e1000_check_polarity(hw, &polarity); in e1000_phy_igp_get_info()
3255 phy_info->cable_polarity = polarity; in e1000_phy_igp_get_info()
3257 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS, &phy_data); in e1000_phy_igp_get_info()
3261 phy_info->mdix_mode = in e1000_phy_igp_get_info()
3270 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_phy_igp_get_info()
3274 phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >> in e1000_phy_igp_get_info()
3277 phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >> in e1000_phy_igp_get_info()
3282 ret_val = e1000_get_cable_length(hw, &min_length, &max_length); in e1000_phy_igp_get_info()
3290 phy_info->cable_length = e1000_cable_length_50; in e1000_phy_igp_get_info()
3292 phy_info->cable_length = e1000_cable_length_50_80; in e1000_phy_igp_get_info()
3294 phy_info->cable_length = e1000_cable_length_80_110; in e1000_phy_igp_get_info()
3296 phy_info->cable_length = e1000_cable_length_110_140; in e1000_phy_igp_get_info()
3298 phy_info->cable_length = e1000_cable_length_140; in e1000_phy_igp_get_info()
3305 * e1000_phy_m88_get_info - get m88 specific registers
3306 * @hw: Struct containing variables accessed by shared code
3311 static s32 e1000_phy_m88_get_info(struct e1000_hw *hw, in e1000_phy_m88_get_info() argument
3319 * and it stored in the hw->speed_downgraded parameter. in e1000_phy_m88_get_info()
3321 phy_info->downshift = (e1000_downshift) hw->speed_downgraded; in e1000_phy_m88_get_info()
3323 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_m88_get_info()
3327 phy_info->extended_10bt_distance = in e1000_phy_m88_get_info()
3333 phy_info->polarity_correction = in e1000_phy_m88_get_info()
3339 ret_val = e1000_check_polarity(hw, &polarity); in e1000_phy_m88_get_info()
3342 phy_info->cable_polarity = polarity; in e1000_phy_m88_get_info()
3344 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in e1000_phy_m88_get_info()
3348 phy_info->mdix_mode = in e1000_phy_m88_get_info()
3356 phy_info->cable_length = in e1000_phy_m88_get_info()
3361 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_phy_m88_get_info()
3365 phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >> in e1000_phy_m88_get_info()
3368 phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >> in e1000_phy_m88_get_info()
3377 * e1000_phy_get_info - request phy info
3378 * @hw: Struct containing variables accessed by shared code
3383 s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info) in e1000_phy_get_info() argument
3388 phy_info->cable_length = e1000_cable_length_undefined; in e1000_phy_get_info()
3389 phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_undefined; in e1000_phy_get_info()
3390 phy_info->cable_polarity = e1000_rev_polarity_undefined; in e1000_phy_get_info()
3391 phy_info->downshift = e1000_downshift_undefined; in e1000_phy_get_info()
3392 phy_info->polarity_correction = e1000_polarity_reversal_undefined; in e1000_phy_get_info()
3393 phy_info->mdix_mode = e1000_auto_x_mode_undefined; in e1000_phy_get_info()
3394 phy_info->local_rx = e1000_1000t_rx_status_undefined; in e1000_phy_get_info()
3395 phy_info->remote_rx = e1000_1000t_rx_status_undefined; in e1000_phy_get_info()
3397 if (hw->media_type != e1000_media_type_copper) { in e1000_phy_get_info()
3399 return -E1000_ERR_CONFIG; in e1000_phy_get_info()
3402 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_phy_get_info()
3406 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_phy_get_info()
3412 return -E1000_ERR_CONFIG; in e1000_phy_get_info()
3415 if (hw->phy_type == e1000_phy_igp) in e1000_phy_get_info()
3416 return e1000_phy_igp_get_info(hw, phy_info); in e1000_phy_get_info()
3417 else if ((hw->phy_type == e1000_phy_8211) || in e1000_phy_get_info()
3418 (hw->phy_type == e1000_phy_8201)) in e1000_phy_get_info()
3421 return e1000_phy_m88_get_info(hw, phy_info); in e1000_phy_get_info()
3424 s32 e1000_validate_mdi_setting(struct e1000_hw *hw) in e1000_validate_mdi_setting() argument
3426 if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) { in e1000_validate_mdi_setting()
3428 hw->mdix = 1; in e1000_validate_mdi_setting()
3429 return -E1000_ERR_CONFIG; in e1000_validate_mdi_setting()
3435 * e1000_init_eeprom_params - initialize sw eeprom vars
3436 * @hw: Struct containing variables accessed by shared code
3438 * Sets up eeprom variables in the hw struct. Must be called after mac_type
3441 s32 e1000_init_eeprom_params(struct e1000_hw *hw) in e1000_init_eeprom_params() argument
3443 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_init_eeprom_params()
3448 switch (hw->mac_type) { in e1000_init_eeprom_params()
3453 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3454 eeprom->word_size = 64; in e1000_init_eeprom_params()
3455 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3456 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3457 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3464 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3465 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3466 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3468 eeprom->word_size = 256; in e1000_init_eeprom_params()
3469 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3471 eeprom->word_size = 64; in e1000_init_eeprom_params()
3472 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3480 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
3481 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
3482 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
3484 eeprom->page_size = 32; in e1000_init_eeprom_params()
3485 eeprom->address_bits = 16; in e1000_init_eeprom_params()
3487 eeprom->page_size = 8; in e1000_init_eeprom_params()
3488 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3491 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3492 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3493 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3495 eeprom->word_size = 256; in e1000_init_eeprom_params()
3496 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3498 eeprom->word_size = 64; in e1000_init_eeprom_params()
3499 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3507 if (eeprom->type == e1000_eeprom_spi) { in e1000_init_eeprom_params()
3512 eeprom->word_size = 64; in e1000_init_eeprom_params()
3513 ret_val = e1000_read_eeprom(hw, EEPROM_CFG, 1, &eeprom_size); in e1000_init_eeprom_params()
3525 eeprom->word_size = 1 << (eeprom_size + EEPROM_WORD_SIZE_SHIFT); in e1000_init_eeprom_params()
3531 * e1000_raise_ee_clk - Raises the EEPROM's clock input.
3532 * @hw: Struct containing variables accessed by shared code
3535 static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd) in e1000_raise_ee_clk() argument
3543 udelay(hw->eeprom.delay_usec); in e1000_raise_ee_clk()
3547 * e1000_lower_ee_clk - Lowers the EEPROM's clock input.
3548 * @hw: Struct containing variables accessed by shared code
3551 static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd) in e1000_lower_ee_clk() argument
3559 udelay(hw->eeprom.delay_usec); in e1000_lower_ee_clk()
3563 * e1000_shift_out_ee_bits - Shift data bits out to the EEPROM.
3564 * @hw: Struct containing variables accessed by shared code
3568 static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count) in e1000_shift_out_ee_bits() argument
3570 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_shift_out_ee_bits()
3578 mask = 0x01 << (count - 1); in e1000_shift_out_ee_bits()
3580 if (eeprom->type == e1000_eeprom_microwire) in e1000_shift_out_ee_bits()
3582 else if (eeprom->type == e1000_eeprom_spi) in e1000_shift_out_ee_bits()
3600 udelay(eeprom->delay_usec); in e1000_shift_out_ee_bits()
3602 e1000_raise_ee_clk(hw, &eecd); in e1000_shift_out_ee_bits()
3603 e1000_lower_ee_clk(hw, &eecd); in e1000_shift_out_ee_bits()
3615 * e1000_shift_in_ee_bits - Shift data bits in from the EEPROM
3616 * @hw: Struct containing variables accessed by shared code
3619 static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count) in e1000_shift_in_ee_bits() argument
3639 e1000_raise_ee_clk(hw, &eecd); in e1000_shift_in_ee_bits()
3647 e1000_lower_ee_clk(hw, &eecd); in e1000_shift_in_ee_bits()
3654 * e1000_acquire_eeprom - Prepares EEPROM for access
3655 * @hw: Struct containing variables accessed by shared code
3660 static s32 e1000_acquire_eeprom(struct e1000_hw *hw) in e1000_acquire_eeprom() argument
3662 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_acquire_eeprom()
3668 if (hw->mac_type > e1000_82544) { in e1000_acquire_eeprom()
3682 return -E1000_ERR_EEPROM; in e1000_acquire_eeprom()
3688 if (eeprom->type == e1000_eeprom_microwire) { in e1000_acquire_eeprom()
3696 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_acquire_eeprom()
3708 * e1000_standby_eeprom - Returns EEPROM to a "standby" state
3709 * @hw: Struct containing variables accessed by shared code
3711 static void e1000_standby_eeprom(struct e1000_hw *hw) in e1000_standby_eeprom() argument
3713 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_standby_eeprom()
3718 if (eeprom->type == e1000_eeprom_microwire) { in e1000_standby_eeprom()
3722 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3728 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3734 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3740 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3741 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_standby_eeprom()
3746 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3750 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3755 * e1000_release_eeprom - drop chip select
3756 * @hw: Struct containing variables accessed by shared code
3760 static void e1000_release_eeprom(struct e1000_hw *hw) in e1000_release_eeprom() argument
3766 if (hw->eeprom.type == e1000_eeprom_spi) { in e1000_release_eeprom()
3773 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3774 } else if (hw->eeprom.type == e1000_eeprom_microwire) { in e1000_release_eeprom()
3777 /* CS on Microwire is active-high */ in e1000_release_eeprom()
3786 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3792 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3796 if (hw->mac_type > e1000_82544) { in e1000_release_eeprom()
3803 * e1000_spi_eeprom_ready - Reads a 16 bit word from the EEPROM.
3804 * @hw: Struct containing variables accessed by shared code
3806 static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw) in e1000_spi_eeprom_ready() argument
3818 e1000_shift_out_ee_bits(hw, EEPROM_RDSR_OPCODE_SPI, in e1000_spi_eeprom_ready()
3819 hw->eeprom.opcode_bits); in e1000_spi_eeprom_ready()
3820 spi_stat_reg = (u8)e1000_shift_in_ee_bits(hw, 8); in e1000_spi_eeprom_ready()
3827 e1000_standby_eeprom(hw); in e1000_spi_eeprom_ready()
3830 /* ATMEL SPI write time could vary from 0-20mSec on 3.3V devices (and in e1000_spi_eeprom_ready()
3831 * only 0-5mSec on 5V devices) in e1000_spi_eeprom_ready()
3835 return -E1000_ERR_EEPROM; in e1000_spi_eeprom_ready()
3842 * e1000_read_eeprom - Reads a 16 bit word from the EEPROM.
3843 * @hw: Struct containing variables accessed by shared code
3848 s32 e1000_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) in e1000_read_eeprom() argument
3853 ret = e1000_do_read_eeprom(hw, offset, words, data); in e1000_read_eeprom()
3858 static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, in e1000_do_read_eeprom() argument
3861 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_do_read_eeprom()
3864 if (hw->mac_type == e1000_ce4100) { in e1000_do_read_eeprom()
3873 if ((offset >= eeprom->word_size) || in e1000_do_read_eeprom()
3874 (words > eeprom->word_size - offset) || in e1000_do_read_eeprom()
3877 "size = %d\n", offset, eeprom->word_size); in e1000_do_read_eeprom()
3878 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3881 /* EEPROM's that don't use EERD to read require us to bit-bang the SPI in e1000_do_read_eeprom()
3885 /* Prepare the EEPROM for bit-bang reading */ in e1000_do_read_eeprom()
3886 if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) in e1000_do_read_eeprom()
3887 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3889 /* Set up the SPI or Microwire EEPROM for bit-bang reading. We have in e1000_do_read_eeprom()
3892 if (eeprom->type == e1000_eeprom_spi) { in e1000_do_read_eeprom()
3896 if (e1000_spi_eeprom_ready(hw)) { in e1000_do_read_eeprom()
3897 e1000_release_eeprom(hw); in e1000_do_read_eeprom()
3898 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3901 e1000_standby_eeprom(hw); in e1000_do_read_eeprom()
3906 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_do_read_eeprom()
3910 e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits); in e1000_do_read_eeprom()
3911 e1000_shift_out_ee_bits(hw, (u16)(offset * 2), in e1000_do_read_eeprom()
3912 eeprom->address_bits); in e1000_do_read_eeprom()
3916 * overhead of eeprom setup and tear-down. The address counter in e1000_do_read_eeprom()
3922 word_in = e1000_shift_in_ee_bits(hw, 16); in e1000_do_read_eeprom()
3925 } else if (eeprom->type == e1000_eeprom_microwire) { in e1000_do_read_eeprom()
3928 e1000_shift_out_ee_bits(hw, in e1000_do_read_eeprom()
3930 eeprom->opcode_bits); in e1000_do_read_eeprom()
3931 e1000_shift_out_ee_bits(hw, (u16)(offset + i), in e1000_do_read_eeprom()
3932 eeprom->address_bits); in e1000_do_read_eeprom()
3935 * overhead of eeprom setup and tear-down. in e1000_do_read_eeprom()
3937 data[i] = e1000_shift_in_ee_bits(hw, 16); in e1000_do_read_eeprom()
3938 e1000_standby_eeprom(hw); in e1000_do_read_eeprom()
3944 e1000_release_eeprom(hw); in e1000_do_read_eeprom()
3950 * e1000_validate_eeprom_checksum - Verifies that the EEPROM has a valid checksum
3951 * @hw: Struct containing variables accessed by shared code
3957 s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw) in e1000_validate_eeprom_checksum() argument
3963 if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) { in e1000_validate_eeprom_checksum()
3965 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
3972 if ((hw->subsystem_vendor_id == 0x103C) && (eeprom_data == 0x16d6)) in e1000_validate_eeprom_checksum()
3980 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
3985 * e1000_update_eeprom_checksum - Calculates/writes the EEPROM checksum
3986 * @hw: Struct containing variables accessed by shared code
3991 s32 e1000_update_eeprom_checksum(struct e1000_hw *hw) in e1000_update_eeprom_checksum() argument
3997 if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) { in e1000_update_eeprom_checksum()
3999 return -E1000_ERR_EEPROM; in e1000_update_eeprom_checksum()
4003 checksum = (u16)EEPROM_SUM - checksum; in e1000_update_eeprom_checksum()
4004 if (e1000_write_eeprom(hw, EEPROM_CHECKSUM_REG, 1, &checksum) < 0) { in e1000_update_eeprom_checksum()
4006 return -E1000_ERR_EEPROM; in e1000_update_eeprom_checksum()
4012 * e1000_write_eeprom - write words to the different EEPROM types.
4013 * @hw: Struct containing variables accessed by shared code
4021 s32 e1000_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) in e1000_write_eeprom() argument
4026 ret = e1000_do_write_eeprom(hw, offset, words, data); in e1000_write_eeprom()
4031 static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, in e1000_do_write_eeprom() argument
4034 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_do_write_eeprom()
4037 if (hw->mac_type == e1000_ce4100) { in e1000_do_write_eeprom()
4046 if ((offset >= eeprom->word_size) || in e1000_do_write_eeprom()
4047 (words > eeprom->word_size - offset) || in e1000_do_write_eeprom()
4050 return -E1000_ERR_EEPROM; in e1000_do_write_eeprom()
4054 if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) in e1000_do_write_eeprom()
4055 return -E1000_ERR_EEPROM; in e1000_do_write_eeprom()
4057 if (eeprom->type == e1000_eeprom_microwire) { in e1000_do_write_eeprom()
4058 status = e1000_write_eeprom_microwire(hw, offset, words, data); in e1000_do_write_eeprom()
4060 status = e1000_write_eeprom_spi(hw, offset, words, data); in e1000_do_write_eeprom()
4065 e1000_release_eeprom(hw); in e1000_do_write_eeprom()
4071 * e1000_write_eeprom_spi - Writes a 16 bit word to a given offset in an SPI EEPROM.
4072 * @hw: Struct containing variables accessed by shared code
4077 static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset, u16 words, in e1000_write_eeprom_spi() argument
4080 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_write_eeprom_spi()
4086 if (e1000_spi_eeprom_ready(hw)) in e1000_write_eeprom_spi()
4087 return -E1000_ERR_EEPROM; in e1000_write_eeprom_spi()
4089 e1000_standby_eeprom(hw); in e1000_write_eeprom_spi()
4093 e1000_shift_out_ee_bits(hw, EEPROM_WREN_OPCODE_SPI, in e1000_write_eeprom_spi()
4094 eeprom->opcode_bits); in e1000_write_eeprom_spi()
4096 e1000_standby_eeprom(hw); in e1000_write_eeprom_spi()
4101 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_write_eeprom_spi()
4104 /* Send the Write command (8-bit opcode + addr) */ in e1000_write_eeprom_spi()
4105 e1000_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits); in e1000_write_eeprom_spi()
4107 e1000_shift_out_ee_bits(hw, (u16)((offset + widx) * 2), in e1000_write_eeprom_spi()
4108 eeprom->address_bits); in e1000_write_eeprom_spi()
4119 e1000_shift_out_ee_bits(hw, word_out, 16); in e1000_write_eeprom_spi()
4122 /* Some larger eeprom sizes are capable of a 32-byte in e1000_write_eeprom_spi()
4124 * capable of an 8-byte PAGE WRITE operation. Break the in e1000_write_eeprom_spi()
4127 if ((((offset + widx) * 2) % eeprom->page_size) == 0) { in e1000_write_eeprom_spi()
4128 e1000_standby_eeprom(hw); in e1000_write_eeprom_spi()
4138 * e1000_write_eeprom_microwire - Writes a 16 bit word to a given offset in a Microwire EEPROM.
4139 * @hw: Struct containing variables accessed by shared code
4144 static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset, in e1000_write_eeprom_microwire() argument
4147 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_write_eeprom_microwire()
4152 /* Send the write enable command to the EEPROM (3-bit opcode plus in e1000_write_eeprom_microwire()
4153 * 6/8-bit dummy address beginning with 11). It's less work to include in e1000_write_eeprom_microwire()
4158 e1000_shift_out_ee_bits(hw, EEPROM_EWEN_OPCODE_MICROWIRE, in e1000_write_eeprom_microwire()
4159 (u16)(eeprom->opcode_bits + 2)); in e1000_write_eeprom_microwire()
4161 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2)); in e1000_write_eeprom_microwire()
4164 e1000_standby_eeprom(hw); in e1000_write_eeprom_microwire()
4167 /* Send the Write command (3-bit opcode + addr) */ in e1000_write_eeprom_microwire()
4168 e1000_shift_out_ee_bits(hw, EEPROM_WRITE_OPCODE_MICROWIRE, in e1000_write_eeprom_microwire()
4169 eeprom->opcode_bits); in e1000_write_eeprom_microwire()
4171 e1000_shift_out_ee_bits(hw, (u16)(offset + words_written), in e1000_write_eeprom_microwire()
4172 eeprom->address_bits); in e1000_write_eeprom_microwire()
4175 e1000_shift_out_ee_bits(hw, data[words_written], 16); in e1000_write_eeprom_microwire()
4180 e1000_standby_eeprom(hw); in e1000_write_eeprom_microwire()
4195 return -E1000_ERR_EEPROM; in e1000_write_eeprom_microwire()
4199 e1000_standby_eeprom(hw); in e1000_write_eeprom_microwire()
4205 /* Send the write disable command to the EEPROM (3-bit opcode plus in e1000_write_eeprom_microwire()
4206 * 6/8-bit dummy address beginning with 10). It's less work to include in e1000_write_eeprom_microwire()
4211 e1000_shift_out_ee_bits(hw, EEPROM_EWDS_OPCODE_MICROWIRE, in e1000_write_eeprom_microwire()
4212 (u16)(eeprom->opcode_bits + 2)); in e1000_write_eeprom_microwire()
4214 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2)); in e1000_write_eeprom_microwire()
4220 * e1000_read_mac_addr - read the adapters MAC from eeprom
4221 * @hw: Struct containing variables accessed by shared code
4226 s32 e1000_read_mac_addr(struct e1000_hw *hw) in e1000_read_mac_addr() argument
4233 if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) { in e1000_read_mac_addr()
4235 return -E1000_ERR_EEPROM; in e1000_read_mac_addr()
4237 hw->perm_mac_addr[i] = (u8)(eeprom_data & 0x00FF); in e1000_read_mac_addr()
4238 hw->perm_mac_addr[i + 1] = (u8)(eeprom_data >> 8); in e1000_read_mac_addr()
4241 switch (hw->mac_type) { in e1000_read_mac_addr()
4247 hw->perm_mac_addr[5] ^= 0x01; in e1000_read_mac_addr()
4252 hw->mac_addr[i] = hw->perm_mac_addr[i]; in e1000_read_mac_addr()
4257 * e1000_init_rx_addrs - Initializes receive address filters.
4258 * @hw: Struct containing variables accessed by shared code
4264 static void e1000_init_rx_addrs(struct e1000_hw *hw) in e1000_init_rx_addrs() argument
4272 e1000_rar_set(hw, hw->mac_addr, 0); in e1000_init_rx_addrs()
4279 e_dbg("Clearing RAR[1-14]\n"); in e1000_init_rx_addrs()
4281 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); in e1000_init_rx_addrs()
4283 E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); in e1000_init_rx_addrs()
4289 * e1000_hash_mc_addr - Hashes an address to determine its location in the multicast table
4290 * @hw: Struct containing variables accessed by shared code
4293 u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) in e1000_hash_mc_addr() argument
4300 switch (hw->mc_filter_type) { in e1000_hash_mc_addr()
4328 * e1000_rar_set - Puts an ethernet address into a receive address register.
4329 * @hw: Struct containing variables accessed by shared code
4333 void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index) in e1000_rar_set() argument
4337 /* HW expects these in little endian so we reverse the byte order in e1000_rar_set()
4348 * If there are any Rx frames queued up or otherwise present in the HW in e1000_rar_set()
4349 * before RSS is enabled, and then we enable RSS, the HW Rx unit will in e1000_rar_set()
4352 * redirect all Rx traffic to manageability and then reset the HW. in e1000_rar_set()
4356 * addresses and undo the re-direction to manageability. in e1000_rar_set()
4359 * configure the Rx unit. Last, we re-enable the AV bits and continue in e1000_rar_set()
4362 switch (hw->mac_type) { in e1000_rar_set()
4369 E1000_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low); in e1000_rar_set()
4371 E1000_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high); in e1000_rar_set()
4376 * e1000_write_vfta - Writes a value to the specified offset in the VLAN filter table.
4377 * @hw: Struct containing variables accessed by shared code
4381 void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value) in e1000_write_vfta() argument
4385 if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) { in e1000_write_vfta()
4386 temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1)); in e1000_write_vfta()
4387 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value); in e1000_write_vfta()
4389 E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp); in e1000_write_vfta()
4392 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value); in e1000_write_vfta()
4398 * e1000_clear_vfta - Clears the VLAN filer table
4399 * @hw: Struct containing variables accessed by shared code
4401 static void e1000_clear_vfta(struct e1000_hw *hw) in e1000_clear_vfta() argument
4406 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, 0); in e1000_clear_vfta()
4411 static s32 e1000_id_led_init(struct e1000_hw *hw) in e1000_id_led_init() argument
4420 if (hw->mac_type < e1000_82540) { in e1000_id_led_init()
4426 hw->ledctl_default = ledctl; in e1000_id_led_init()
4427 hw->ledctl_mode1 = hw->ledctl_default; in e1000_id_led_init()
4428 hw->ledctl_mode2 = hw->ledctl_default; in e1000_id_led_init()
4430 if (e1000_read_eeprom(hw, EEPROM_ID_LED_SETTINGS, 1, &eeprom_data) < 0) { in e1000_id_led_init()
4432 return -E1000_ERR_EEPROM; in e1000_id_led_init()
4446 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4447 hw->ledctl_mode1 |= ledctl_on << (i << 3); in e1000_id_led_init()
4452 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4453 hw->ledctl_mode1 |= ledctl_off << (i << 3); in e1000_id_led_init()
4463 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4464 hw->ledctl_mode2 |= ledctl_on << (i << 3); in e1000_id_led_init()
4469 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4470 hw->ledctl_mode2 |= ledctl_off << (i << 3); in e1000_id_led_init()
4482 * @hw: Struct containing variables accessed by shared code
4486 s32 e1000_setup_led(struct e1000_hw *hw) in e1000_setup_led() argument
4491 switch (hw->mac_type) { in e1000_setup_led()
4503 ret_val = e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, in e1000_setup_led()
4504 &hw->phy_spd_default); in e1000_setup_led()
4507 ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO, in e1000_setup_led()
4508 (u16)(hw->phy_spd_default & in e1000_setup_led()
4514 if (hw->media_type == e1000_media_type_fiber) { in e1000_setup_led()
4517 hw->ledctl_default = ledctl; in e1000_setup_led()
4525 } else if (hw->media_type == e1000_media_type_copper) in e1000_setup_led()
4526 ew32(LEDCTL, hw->ledctl_mode1); in e1000_setup_led()
4534 * e1000_cleanup_led - Restores the saved state of the SW controlable LED.
4535 * @hw: Struct containing variables accessed by shared code
4537 s32 e1000_cleanup_led(struct e1000_hw *hw) in e1000_cleanup_led() argument
4541 switch (hw->mac_type) { in e1000_cleanup_led()
4553 ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO, in e1000_cleanup_led()
4554 hw->phy_spd_default); in e1000_cleanup_led()
4560 ew32(LEDCTL, hw->ledctl_default); in e1000_cleanup_led()
4568 * e1000_led_on - Turns on the software controllable LED
4569 * @hw: Struct containing variables accessed by shared code
4571 s32 e1000_led_on(struct e1000_hw *hw) in e1000_led_on() argument
4573 u32 ctrl = er32(CTRL); in e1000_led_on() local
4575 switch (hw->mac_type) { in e1000_led_on()
4580 ctrl |= E1000_CTRL_SWDPIN0; in e1000_led_on()
4581 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_on()
4584 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_on()
4586 ctrl |= E1000_CTRL_SWDPIN0; in e1000_led_on()
4587 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_on()
4590 ctrl &= ~E1000_CTRL_SWDPIN0; in e1000_led_on()
4591 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_on()
4595 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_on()
4597 ctrl &= ~E1000_CTRL_SWDPIN0; in e1000_led_on()
4598 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_on()
4599 } else if (hw->media_type == e1000_media_type_copper) { in e1000_led_on()
4600 ew32(LEDCTL, hw->ledctl_mode2); in e1000_led_on()
4606 ew32(CTRL, ctrl); in e1000_led_on()
4612 * e1000_led_off - Turns off the software controllable LED
4613 * @hw: Struct containing variables accessed by shared code
4615 s32 e1000_led_off(struct e1000_hw *hw) in e1000_led_off() argument
4617 u32 ctrl = er32(CTRL); in e1000_led_off() local
4619 switch (hw->mac_type) { in e1000_led_off()
4624 ctrl &= ~E1000_CTRL_SWDPIN0; in e1000_led_off()
4625 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_off()
4628 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_off()
4630 ctrl &= ~E1000_CTRL_SWDPIN0; in e1000_led_off()
4631 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_off()
4634 ctrl |= E1000_CTRL_SWDPIN0; in e1000_led_off()
4635 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_off()
4639 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_off()
4641 ctrl |= E1000_CTRL_SWDPIN0; in e1000_led_off()
4642 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_off()
4643 } else if (hw->media_type == e1000_media_type_copper) { in e1000_led_off()
4644 ew32(LEDCTL, hw->ledctl_mode1); in e1000_led_off()
4650 ew32(CTRL, ctrl); in e1000_led_off()
4656 * e1000_clear_hw_cntrs - Clears all hardware statistics counters.
4657 * @hw: Struct containing variables accessed by shared code
4659 static void e1000_clear_hw_cntrs(struct e1000_hw *hw) in e1000_clear_hw_cntrs() argument
4715 if (hw->mac_type < e1000_82543) in e1000_clear_hw_cntrs()
4725 if (hw->mac_type <= e1000_82544) in e1000_clear_hw_cntrs()
4734 * e1000_reset_adaptive - Resets Adaptive IFS to its default state.
4735 * @hw: Struct containing variables accessed by shared code
4738 * hw->ifs_params_forced to true. However, you must initialize hw->
4742 void e1000_reset_adaptive(struct e1000_hw *hw) in e1000_reset_adaptive() argument
4744 if (hw->adaptive_ifs) { in e1000_reset_adaptive()
4745 if (!hw->ifs_params_forced) { in e1000_reset_adaptive()
4746 hw->current_ifs_val = 0; in e1000_reset_adaptive()
4747 hw->ifs_min_val = IFS_MIN; in e1000_reset_adaptive()
4748 hw->ifs_max_val = IFS_MAX; in e1000_reset_adaptive()
4749 hw->ifs_step_size = IFS_STEP; in e1000_reset_adaptive()
4750 hw->ifs_ratio = IFS_RATIO; in e1000_reset_adaptive()
4752 hw->in_ifs_mode = false; in e1000_reset_adaptive()
4760 * e1000_update_adaptive - update adaptive IFS
4761 * @hw: Struct containing variables accessed by shared code
4766 void e1000_update_adaptive(struct e1000_hw *hw) in e1000_update_adaptive() argument
4768 if (hw->adaptive_ifs) { in e1000_update_adaptive()
4769 if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) { in e1000_update_adaptive()
4770 if (hw->tx_packet_delta > MIN_NUM_XMITS) { in e1000_update_adaptive()
4771 hw->in_ifs_mode = true; in e1000_update_adaptive()
4772 if (hw->current_ifs_val < hw->ifs_max_val) { in e1000_update_adaptive()
4773 if (hw->current_ifs_val == 0) in e1000_update_adaptive()
4774 hw->current_ifs_val = in e1000_update_adaptive()
4775 hw->ifs_min_val; in e1000_update_adaptive()
4777 hw->current_ifs_val += in e1000_update_adaptive()
4778 hw->ifs_step_size; in e1000_update_adaptive()
4779 ew32(AIT, hw->current_ifs_val); in e1000_update_adaptive()
4783 if (hw->in_ifs_mode && in e1000_update_adaptive()
4784 (hw->tx_packet_delta <= MIN_NUM_XMITS)) { in e1000_update_adaptive()
4785 hw->current_ifs_val = 0; in e1000_update_adaptive()
4786 hw->in_ifs_mode = false; in e1000_update_adaptive()
4797 * @hw: Struct containing variables accessed by shared code
4801 void e1000_get_bus_info(struct e1000_hw *hw) in e1000_get_bus_info() argument
4805 switch (hw->mac_type) { in e1000_get_bus_info()
4808 hw->bus_type = e1000_bus_type_pci; in e1000_get_bus_info()
4809 hw->bus_speed = e1000_bus_speed_unknown; in e1000_get_bus_info()
4810 hw->bus_width = e1000_bus_width_unknown; in e1000_get_bus_info()
4814 hw->bus_type = (status & E1000_STATUS_PCIX_MODE) ? in e1000_get_bus_info()
4817 if (hw->device_id == E1000_DEV_ID_82546EB_QUAD_COPPER) { in e1000_get_bus_info()
4818 hw->bus_speed = (hw->bus_type == e1000_bus_type_pci) ? in e1000_get_bus_info()
4820 } else if (hw->bus_type == e1000_bus_type_pci) { in e1000_get_bus_info()
4821 hw->bus_speed = (status & E1000_STATUS_PCI66) ? in e1000_get_bus_info()
4826 hw->bus_speed = e1000_bus_speed_66; in e1000_get_bus_info()
4829 hw->bus_speed = e1000_bus_speed_100; in e1000_get_bus_info()
4832 hw->bus_speed = e1000_bus_speed_133; in e1000_get_bus_info()
4835 hw->bus_speed = e1000_bus_speed_reserved; in e1000_get_bus_info()
4839 hw->bus_width = (status & E1000_STATUS_BUS64) ? in e1000_get_bus_info()
4847 * @hw: Struct containing variables accessed by shared code
4854 static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value) in e1000_write_reg_io() argument
4856 unsigned long io_addr = hw->io_base; in e1000_write_reg_io()
4857 unsigned long io_data = hw->io_base + 4; in e1000_write_reg_io()
4859 e1000_io_write(hw, io_addr, offset); in e1000_write_reg_io()
4860 e1000_io_write(hw, io_data, value); in e1000_write_reg_io()
4864 * e1000_get_cable_length - Estimates the cable length.
4865 * @hw: Struct containing variables accessed by shared code
4869 * returns: - E1000_ERR_XXX
4877 static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, in e1000_get_cable_length() argument
4888 if (hw->phy_type == e1000_phy_m88) { in e1000_get_cable_length()
4889 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, in e1000_get_cable_length()
4919 return -E1000_ERR_PHY; in e1000_get_cable_length()
4921 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */ in e1000_get_cable_length()
4933 e1000_read_phy_reg(hw, agc_reg_array[i], &phy_data); in e1000_get_cable_length()
4941 IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) || in e1000_get_cable_length()
4943 return -E1000_ERR_PHY; in e1000_get_cable_length()
4955 agc_value -= min_agc_value; in e1000_get_cable_length()
4958 agc_value /= (IGP01E1000_PHY_CHANNEL_NUM - 1); in e1000_get_cable_length()
4965 *min_length = ((e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length()
4967 (e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length()
4977 * e1000_check_polarity - Check the cable polarity
4978 * @hw: Struct containing variables accessed by shared code
4979 * @polarity: output parameter : 0 - Polarity is not reversed
4980 * 1 - Polarity is reversed.
4982 * returns: - E1000_ERR_XXX
4991 static s32 e1000_check_polarity(struct e1000_hw *hw, in e1000_check_polarity() argument
4997 if (hw->phy_type == e1000_phy_m88) { in e1000_check_polarity()
4999 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, in e1000_check_polarity()
5007 } else if (hw->phy_type == e1000_phy_igp) { in e1000_check_polarity()
5009 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS, in e1000_check_polarity()
5021 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG, in e1000_check_polarity()
5044 * e1000_check_downshift - Check if Downshift occurred
5045 * @hw: Struct containing variables accessed by shared code
5047 * returns: - E1000_ERR_XXX
5055 static s32 e1000_check_downshift(struct e1000_hw *hw) in e1000_check_downshift() argument
5060 if (hw->phy_type == e1000_phy_igp) { in e1000_check_downshift()
5061 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH, in e1000_check_downshift()
5066 hw->speed_downgraded = in e1000_check_downshift()
5068 } else if (hw->phy_type == e1000_phy_m88) { in e1000_check_downshift()
5069 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, in e1000_check_downshift()
5074 hw->speed_downgraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) >> in e1000_check_downshift()
5088 static s32 e1000_1000Mb_check_cable_length(struct e1000_hw *hw) in e1000_1000Mb_check_cable_length() argument
5094 ret_val = e1000_get_cable_length(hw, &min_length, &max_length); in e1000_1000Mb_check_cable_length()
5098 if (hw->dsp_config_state != e1000_dsp_config_enabled) in e1000_1000Mb_check_cable_length()
5103 ret_val = e1000_read_phy_reg(hw, dsp_reg_array[i], in e1000_1000Mb_check_cable_length()
5110 ret_val = e1000_write_phy_reg(hw, dsp_reg_array[i], in e1000_1000Mb_check_cable_length()
5115 hw->dsp_config_state = e1000_dsp_config_activated; in e1000_1000Mb_check_cable_length()
5121 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_1000Mb_check_cable_length()
5127 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, in e1000_1000Mb_check_cable_length()
5134 hw->ffe_config_state = e1000_ffe_config_active; in e1000_1000Mb_check_cable_length()
5136 ret_val = e1000_write_phy_reg(hw, in e1000_1000Mb_check_cable_length()
5155 * @hw: Struct containing variables accessed by shared code
5158 * returns: - E1000_ERR_PHY if fail to read/write the PHY
5165 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up) in e1000_config_dsp_after_link_change() argument
5170 if (hw->phy_type != e1000_phy_igp) in e1000_config_dsp_after_link_change()
5174 ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex); in e1000_config_dsp_after_link_change()
5181 ret_val = e1000_1000Mb_check_cable_length(hw); in e1000_config_dsp_after_link_change()
5186 if (hw->dsp_config_state == e1000_dsp_config_activated) { in e1000_config_dsp_after_link_change()
5191 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data); in e1000_config_dsp_after_link_change()
5197 ret_val = e1000_write_phy_reg(hw, 0x2F5B, 0x0003); in e1000_config_dsp_after_link_change()
5204 ret_val = e1000_write_phy_reg(hw, 0x0000, in e1000_config_dsp_after_link_change()
5210 e1000_read_phy_reg(hw, dsp_reg_array[i], in e1000_config_dsp_after_link_change()
5219 e1000_write_phy_reg(hw, dsp_reg_array[i], in e1000_config_dsp_after_link_change()
5225 ret_val = e1000_write_phy_reg(hw, 0x0000, in e1000_config_dsp_after_link_change()
5234 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data); in e1000_config_dsp_after_link_change()
5239 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_config_dsp_after_link_change()
5242 if (hw->ffe_config_state == e1000_ffe_config_active) { in e1000_config_dsp_after_link_change()
5247 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data); in e1000_config_dsp_after_link_change()
5253 ret_val = e1000_write_phy_reg(hw, 0x2F5B, 0x0003); in e1000_config_dsp_after_link_change()
5260 ret_val = e1000_write_phy_reg(hw, 0x0000, in e1000_config_dsp_after_link_change()
5265 e1000_write_phy_reg(hw, IGP01E1000_PHY_DSP_FFE, in e1000_config_dsp_after_link_change()
5270 ret_val = e1000_write_phy_reg(hw, 0x0000, in e1000_config_dsp_after_link_change()
5279 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data); in e1000_config_dsp_after_link_change()
5284 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_config_dsp_after_link_change()
5291 * e1000_set_phy_mode - Set PHY to class A mode
5292 * @hw: Struct containing variables accessed by shared code
5296 * 2. Restart auto-negotiation or force link.
5298 static s32 e1000_set_phy_mode(struct e1000_hw *hw) in e1000_set_phy_mode() argument
5303 if ((hw->mac_type == e1000_82545_rev_3) && in e1000_set_phy_mode()
5304 (hw->media_type == e1000_media_type_copper)) { in e1000_set_phy_mode()
5306 e1000_read_eeprom(hw, EEPROM_PHY_CLASS_WORD, 1, in e1000_set_phy_mode()
5314 e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_phy_mode()
5319 e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, in e1000_set_phy_mode()
5324 hw->phy_reset_disable = false; in e1000_set_phy_mode()
5332 * e1000_set_d3_lplu_state - set d3 link power state
5333 * @hw: Struct containing variables accessed by shared code
5341 * returns: - E1000_ERR_PHY if fail to read/write the PHY
5344 static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active) in e1000_set_d3_lplu_state() argument
5349 if (hw->phy_type != e1000_phy_igp) in e1000_set_d3_lplu_state()
5356 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5357 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5359 e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data); in e1000_set_d3_lplu_state()
5365 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5366 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5369 e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO, in e1000_set_d3_lplu_state()
5380 if (hw->smart_speed == e1000_smart_speed_on) { in e1000_set_d3_lplu_state()
5382 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state()
5389 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state()
5393 } else if (hw->smart_speed == e1000_smart_speed_off) { in e1000_set_d3_lplu_state()
5395 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state()
5402 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state()
5407 } else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT) || in e1000_set_d3_lplu_state()
5408 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL) || in e1000_set_d3_lplu_state()
5409 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) { in e1000_set_d3_lplu_state()
5410 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5411 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5414 e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO, in e1000_set_d3_lplu_state()
5422 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state()
5429 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state()
5439 * @hw: Struct containing variables accessed by shared code
5443 static s32 e1000_set_vco_speed(struct e1000_hw *hw) in e1000_set_vco_speed() argument
5449 switch (hw->mac_type) { in e1000_set_vco_speed()
5460 e1000_read_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, &default_page); in e1000_set_vco_speed()
5464 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005); in e1000_set_vco_speed()
5468 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed()
5473 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed()
5479 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004); in e1000_set_vco_speed()
5483 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed()
5488 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed()
5493 e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, default_page); in e1000_set_vco_speed()
5501 * e1000_enable_mng_pass_thru - check for bmc pass through
5502 * @hw: Struct containing variables accessed by shared code
5505 * returns: - true/false
5507 u32 e1000_enable_mng_pass_thru(struct e1000_hw *hw) in e1000_enable_mng_pass_thru() argument
5511 if (hw->asf_firmware_present) { in e1000_enable_mng_pass_thru()
5523 static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw) in e1000_polarity_reversal_workaround() argument
5533 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); in e1000_polarity_reversal_workaround()
5536 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF); in e1000_polarity_reversal_workaround()
5540 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000); in e1000_polarity_reversal_workaround()
5544 /* This loop will early-out if the NO link condition has been met. */ in e1000_polarity_reversal_workaround()
5545 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround()
5550 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround()
5554 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround()
5566 /* Now we will re-enable th transmitter on the PHY */ in e1000_polarity_reversal_workaround()
5568 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); in e1000_polarity_reversal_workaround()
5572 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0); in e1000_polarity_reversal_workaround()
5576 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00); in e1000_polarity_reversal_workaround()
5580 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000); in e1000_polarity_reversal_workaround()
5584 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000); in e1000_polarity_reversal_workaround()
5588 /* This loop will early-out if the link condition has been met. */ in e1000_polarity_reversal_workaround()
5589 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround()
5594 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround()
5598 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround()
5611 * @hw: Struct containing variables accessed by shared code
5614 * returns: - E1000_ERR_RESET if fail to reset MAC
5617 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw) in e1000_get_auto_rd_done() argument
5625 * @hw: Struct containing variables accessed by shared code
5628 * returns: - E1000_ERR_RESET if fail to reset MAC
5631 static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw) in e1000_get_phy_cfg_done() argument