Lines Matching +full:suppress +full:- +full:preamble
1 // SPDX-License-Identifier: GPL-2.0+
17 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
20 * Copyright (c) 2004-2006 Macq Electronique SA.
22 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
140 .name = "imx25-fec",
143 .name = "imx27-fec",
146 .name = "imx28-fec",
149 .name = "imx6q-fec",
152 .name = "mvf600-fec",
155 .name = "imx6sx-fec",
158 .name = "imx6ul-fec",
177 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
178 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
179 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
180 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
181 { .compatible = "fsl,mvf600-fec", .data = &fec_devtype[MVF600_FEC], },
182 { .compatible = "fsl,imx6sx-fec", .data = &fec_devtype[IMX6SX_FEC], },
183 { .compatible = "fsl,imx6ul-fec", .data = &fec_devtype[IMX6UL_FEC], },
195 * if this is non-zero then assume it is the address to get MAC from.
217 #define PKT_MAXBUF_SIZE (round_down(2048 - 64, 64))
275 ((addr >= txq->tso_hdrs_dma) && \
276 (addr < txq->tso_hdrs_dma + txq->bd.ring_size * TSO_HEADER_SIZE))
283 return (bdp >= bd->last) ? bd->base in fec_enet_get_nextdesc()
284 : (struct bufdesc *)(((void *)bdp) + bd->dsize); in fec_enet_get_nextdesc()
290 return (bdp <= bd->base) ? bd->last in fec_enet_get_prevdesc()
291 : (struct bufdesc *)(((void *)bdp) - bd->dsize); in fec_enet_get_prevdesc()
297 return ((const char *)bdp - (const char *)bd->base) >> bd->dsize_log2; in fec_enet_get_bd_index()
304 entries = (((const char *)txq->dirty_tx - in fec_enet_get_free_txdesc_num()
305 (const char *)txq->bd.cur) >> txq->bd.dsize_log2) - 1; in fec_enet_get_free_txdesc_num()
307 return entries >= 0 ? entries : entries + txq->bd.ring_size; in fec_enet_get_free_txdesc_num()
339 txq = fep->tx_queue[0]; in fec_dump()
340 bdp = txq->bd.base; in fec_dump()
345 bdp == txq->bd.cur ? 'S' : ' ', in fec_dump()
346 bdp == txq->dirty_tx ? 'H' : ' ', in fec_dump()
347 fec16_to_cpu(bdp->cbd_sc), in fec_dump()
348 fec32_to_cpu(bdp->cbd_bufaddr), in fec_dump()
349 fec16_to_cpu(bdp->cbd_datlen), in fec_dump()
350 txq->tx_skbuff[index]); in fec_dump()
351 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_dump()
353 } while (bdp != txq->bd.base); in fec_dump()
358 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; in is_ipv4_pkt()
365 if (skb->ip_summed != CHECKSUM_PARTIAL) in fec_enet_clear_csum()
369 return -1; in fec_enet_clear_csum()
372 ip_hdr(skb)->check = 0; in fec_enet_clear_csum()
373 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0; in fec_enet_clear_csum()
384 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
386 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_frag_skb()
397 this_frag = &skb_shinfo(skb)->frags[frag]; in fec_enet_txq_submit_frag_skb()
398 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
401 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_frag_skb()
404 frag_len = skb_frag_size(&skb_shinfo(skb)->frags[frag]); in fec_enet_txq_submit_frag_skb()
407 if (frag == nr_frags - 1) { in fec_enet_txq_submit_frag_skb()
409 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
411 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_frag_skb()
412 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_frag_skb()
417 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
418 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_frag_skb()
419 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_frag_skb()
420 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_frag_skb()
422 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_frag_skb()
423 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_frag_skb()
428 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
429 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_frag_skb()
430 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_frag_skb()
431 memcpy(txq->tx_bounce[index], bufaddr, frag_len); in fec_enet_txq_submit_frag_skb()
432 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_frag_skb()
434 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_frag_skb()
438 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len, in fec_enet_txq_submit_frag_skb()
440 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_frag_skb()
446 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_frag_skb()
447 bdp->cbd_datlen = cpu_to_fec16(frag_len); in fec_enet_txq_submit_frag_skb()
452 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_frag_skb()
457 bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
459 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
460 dma_unmap_single(&fep->pdev->dev, fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_txq_submit_frag_skb()
461 fec16_to_cpu(bdp->cbd_datlen), DMA_TO_DEVICE); in fec_enet_txq_submit_frag_skb()
463 return ERR_PTR(-ENOMEM); in fec_enet_txq_submit_frag_skb()
470 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_skb()
488 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_skb()
495 bdp = txq->bd.cur; in fec_enet_txq_submit_skb()
497 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_skb()
501 bufaddr = skb->data; in fec_enet_txq_submit_skb()
504 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_skb()
505 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_skb()
506 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_skb()
507 memcpy(txq->tx_bounce[index], skb->data, buflen); in fec_enet_txq_submit_skb()
508 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_skb()
510 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_skb()
515 addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE); in fec_enet_txq_submit_skb()
516 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_skb()
526 dma_unmap_single(&fep->pdev->dev, addr, in fec_enet_txq_submit_skb()
533 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
535 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_skb()
536 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
540 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_skb()
541 bdp->cbd_datlen = cpu_to_fec16(buflen); in fec_enet_txq_submit_skb()
543 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
547 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && in fec_enet_txq_submit_skb()
548 fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
549 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in fec_enet_txq_submit_skb()
551 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_skb()
552 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_skb()
554 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_skb()
557 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_skb()
558 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_skb()
561 index = fec_enet_get_bd_index(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
563 txq->tx_skbuff[index] = skb; in fec_enet_txq_submit_skb()
574 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_skb()
577 bdp = fec_enet_get_nextdesc(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
582 * txq->bd.cur. in fec_enet_txq_submit_skb()
585 txq->bd.cur = bdp; in fec_enet_txq_submit_skb()
588 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_skb()
605 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_data_tso()
610 if (((unsigned long) data) & fep->tx_align || in fec_enet_txq_put_data_tso()
611 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_data_tso()
612 memcpy(txq->tx_bounce[index], data, size); in fec_enet_txq_put_data_tso()
613 data = txq->tx_bounce[index]; in fec_enet_txq_put_data_tso()
615 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_data_tso()
619 addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE); in fec_enet_txq_put_data_tso()
620 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_put_data_tso()
627 bdp->cbd_datlen = cpu_to_fec16(size); in fec_enet_txq_put_data_tso()
628 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_put_data_tso()
630 if (fep->bufdesc_ex) { in fec_enet_txq_put_data_tso()
631 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_data_tso()
632 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_data_tso()
633 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_data_tso()
635 ebdp->cbd_bdu = 0; in fec_enet_txq_put_data_tso()
636 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_data_tso()
644 if (fep->bufdesc_ex) in fec_enet_txq_put_data_tso()
645 ebdp->cbd_esc |= cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_txq_put_data_tso()
648 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_data_tso()
666 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_hdr_tso()
670 bufaddr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
671 dmabuf = txq->tso_hdrs_dma + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
672 if (((unsigned long)bufaddr) & fep->tx_align || in fec_enet_txq_put_hdr_tso()
673 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_hdr_tso()
674 memcpy(txq->tx_bounce[index], skb->data, hdr_len); in fec_enet_txq_put_hdr_tso()
675 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_put_hdr_tso()
677 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_hdr_tso()
680 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr, in fec_enet_txq_put_hdr_tso()
682 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) { in fec_enet_txq_put_hdr_tso()
690 bdp->cbd_bufaddr = cpu_to_fec32(dmabuf); in fec_enet_txq_put_hdr_tso()
691 bdp->cbd_datlen = cpu_to_fec16(hdr_len); in fec_enet_txq_put_hdr_tso()
693 if (fep->bufdesc_ex) { in fec_enet_txq_put_hdr_tso()
694 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_hdr_tso()
695 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_hdr_tso()
696 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_hdr_tso()
698 ebdp->cbd_bdu = 0; in fec_enet_txq_put_hdr_tso()
699 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_hdr_tso()
702 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_hdr_tso()
713 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_tso()
725 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_tso()
734 total_len = skb->len - hdr_len; in fec_enet_txq_submit_tso()
738 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
739 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len); in fec_enet_txq_submit_tso()
740 total_len -= data_left; in fec_enet_txq_submit_tso()
743 hdr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_submit_tso()
753 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
754 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
763 data_left -= size; in fec_enet_txq_submit_tso()
767 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
771 txq->tx_skbuff[index] = skb; in fec_enet_txq_submit_tso()
774 txq->bd.cur = bdp; in fec_enet_txq_submit_tso()
777 if (!(fep->quirks & FEC_QUIRK_ERR007885) || in fec_enet_txq_submit_tso()
778 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
779 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
780 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
781 !readl(txq->bd.reg_desc_active)) in fec_enet_txq_submit_tso()
782 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_tso()
802 txq = fep->tx_queue[queue]; in fec_enet_start_xmit()
813 if (entries_free <= txq->tx_stop_threshold) in fec_enet_start_xmit()
830 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_bd_init()
832 rxq = fep->rx_queue[q]; in fec_enet_bd_init()
833 bdp = rxq->bd.base; in fec_enet_bd_init()
835 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_bd_init()
838 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
839 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_bd_init()
841 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
842 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_bd_init()
846 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_bd_init()
847 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
849 rxq->bd.cur = rxq->bd.base; in fec_enet_bd_init()
852 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_bd_init()
854 txq = fep->tx_queue[q]; in fec_enet_bd_init()
855 bdp = txq->bd.base; in fec_enet_bd_init()
856 txq->bd.cur = bdp; in fec_enet_bd_init()
858 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_bd_init()
860 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
861 if (bdp->cbd_bufaddr && in fec_enet_bd_init()
862 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_bd_init()
863 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
864 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
865 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
867 if (txq->tx_skbuff[i]) { in fec_enet_bd_init()
868 dev_kfree_skb_any(txq->tx_skbuff[i]); in fec_enet_bd_init()
869 txq->tx_skbuff[i] = NULL; in fec_enet_bd_init()
871 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_bd_init()
872 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_bd_init()
876 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_bd_init()
877 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
878 txq->dirty_tx = bdp; in fec_enet_bd_init()
887 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_active_rxring()
888 writel(0, fep->rx_queue[i]->bd.reg_desc_active); in fec_enet_active_rxring()
898 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_enable_ring()
899 rxq = fep->rx_queue[i]; in fec_enet_enable_ring()
900 writel(rxq->bd.dma, fep->hwp + FEC_R_DES_START(i)); in fec_enet_enable_ring()
901 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i)); in fec_enet_enable_ring()
906 fep->hwp + FEC_RCMR(i)); in fec_enet_enable_ring()
909 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_enable_ring()
910 txq = fep->tx_queue[i]; in fec_enet_enable_ring()
911 writel(txq->bd.dma, fep->hwp + FEC_X_DES_START(i)); in fec_enet_enable_ring()
916 fep->hwp + FEC_DMA_CFG(i)); in fec_enet_enable_ring()
926 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_reset_skb()
927 txq = fep->tx_queue[i]; in fec_enet_reset_skb()
929 for (j = 0; j < txq->bd.ring_size; j++) { in fec_enet_reset_skb()
930 if (txq->tx_skbuff[j]) { in fec_enet_reset_skb()
931 dev_kfree_skb_any(txq->tx_skbuff[j]); in fec_enet_reset_skb()
932 txq->tx_skbuff[j] = NULL; in fec_enet_reset_skb()
956 if (fep->quirks & FEC_QUIRK_HAS_AVB) { in fec_restart()
957 writel(0, fep->hwp + FEC_ECNTRL); in fec_restart()
959 writel(1, fep->hwp + FEC_ECNTRL); in fec_restart()
964 * enet-mac reset will reset mac address registers too, in fec_restart()
967 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN); in fec_restart()
969 fep->hwp + FEC_ADDR_LOW); in fec_restart()
971 fep->hwp + FEC_ADDR_HIGH); in fec_restart()
974 writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT); in fec_restart()
984 if (fep->full_duplex == DUPLEX_FULL) { in fec_restart()
986 writel(0x04, fep->hwp + FEC_X_CNTRL); in fec_restart()
990 writel(0x0, fep->hwp + FEC_X_CNTRL); in fec_restart()
994 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_restart()
997 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_restart()
998 val = readl(fep->hwp + FEC_RACC); in fec_restart()
1001 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED) in fec_restart()
1006 writel(val, fep->hwp + FEC_RACC); in fec_restart()
1007 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL); in fec_restart()
1013 * differently on enet-mac. in fec_restart()
1015 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1020 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII || in fec_restart()
1021 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in fec_restart()
1022 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID || in fec_restart()
1023 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) in fec_restart()
1025 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1031 if (ndev->phydev) { in fec_restart()
1032 if (ndev->phydev->speed == SPEED_1000) in fec_restart()
1034 else if (ndev->phydev->speed == SPEED_100) in fec_restart()
1041 if (fep->quirks & FEC_QUIRK_USE_GASKET) { in fec_restart()
1044 writel(0, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1045 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4) in fec_restart()
1053 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1055 if (ndev->phydev && ndev->phydev->speed == SPEED_10) in fec_restart()
1057 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); in fec_restart()
1059 /* re-enable the gasket */ in fec_restart()
1060 writel(2, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1067 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) || in fec_restart()
1068 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) && in fec_restart()
1069 ndev->phydev && ndev->phydev->pause)) { in fec_restart()
1073 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM); in fec_restart()
1074 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL); in fec_restart()
1075 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM); in fec_restart()
1076 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL); in fec_restart()
1079 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD); in fec_restart()
1085 writel(rcntl, fep->hwp + FEC_R_CNTRL); in fec_restart()
1090 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); in fec_restart()
1091 writel(0, fep->hwp + FEC_HASH_TABLE_LOW); in fec_restart()
1094 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1098 writel(1 << 8, fep->hwp + FEC_X_WMRK); in fec_restart()
1101 if (fep->bufdesc_ex) in fec_restart()
1106 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); in fec_restart()
1110 writel(ecntl, fep->hwp + FEC_ECNTRL); in fec_restart()
1113 if (fep->bufdesc_ex) in fec_restart()
1117 if (fep->link) in fec_restart()
1118 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_restart()
1120 writel(0, fep->hwp + FEC_IMASK); in fec_restart()
1129 struct fec_platform_data *pdata = fep->pdev->dev.platform_data; in fec_enet_stop_mode()
1130 struct fec_stop_mode_gpr *stop_gpr = &fep->stop_gpr; in fec_enet_stop_mode()
1132 if (stop_gpr->gpr) { in fec_enet_stop_mode()
1134 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1135 BIT(stop_gpr->bit), in fec_enet_stop_mode()
1136 BIT(stop_gpr->bit)); in fec_enet_stop_mode()
1138 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1139 BIT(stop_gpr->bit), 0); in fec_enet_stop_mode()
1140 } else if (pdata && pdata->sleep_mode_enable) { in fec_enet_stop_mode()
1141 pdata->sleep_mode_enable(enabled); in fec_enet_stop_mode()
1149 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8); in fec_stop()
1153 if (fep->link) { in fec_stop()
1154 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */ in fec_stop()
1156 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA)) in fec_stop()
1164 if (!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_stop()
1165 if (fep->quirks & FEC_QUIRK_HAS_AVB) { in fec_stop()
1166 writel(0, fep->hwp + FEC_ECNTRL); in fec_stop()
1168 writel(1, fep->hwp + FEC_ECNTRL); in fec_stop()
1171 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_stop()
1173 writel(FEC_DEFAULT_IMASK | FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK); in fec_stop()
1174 val = readl(fep->hwp + FEC_ECNTRL); in fec_stop()
1176 writel(val, fep->hwp + FEC_ECNTRL); in fec_stop()
1179 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_stop()
1182 if (fep->quirks & FEC_QUIRK_ENET_MAC && in fec_stop()
1183 !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_stop()
1184 writel(2, fep->hwp + FEC_ECNTRL); in fec_stop()
1185 writel(rmii_mode, fep->hwp + FEC_R_CNTRL); in fec_stop()
1197 ndev->stats.tx_errors++; in fec_timeout()
1199 schedule_work(&fep->tx_timeout_work); in fec_timeout()
1206 struct net_device *ndev = fep->netdev; in fec_enet_timeout_work()
1210 napi_disable(&fep->napi); in fec_enet_timeout_work()
1215 napi_enable(&fep->napi); in fec_enet_timeout_work()
1227 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1228 ns = timecounter_cyc2time(&fep->tc, ts); in fec_enet_hwtstamp()
1229 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1232 hwtstamps->hwtstamp = ns_to_ktime(ns); in fec_enet_hwtstamp()
1249 txq = fep->tx_queue[queue_id]; in fec_enet_tx_queue()
1252 bdp = txq->dirty_tx; in fec_enet_tx_queue()
1255 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1257 while (bdp != READ_ONCE(txq->bd.cur)) { in fec_enet_tx_queue()
1260 status = fec16_to_cpu(READ_ONCE(bdp->cbd_sc)); in fec_enet_tx_queue()
1264 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_tx_queue()
1266 skb = txq->tx_skbuff[index]; in fec_enet_tx_queue()
1267 txq->tx_skbuff[index] = NULL; in fec_enet_tx_queue()
1268 if (!IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_tx_queue()
1269 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1270 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1271 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1273 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1281 ndev->stats.tx_errors++; in fec_enet_tx_queue()
1283 ndev->stats.tx_heartbeat_errors++; in fec_enet_tx_queue()
1285 ndev->stats.tx_window_errors++; in fec_enet_tx_queue()
1287 ndev->stats.tx_aborted_errors++; in fec_enet_tx_queue()
1289 ndev->stats.tx_fifo_errors++; in fec_enet_tx_queue()
1291 ndev->stats.tx_carrier_errors++; in fec_enet_tx_queue()
1293 ndev->stats.tx_packets++; in fec_enet_tx_queue()
1294 ndev->stats.tx_bytes += skb->len; in fec_enet_tx_queue()
1301 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS && in fec_enet_tx_queue()
1302 fep->hwts_tx_en) && in fec_enet_tx_queue()
1303 fep->bufdesc_ex) { in fec_enet_tx_queue()
1307 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), &shhwtstamps); in fec_enet_tx_queue()
1315 ndev->stats.collisions++; in fec_enet_tx_queue()
1324 txq->dirty_tx = bdp; in fec_enet_tx_queue()
1327 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1333 if (entries_free >= txq->tx_wake_threshold) in fec_enet_tx_queue()
1339 if (bdp != txq->bd.cur && in fec_enet_tx_queue()
1340 readl(txq->bd.reg_desc_active) == 0) in fec_enet_tx_queue()
1341 writel(0, txq->bd.reg_desc_active); in fec_enet_tx_queue()
1350 for (i = fep->num_tx_queues - 1; i >= 0; i--) in fec_enet_tx()
1360 off = ((unsigned long)skb->data) & fep->rx_align; in fec_enet_new_rxbdp()
1362 skb_reserve(skb, fep->rx_align + 1 - off); in fec_enet_new_rxbdp()
1364 …bdp->cbd_bufaddr = cpu_to_fec32(dma_map_single(&fep->pdev->dev, skb->data, FEC_ENET_RX_FRSIZE - fe… in fec_enet_new_rxbdp()
1365 if (dma_mapping_error(&fep->pdev->dev, fec32_to_cpu(bdp->cbd_bufaddr))) { in fec_enet_new_rxbdp()
1368 return -ENOMEM; in fec_enet_new_rxbdp()
1380 if (length > fep->rx_copybreak) in fec_enet_copybreak()
1387 dma_sync_single_for_cpu(&fep->pdev->dev, in fec_enet_copybreak()
1388 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_copybreak()
1389 FEC_ENET_RX_FRSIZE - fep->rx_align, in fec_enet_copybreak()
1392 memcpy(new_skb->data, (*skb)->data, length); in fec_enet_copybreak()
1394 swap_buffer2(new_skb->data, (*skb)->data, length); in fec_enet_copybreak()
1422 bool need_swap = fep->quirks & FEC_QUIRK_SWAP_FRAME; in fec_enet_rx_queue()
1427 rxq = fep->rx_queue[queue_id]; in fec_enet_rx_queue()
1432 bdp = rxq->bd.cur; in fec_enet_rx_queue()
1434 while (!((status = fec16_to_cpu(bdp->cbd_sc)) & BD_ENET_RX_EMPTY)) { in fec_enet_rx_queue()
1440 writel(FEC_ENET_RXF, fep->hwp + FEC_IEVENT); in fec_enet_rx_queue()
1447 ndev->stats.rx_errors++; in fec_enet_rx_queue()
1450 ndev->stats.rx_fifo_errors++; in fec_enet_rx_queue()
1456 ndev->stats.rx_length_errors++; in fec_enet_rx_queue()
1461 ndev->stats.rx_crc_errors++; in fec_enet_rx_queue()
1464 ndev->stats.rx_frame_errors++; in fec_enet_rx_queue()
1469 ndev->stats.rx_packets++; in fec_enet_rx_queue()
1470 pkt_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_rx_queue()
1471 ndev->stats.rx_bytes += pkt_len; in fec_enet_rx_queue()
1473 index = fec_enet_get_bd_index(bdp, &rxq->bd); in fec_enet_rx_queue()
1474 skb = rxq->rx_skbuff[index]; in fec_enet_rx_queue()
1480 is_copybreak = fec_enet_copybreak(ndev, &skb, bdp, pkt_len - 4, in fec_enet_rx_queue()
1485 ndev->stats.rx_dropped++; in fec_enet_rx_queue()
1488 dma_unmap_single(&fep->pdev->dev, in fec_enet_rx_queue()
1489 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_rx_queue()
1490 FEC_ENET_RX_FRSIZE - fep->rx_align, in fec_enet_rx_queue()
1494 prefetch(skb->data - NET_IP_ALIGN); in fec_enet_rx_queue()
1495 skb_put(skb, pkt_len - 4); in fec_enet_rx_queue()
1496 data = skb->data; in fec_enet_rx_queue()
1502 if (fep->quirks & FEC_QUIRK_HAS_RACC) in fec_enet_rx_queue()
1508 if (fep->bufdesc_ex) in fec_enet_rx_queue()
1513 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) && in fec_enet_rx_queue()
1514 fep->bufdesc_ex && in fec_enet_rx_queue()
1515 (ebdp->cbd_esc & cpu_to_fec32(BD_ENET_RX_VLAN))) { in fec_enet_rx_queue()
1519 vlan_tag = ntohs(vlan_header->h_vlan_TCI); in fec_enet_rx_queue()
1523 memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2); in fec_enet_rx_queue()
1527 skb->protocol = eth_type_trans(skb, ndev); in fec_enet_rx_queue()
1530 if (fep->hwts_rx_en && fep->bufdesc_ex) in fec_enet_rx_queue()
1531 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), in fec_enet_rx_queue()
1534 if (fep->bufdesc_ex && in fec_enet_rx_queue()
1535 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) { in fec_enet_rx_queue()
1536 if (!(ebdp->cbd_esc & cpu_to_fec32(FLAG_RX_CSUM_ERROR))) { in fec_enet_rx_queue()
1538 skb->ip_summed = CHECKSUM_UNNECESSARY; in fec_enet_rx_queue()
1551 napi_gro_receive(&fep->napi, skb); in fec_enet_rx_queue()
1554 dma_sync_single_for_device(&fep->pdev->dev, in fec_enet_rx_queue()
1555 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_rx_queue()
1556 FEC_ENET_RX_FRSIZE - fep->rx_align, in fec_enet_rx_queue()
1559 rxq->rx_skbuff[index] = skb_new; in fec_enet_rx_queue()
1570 if (fep->bufdesc_ex) { in fec_enet_rx_queue()
1573 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_rx_queue()
1574 ebdp->cbd_prot = 0; in fec_enet_rx_queue()
1575 ebdp->cbd_bdu = 0; in fec_enet_rx_queue()
1581 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_rx_queue()
1584 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_rx_queue()
1590 writel(0, rxq->bd.reg_desc_active); in fec_enet_rx_queue()
1592 rxq->bd.cur = bdp; in fec_enet_rx_queue()
1602 for (i = fep->num_rx_queues - 1; i >= 0; i--) in fec_enet_rx()
1603 done += fec_enet_rx_queue(ndev, budget - done, i); in fec_enet_rx()
1612 int_events = readl(fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1617 writel(int_events, fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1629 if (fec_enet_collect_events(fep) && fep->link) { in fec_enet_interrupt()
1632 if (napi_schedule_prep(&fep->napi)) { in fec_enet_interrupt()
1634 writel(0, fep->hwp + FEC_IMASK); in fec_enet_interrupt()
1635 __napi_schedule(&fep->napi); in fec_enet_interrupt()
1644 struct net_device *ndev = napi->dev; in fec_enet_rx_napi()
1649 done += fec_enet_rx(ndev, budget - done); in fec_enet_rx_napi()
1655 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_enet_rx_napi()
1661 /* ------------------------------------------------------------------------- */
1665 struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev); in fec_get_mac()
1680 struct device_node *np = fep->pdev->dev.of_node; in fec_get_mac()
1697 iap = (unsigned char *)&pdata->mac; in fec_get_mac()
1706 cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW)); in fec_get_mac()
1708 cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16); in fec_get_mac()
1717 dev_err(&fep->pdev->dev, "Invalid MAC address: %pM\n", iap); in fec_get_mac()
1719 dev_info(&fep->pdev->dev, "Using random MAC address: %pM\n", in fec_get_mac()
1720 ndev->dev_addr); in fec_get_mac()
1724 memcpy(ndev->dev_addr, iap, ETH_ALEN); in fec_get_mac()
1728 ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id; in fec_get_mac()
1731 /* ------------------------------------------------------------------------- */
1739 struct phy_device *phy_dev = ndev->phydev; in fec_enet_adjust_link()
1748 fep->link = 0; in fec_enet_adjust_link()
1749 } else if (phy_dev->link) { in fec_enet_adjust_link()
1750 if (!fep->link) { in fec_enet_adjust_link()
1751 fep->link = phy_dev->link; in fec_enet_adjust_link()
1755 if (fep->full_duplex != phy_dev->duplex) { in fec_enet_adjust_link()
1756 fep->full_duplex = phy_dev->duplex; in fec_enet_adjust_link()
1760 if (phy_dev->speed != fep->speed) { in fec_enet_adjust_link()
1761 fep->speed = phy_dev->speed; in fec_enet_adjust_link()
1767 napi_disable(&fep->napi); in fec_enet_adjust_link()
1772 napi_enable(&fep->napi); in fec_enet_adjust_link()
1775 if (fep->link) { in fec_enet_adjust_link()
1776 napi_disable(&fep->napi); in fec_enet_adjust_link()
1780 napi_enable(&fep->napi); in fec_enet_adjust_link()
1781 fep->link = phy_dev->link; in fec_enet_adjust_link()
1795 ret = readl_poll_timeout_atomic(fep->hwp + FEC_IEVENT, ievent, in fec_enet_mdio_wait()
1799 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mdio_wait()
1806 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read()
1807 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read()
1823 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read()
1828 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_read()
1844 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read()
1849 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read()
1853 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read()
1865 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write()
1866 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write()
1882 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write()
1887 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_write()
1900 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write()
1905 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write()
1917 struct phy_device *phy_dev = ndev->phydev; in fec_enet_phy_reset_after_clk_enable()
1921 } else if (fep->phy_node) { in fec_enet_phy_reset_after_clk_enable()
1929 phy_dev = of_phy_find_device(fep->phy_node); in fec_enet_phy_reset_after_clk_enable()
1931 put_device(&phy_dev->mdio.dev); in fec_enet_phy_reset_after_clk_enable()
1941 ret = clk_prepare_enable(fep->clk_enet_out); in fec_enet_clk_enable()
1945 if (fep->clk_ptp) { in fec_enet_clk_enable()
1946 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1947 ret = clk_prepare_enable(fep->clk_ptp); in fec_enet_clk_enable()
1949 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1952 fep->ptp_clk_on = true; in fec_enet_clk_enable()
1954 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1957 ret = clk_prepare_enable(fep->clk_ref); in fec_enet_clk_enable()
1963 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
1964 if (fep->clk_ptp) { in fec_enet_clk_enable()
1965 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1966 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
1967 fep->ptp_clk_on = false; in fec_enet_clk_enable()
1968 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1970 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
1976 if (fep->clk_ptp) { in fec_enet_clk_enable()
1977 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1978 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
1979 fep->ptp_clk_on = false; in fec_enet_clk_enable()
1980 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
1983 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
1995 int dev_id = fep->dev_id; in fec_enet_mii_probe()
1997 if (fep->phy_node) { in fec_enet_mii_probe()
1998 phy_dev = of_phy_connect(ndev, fep->phy_node, in fec_enet_mii_probe()
2000 fep->phy_interface); in fec_enet_mii_probe()
2003 return -ENODEV; in fec_enet_mii_probe()
2008 if (!mdiobus_is_registered_device(fep->mii_bus, phy_id)) in fec_enet_mii_probe()
2010 if (dev_id--) in fec_enet_mii_probe()
2012 strlcpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2018 strlcpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2025 fep->phy_interface); in fec_enet_mii_probe()
2034 if (fep->quirks & FEC_QUIRK_HAS_GBIT) { in fec_enet_mii_probe()
2045 fep->link = 0; in fec_enet_mii_probe()
2046 fep->full_duplex = 0; in fec_enet_mii_probe()
2060 int err = -ENXIO; in fec_enet_mii_init()
2068 * - fec0 supports MII & RMII modes while fec1 only supports RMII in fec_enet_mii_init()
2069 * - fec0 acts as the 1588 time master while fec1 is slave in fec_enet_mii_init()
2070 * - external phys can only be configured by fec0 in fec_enet_mii_init()
2080 if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) { in fec_enet_mii_init()
2083 fep->mii_bus = fec0_mii_bus; in fec_enet_mii_init()
2087 return -ENOENT; in fec_enet_mii_init()
2091 node = of_get_child_by_name(pdev->dev.of_node, "mdio"); in fec_enet_mii_init()
2093 of_property_read_u32(node, "clock-frequency", &bus_freq); in fec_enet_mii_init()
2095 "suppress-preamble"); in fec_enet_mii_init()
2102 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28 in fec_enet_mii_init()
2106 mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), bus_freq * 2); in fec_enet_mii_init()
2107 if (fep->quirks & FEC_QUIRK_ENET_MAC) in fec_enet_mii_init()
2108 mii_speed--; in fec_enet_mii_init()
2110 dev_err(&pdev->dev, in fec_enet_mii_init()
2112 clk_get_rate(fep->clk_ipg)); in fec_enet_mii_init()
2113 err = -EINVAL; in fec_enet_mii_init()
2129 holdtime = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 100000000) - 1; in fec_enet_mii_init()
2131 fep->phy_speed = mii_speed << 1 | holdtime << 8; in fec_enet_mii_init()
2134 fep->phy_speed |= BIT(7); in fec_enet_mii_init()
2136 if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) { in fec_enet_mii_init()
2139 * - writing MSCR: in fec_enet_mii_init()
2140 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2142 * - writing MMFR: in fec_enet_mii_init()
2143 * - mscr[7:0]_not_zero in fec_enet_mii_init()
2145 writel(0, fep->hwp + FEC_MII_DATA); in fec_enet_mii_init()
2148 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_enet_mii_init()
2151 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mii_init()
2153 fep->mii_bus = mdiobus_alloc(); in fec_enet_mii_init()
2154 if (fep->mii_bus == NULL) { in fec_enet_mii_init()
2155 err = -ENOMEM; in fec_enet_mii_init()
2159 fep->mii_bus->name = "fec_enet_mii_bus"; in fec_enet_mii_init()
2160 fep->mii_bus->read = fec_enet_mdio_read; in fec_enet_mii_init()
2161 fep->mii_bus->write = fec_enet_mdio_write; in fec_enet_mii_init()
2162 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in fec_enet_mii_init()
2163 pdev->name, fep->dev_id + 1); in fec_enet_mii_init()
2164 fep->mii_bus->priv = fep; in fec_enet_mii_init()
2165 fep->mii_bus->parent = &pdev->dev; in fec_enet_mii_init()
2167 err = of_mdiobus_register(fep->mii_bus, node); in fec_enet_mii_init()
2175 if (fep->quirks & FEC_QUIRK_SINGLE_MDIO) in fec_enet_mii_init()
2176 fec0_mii_bus = fep->mii_bus; in fec_enet_mii_init()
2181 mdiobus_free(fep->mii_bus); in fec_enet_mii_init()
2188 if (--mii_cnt == 0) { in fec_enet_mii_remove()
2189 mdiobus_unregister(fep->mii_bus); in fec_enet_mii_remove()
2190 mdiobus_free(fep->mii_bus); in fec_enet_mii_remove()
2199 strlcpy(info->driver, fep->pdev->dev.driver->name, in fec_enet_get_drvinfo()
2200 sizeof(info->driver)); in fec_enet_get_drvinfo()
2201 strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info)); in fec_enet_get_drvinfo()
2210 r = platform_get_resource(fep->pdev, IORESOURCE_MEM, 0); in fec_enet_get_regs_len()
2270 u32 __iomem *theregs = (u32 __iomem *)fep->hwp; in fec_enet_get_regs()
2271 struct device *dev = &fep->pdev->dev; in fec_enet_get_regs()
2280 regs->version = fec_enet_register_version; in fec_enet_get_regs()
2282 memset(buf, 0, regs->len); in fec_enet_get_regs()
2288 !(fep->quirks & FEC_QUIRK_HAS_FRREG)) in fec_enet_get_regs()
2304 if (fep->bufdesc_ex) { in fec_enet_get_ts_info()
2306 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | in fec_enet_get_ts_info()
2312 if (fep->ptp_clock) in fec_enet_get_ts_info()
2313 info->phc_index = ptp_clock_index(fep->ptp_clock); in fec_enet_get_ts_info()
2315 info->phc_index = -1; in fec_enet_get_ts_info()
2317 info->tx_types = (1 << HWTSTAMP_TX_OFF) | in fec_enet_get_ts_info()
2320 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | in fec_enet_get_ts_info()
2335 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0; in fec_enet_get_pauseparam()
2336 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0; in fec_enet_get_pauseparam()
2337 pause->rx_pause = pause->tx_pause; in fec_enet_get_pauseparam()
2345 if (!ndev->phydev) in fec_enet_set_pauseparam()
2346 return -ENODEV; in fec_enet_set_pauseparam()
2348 if (pause->tx_pause != pause->rx_pause) { in fec_enet_set_pauseparam()
2351 return -EINVAL; in fec_enet_set_pauseparam()
2354 fep->pause_flag = 0; in fec_enet_set_pauseparam()
2357 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0; in fec_enet_set_pauseparam()
2358 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0; in fec_enet_set_pauseparam()
2360 phy_set_sym_pause(ndev->phydev, pause->rx_pause, pause->tx_pause, in fec_enet_set_pauseparam()
2361 pause->autoneg); in fec_enet_set_pauseparam()
2363 if (pause->autoneg) { in fec_enet_set_pauseparam()
2366 phy_start_aneg(ndev->phydev); in fec_enet_set_pauseparam()
2369 napi_disable(&fep->napi); in fec_enet_set_pauseparam()
2374 napi_enable(&fep->napi); in fec_enet_set_pauseparam()
2454 fep->ethtool_stats[i] = readl(fep->hwp + fec_stats[i].offset); in fec_enet_update_ethtool_stats()
2465 memcpy(data, fep->ethtool_stats, FEC_STATS_SIZE); in fec_enet_get_ethtool_stats()
2487 return -EOPNOTSUPP; in fec_enet_get_sset_count()
2497 writel(FEC_MIB_CTRLSTAT_DISABLE, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
2500 writel(0, fep->hwp + fec_stats[i].offset); in fec_enet_clear_ethtool_stats()
2503 writel(0, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
2525 return us * (fep->itr_clk_rate / 64000) / 1000; in fec_enet_us_to_itr_clock()
2535 if (!fep->rx_time_itr || !fep->rx_pkts_itr || in fec_enet_itr_coal_set()
2536 !fep->tx_time_itr || !fep->tx_pkts_itr) in fec_enet_itr_coal_set()
2546 rx_itr |= FEC_ITR_ICFT(fep->rx_pkts_itr); in fec_enet_itr_coal_set()
2547 rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr)); in fec_enet_itr_coal_set()
2548 tx_itr |= FEC_ITR_ICFT(fep->tx_pkts_itr); in fec_enet_itr_coal_set()
2549 tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr)); in fec_enet_itr_coal_set()
2554 writel(tx_itr, fep->hwp + FEC_TXIC0); in fec_enet_itr_coal_set()
2555 writel(rx_itr, fep->hwp + FEC_RXIC0); in fec_enet_itr_coal_set()
2556 if (fep->quirks & FEC_QUIRK_HAS_AVB) { in fec_enet_itr_coal_set()
2557 writel(tx_itr, fep->hwp + FEC_TXIC1); in fec_enet_itr_coal_set()
2558 writel(rx_itr, fep->hwp + FEC_RXIC1); in fec_enet_itr_coal_set()
2559 writel(tx_itr, fep->hwp + FEC_TXIC2); in fec_enet_itr_coal_set()
2560 writel(rx_itr, fep->hwp + FEC_RXIC2); in fec_enet_itr_coal_set()
2569 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_get_coalesce()
2570 return -EOPNOTSUPP; in fec_enet_get_coalesce()
2572 ec->rx_coalesce_usecs = fep->rx_time_itr; in fec_enet_get_coalesce()
2573 ec->rx_max_coalesced_frames = fep->rx_pkts_itr; in fec_enet_get_coalesce()
2575 ec->tx_coalesce_usecs = fep->tx_time_itr; in fec_enet_get_coalesce()
2576 ec->tx_max_coalesced_frames = fep->tx_pkts_itr; in fec_enet_get_coalesce()
2585 struct device *dev = &fep->pdev->dev; in fec_enet_set_coalesce()
2588 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_set_coalesce()
2589 return -EOPNOTSUPP; in fec_enet_set_coalesce()
2591 if (ec->rx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
2593 return -EINVAL; in fec_enet_set_coalesce()
2596 if (ec->tx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
2598 return -EINVAL; in fec_enet_set_coalesce()
2601 cycle = fec_enet_us_to_itr_clock(ndev, ec->rx_coalesce_usecs); in fec_enet_set_coalesce()
2604 return -EINVAL; in fec_enet_set_coalesce()
2607 cycle = fec_enet_us_to_itr_clock(ndev, ec->tx_coalesce_usecs); in fec_enet_set_coalesce()
2610 return -EINVAL; in fec_enet_set_coalesce()
2613 fep->rx_time_itr = ec->rx_coalesce_usecs; in fec_enet_set_coalesce()
2614 fep->rx_pkts_itr = ec->rx_max_coalesced_frames; in fec_enet_set_coalesce()
2616 fep->tx_time_itr = ec->tx_coalesce_usecs; in fec_enet_set_coalesce()
2617 fep->tx_pkts_itr = ec->tx_max_coalesced_frames; in fec_enet_set_coalesce()
2644 switch (tuna->id) { in fec_enet_get_tunable()
2646 *(u32 *)data = fep->rx_copybreak; in fec_enet_get_tunable()
2649 ret = -EINVAL; in fec_enet_get_tunable()
2663 switch (tuna->id) { in fec_enet_set_tunable()
2665 fep->rx_copybreak = *(u32 *)data; in fec_enet_set_tunable()
2668 ret = -EINVAL; in fec_enet_set_tunable()
2680 if (fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET) { in fec_enet_get_wol()
2681 wol->supported = WAKE_MAGIC; in fec_enet_get_wol()
2682 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0; in fec_enet_get_wol()
2684 wol->supported = wol->wolopts = 0; in fec_enet_get_wol()
2693 if (!(fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET)) in fec_enet_set_wol()
2694 return -EINVAL; in fec_enet_set_wol()
2696 if (wol->wolopts & ~WAKE_MAGIC) in fec_enet_set_wol()
2697 return -EINVAL; in fec_enet_set_wol()
2699 device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC); in fec_enet_set_wol()
2700 if (device_may_wakeup(&ndev->dev)) { in fec_enet_set_wol()
2701 fep->wol_flag |= FEC_WOL_FLAG_ENABLE; in fec_enet_set_wol()
2702 if (fep->irq[0] > 0) in fec_enet_set_wol()
2703 enable_irq_wake(fep->irq[0]); in fec_enet_set_wol()
2705 fep->wol_flag &= (~FEC_WOL_FLAG_ENABLE); in fec_enet_set_wol()
2706 if (fep->irq[0] > 0) in fec_enet_set_wol()
2707 disable_irq_wake(fep->irq[0]); in fec_enet_set_wol()
2742 struct phy_device *phydev = ndev->phydev; in fec_enet_ioctl()
2745 return -EINVAL; in fec_enet_ioctl()
2748 return -ENODEV; in fec_enet_ioctl()
2750 if (fep->bufdesc_ex) { in fec_enet_ioctl()
2776 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_free_buffers()
2777 rxq = fep->rx_queue[q]; in fec_enet_free_buffers()
2778 bdp = rxq->bd.base; in fec_enet_free_buffers()
2779 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_free_buffers()
2780 skb = rxq->rx_skbuff[i]; in fec_enet_free_buffers()
2781 rxq->rx_skbuff[i] = NULL; in fec_enet_free_buffers()
2783 dma_unmap_single(&fep->pdev->dev, in fec_enet_free_buffers()
2784 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_free_buffers()
2785 FEC_ENET_RX_FRSIZE - fep->rx_align, in fec_enet_free_buffers()
2789 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_free_buffers()
2793 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_free_buffers()
2794 txq = fep->tx_queue[q]; in fec_enet_free_buffers()
2795 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_free_buffers()
2796 kfree(txq->tx_bounce[i]); in fec_enet_free_buffers()
2797 txq->tx_bounce[i] = NULL; in fec_enet_free_buffers()
2798 skb = txq->tx_skbuff[i]; in fec_enet_free_buffers()
2799 txq->tx_skbuff[i] = NULL; in fec_enet_free_buffers()
2811 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
2812 if (fep->tx_queue[i] && fep->tx_queue[i]->tso_hdrs) { in fec_enet_free_queue()
2813 txq = fep->tx_queue[i]; in fec_enet_free_queue()
2814 dma_free_coherent(&fep->pdev->dev, in fec_enet_free_queue()
2815 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_free_queue()
2816 txq->tso_hdrs, in fec_enet_free_queue()
2817 txq->tso_hdrs_dma); in fec_enet_free_queue()
2820 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_free_queue()
2821 kfree(fep->rx_queue[i]); in fec_enet_free_queue()
2822 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
2823 kfree(fep->tx_queue[i]); in fec_enet_free_queue()
2833 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_alloc_queue()
2836 ret = -ENOMEM; in fec_enet_alloc_queue()
2840 fep->tx_queue[i] = txq; in fec_enet_alloc_queue()
2841 txq->bd.ring_size = TX_RING_SIZE; in fec_enet_alloc_queue()
2842 fep->total_tx_ring_size += fep->tx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
2844 txq->tx_stop_threshold = FEC_MAX_SKB_DESCS; in fec_enet_alloc_queue()
2845 txq->tx_wake_threshold = in fec_enet_alloc_queue()
2846 (txq->bd.ring_size - txq->tx_stop_threshold) / 2; in fec_enet_alloc_queue()
2848 txq->tso_hdrs = dma_alloc_coherent(&fep->pdev->dev, in fec_enet_alloc_queue()
2849 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_alloc_queue()
2850 &txq->tso_hdrs_dma, in fec_enet_alloc_queue()
2852 if (!txq->tso_hdrs) { in fec_enet_alloc_queue()
2853 ret = -ENOMEM; in fec_enet_alloc_queue()
2858 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_alloc_queue()
2859 fep->rx_queue[i] = kzalloc(sizeof(*fep->rx_queue[i]), in fec_enet_alloc_queue()
2861 if (!fep->rx_queue[i]) { in fec_enet_alloc_queue()
2862 ret = -ENOMEM; in fec_enet_alloc_queue()
2866 fep->rx_queue[i]->bd.ring_size = RX_RING_SIZE; in fec_enet_alloc_queue()
2867 fep->total_rx_ring_size += fep->rx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
2885 rxq = fep->rx_queue[queue]; in fec_enet_alloc_rxq_buffers()
2886 bdp = rxq->bd.base; in fec_enet_alloc_rxq_buffers()
2887 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_alloc_rxq_buffers()
2897 rxq->rx_skbuff[i] = skb; in fec_enet_alloc_rxq_buffers()
2898 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_alloc_rxq_buffers()
2900 if (fep->bufdesc_ex) { in fec_enet_alloc_rxq_buffers()
2902 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_alloc_rxq_buffers()
2905 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
2909 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
2910 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_rxq_buffers()
2915 return -ENOMEM; in fec_enet_alloc_rxq_buffers()
2926 txq = fep->tx_queue[queue]; in fec_enet_alloc_txq_buffers()
2927 bdp = txq->bd.base; in fec_enet_alloc_txq_buffers()
2928 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_alloc_txq_buffers()
2929 txq->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL); in fec_enet_alloc_txq_buffers()
2930 if (!txq->tx_bounce[i]) in fec_enet_alloc_txq_buffers()
2933 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_alloc_txq_buffers()
2934 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_alloc_txq_buffers()
2936 if (fep->bufdesc_ex) { in fec_enet_alloc_txq_buffers()
2938 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_alloc_txq_buffers()
2941 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
2945 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
2946 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_txq_buffers()
2952 return -ENOMEM; in fec_enet_alloc_txq_buffers()
2960 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_alloc_buffers()
2962 return -ENOMEM; in fec_enet_alloc_buffers()
2964 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_alloc_buffers()
2966 return -ENOMEM; in fec_enet_alloc_buffers()
2977 ret = pm_runtime_resume_and_get(&fep->pdev->dev); in fec_enet_open()
2981 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_enet_open()
2992 if (ndev->phydev && ndev->phydev->drv) in fec_enet_open()
3019 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_open()
3022 napi_enable(&fep->napi); in fec_enet_open()
3023 phy_start(ndev->phydev); in fec_enet_open()
3026 device_set_wakeup_enable(&ndev->dev, fep->wol_flag & in fec_enet_open()
3036 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_open()
3037 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_open()
3038 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_open()
3047 phy_stop(ndev->phydev); in fec_enet_close()
3050 napi_disable(&fep->napi); in fec_enet_close()
3055 phy_disconnect(ndev->phydev); in fec_enet_close()
3057 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_close()
3063 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_close()
3064 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_close()
3065 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_close()
3092 if (ndev->flags & IFF_PROMISC) { in set_multicast_list()
3093 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3095 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3099 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3101 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3103 if (ndev->flags & IFF_ALLMULTI) { in set_multicast_list()
3107 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3108 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3116 crc = ether_crc_le(ndev->addr_len, ha->addr); in set_multicast_list()
3121 hash = (crc >> (32 - FEC_HASH_BITS)) & 0x3f; in set_multicast_list()
3124 hash_high |= 1 << (hash - 32); in set_multicast_list()
3129 writel(hash_high, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3130 writel(hash_low, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3141 if (!is_valid_ether_addr(addr->sa_data)) in fec_set_mac_address()
3142 return -EADDRNOTAVAIL; in fec_set_mac_address()
3143 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); in fec_set_mac_address()
3154 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) | in fec_set_mac_address()
3155 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24), in fec_set_mac_address()
3156 fep->hwp + FEC_ADDR_LOW); in fec_set_mac_address()
3157 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24), in fec_set_mac_address()
3158 fep->hwp + FEC_ADDR_HIGH); in fec_set_mac_address()
3164 * fec_poll_controller - FEC Poll controller function
3176 if (fep->irq[i] > 0) { in fec_poll_controller()
3177 disable_irq(fep->irq[i]); in fec_poll_controller()
3178 fec_enet_interrupt(fep->irq[i], dev); in fec_poll_controller()
3179 enable_irq(fep->irq[i]); in fec_poll_controller()
3189 netdev_features_t changed = features ^ netdev->features; in fec_enet_set_netdev_features()
3191 netdev->features = features; in fec_enet_set_netdev_features()
3196 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3198 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3206 netdev_features_t changed = features ^ netdev->features; in fec_set_features()
3209 napi_disable(&fep->napi); in fec_set_features()
3216 napi_enable(&fep->napi); in fec_set_features()
3258 unsigned dsize = fep->bufdesc_ex ? sizeof(struct bufdesc_ex) : in fec_enet_init()
3265 fep->rx_align = 0xf; in fec_enet_init()
3266 fep->tx_align = 0xf; in fec_enet_init()
3268 fep->rx_align = 0x3; in fec_enet_init()
3269 fep->tx_align = 0x3; in fec_enet_init()
3273 ret = dma_set_mask_and_coherent(&fep->pdev->dev, DMA_BIT_MASK(32)); in fec_enet_init()
3275 dev_warn(&fep->pdev->dev, "No suitable DMA available\n"); in fec_enet_init()
3281 bd_size = (fep->total_tx_ring_size + fep->total_rx_ring_size) * dsize; in fec_enet_init()
3284 cbd_base = dmam_alloc_coherent(&fep->pdev->dev, bd_size, &bd_dma, in fec_enet_init()
3287 return -ENOMEM; in fec_enet_init()
3296 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_init()
3297 struct fec_enet_priv_rx_q *rxq = fep->rx_queue[i]; in fec_enet_init()
3298 unsigned size = dsize * rxq->bd.ring_size; in fec_enet_init()
3300 rxq->bd.qid = i; in fec_enet_init()
3301 rxq->bd.base = cbd_base; in fec_enet_init()
3302 rxq->bd.cur = cbd_base; in fec_enet_init()
3303 rxq->bd.dma = bd_dma; in fec_enet_init()
3304 rxq->bd.dsize = dsize; in fec_enet_init()
3305 rxq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
3306 rxq->bd.reg_desc_active = fep->hwp + offset_des_active_rxq[i]; in fec_enet_init()
3309 rxq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
3312 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_init()
3313 struct fec_enet_priv_tx_q *txq = fep->tx_queue[i]; in fec_enet_init()
3314 unsigned size = dsize * txq->bd.ring_size; in fec_enet_init()
3316 txq->bd.qid = i; in fec_enet_init()
3317 txq->bd.base = cbd_base; in fec_enet_init()
3318 txq->bd.cur = cbd_base; in fec_enet_init()
3319 txq->bd.dma = bd_dma; in fec_enet_init()
3320 txq->bd.dsize = dsize; in fec_enet_init()
3321 txq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
3322 txq->bd.reg_desc_active = fep->hwp + offset_des_active_txq[i]; in fec_enet_init()
3325 txq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
3330 ndev->watchdog_timeo = TX_TIMEOUT; in fec_enet_init()
3331 ndev->netdev_ops = &fec_netdev_ops; in fec_enet_init()
3332 ndev->ethtool_ops = &fec_enet_ethtool_ops; in fec_enet_init()
3334 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK); in fec_enet_init()
3335 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, NAPI_POLL_WEIGHT); in fec_enet_init()
3337 if (fep->quirks & FEC_QUIRK_HAS_VLAN) in fec_enet_init()
3339 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX; in fec_enet_init()
3341 if (fep->quirks & FEC_QUIRK_HAS_CSUM) { in fec_enet_init()
3342 ndev->gso_max_segs = FEC_MAX_TSO_SEGS; in fec_enet_init()
3345 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM in fec_enet_init()
3347 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_init()
3350 if (fep->quirks & FEC_QUIRK_HAS_AVB) { in fec_enet_init()
3351 fep->tx_align = 0; in fec_enet_init()
3352 fep->rx_align = 0x3f; in fec_enet_init()
3355 ndev->hw_features = ndev->features; in fec_enet_init()
3359 if (fep->quirks & FEC_QUIRK_MIB_CLEAR) in fec_enet_init()
3373 struct device_node *np = pdev->dev.of_node; in fec_reset_phy()
3378 err = of_property_read_u32(np, "phy-reset-duration", &msec); in fec_reset_phy()
3383 phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0); in fec_reset_phy()
3384 if (phy_reset == -EPROBE_DEFER) in fec_reset_phy()
3389 err = of_property_read_u32(np, "phy-reset-post-delay", &phy_post_delay); in fec_reset_phy()
3392 return -EINVAL; in fec_reset_phy()
3394 active_high = of_property_read_bool(np, "phy-reset-active-high"); in fec_reset_phy()
3396 err = devm_gpio_request_one(&pdev->dev, phy_reset, in fec_reset_phy()
3398 "phy-reset"); in fec_reset_phy()
3400 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err); in fec_reset_phy()
3436 struct device_node *np = pdev->dev.of_node; in fec_enet_get_queue_num()
3444 of_property_read_u32(np, "fsl,num-tx-queues", num_tx); in fec_enet_get_queue_num()
3446 of_property_read_u32(np, "fsl,num-rx-queues", num_rx); in fec_enet_get_queue_num()
3449 dev_warn(&pdev->dev, "Invalid num_tx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
3456 dev_warn(&pdev->dev, "Invalid num_rx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
3484 gpr_np = of_parse_phandle(np, "fsl,stop-mode", 0); in fec_enet_init_stop_mode()
3488 ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val, in fec_enet_init_stop_mode()
3491 dev_dbg(&fep->pdev->dev, "no stop mode property\n"); in fec_enet_init_stop_mode()
3495 fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np); in fec_enet_init_stop_mode()
3496 if (IS_ERR(fep->stop_gpr.gpr)) { in fec_enet_init_stop_mode()
3497 dev_err(&fep->pdev->dev, "could not find gpr regmap\n"); in fec_enet_init_stop_mode()
3498 ret = PTR_ERR(fep->stop_gpr.gpr); in fec_enet_init_stop_mode()
3499 fep->stop_gpr.gpr = NULL; in fec_enet_init_stop_mode()
3503 fep->stop_gpr.reg = out_val[1]; in fec_enet_init_stop_mode()
3504 fep->stop_gpr.bit = out_val[2]; in fec_enet_init_stop_mode()
3522 struct device_node *np = pdev->dev.of_node, *phy_node; in fec_probe()
3535 return -ENOMEM; in fec_probe()
3537 SET_NETDEV_DEV(ndev, &pdev->dev); in fec_probe()
3542 of_id = of_match_device(fec_dt_ids, &pdev->dev); in fec_probe()
3544 pdev->id_entry = of_id->data; in fec_probe()
3545 dev_info = (struct fec_devinfo *)pdev->id_entry->driver_data; in fec_probe()
3547 fep->quirks = dev_info->quirks; in fec_probe()
3549 fep->netdev = ndev; in fec_probe()
3550 fep->num_rx_queues = num_rx_qs; in fec_probe()
3551 fep->num_tx_queues = num_tx_qs; in fec_probe()
3555 if (fep->quirks & FEC_QUIRK_HAS_GBIT) in fec_probe()
3556 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; in fec_probe()
3560 pinctrl_pm_select_default_state(&pdev->dev); in fec_probe()
3562 fep->hwp = devm_platform_ioremap_resource(pdev, 0); in fec_probe()
3563 if (IS_ERR(fep->hwp)) { in fec_probe()
3564 ret = PTR_ERR(fep->hwp); in fec_probe()
3568 fep->pdev = pdev; in fec_probe()
3569 fep->dev_id = dev_id++; in fec_probe()
3575 !of_property_read_bool(np, "fsl,err006687-workaround-present")) in fec_probe()
3576 fep->quirks |= FEC_QUIRK_ERR006687; in fec_probe()
3578 if (of_get_property(np, "fsl,magic-packet", NULL)) in fec_probe()
3579 fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET; in fec_probe()
3585 phy_node = of_parse_phandle(np, "phy-handle", 0); in fec_probe()
3589 dev_err(&pdev->dev, in fec_probe()
3590 "broken fixed-link specification\n"); in fec_probe()
3595 fep->phy_node = phy_node; in fec_probe()
3597 ret = of_get_phy_mode(pdev->dev.of_node, &interface); in fec_probe()
3599 pdata = dev_get_platdata(&pdev->dev); in fec_probe()
3601 fep->phy_interface = pdata->phy; in fec_probe()
3603 fep->phy_interface = PHY_INTERFACE_MODE_MII; in fec_probe()
3605 fep->phy_interface = interface; in fec_probe()
3608 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in fec_probe()
3609 if (IS_ERR(fep->clk_ipg)) { in fec_probe()
3610 ret = PTR_ERR(fep->clk_ipg); in fec_probe()
3614 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in fec_probe()
3615 if (IS_ERR(fep->clk_ahb)) { in fec_probe()
3616 ret = PTR_ERR(fep->clk_ahb); in fec_probe()
3620 fep->itr_clk_rate = clk_get_rate(fep->clk_ahb); in fec_probe()
3623 fep->clk_enet_out = devm_clk_get(&pdev->dev, "enet_out"); in fec_probe()
3624 if (IS_ERR(fep->clk_enet_out)) in fec_probe()
3625 fep->clk_enet_out = NULL; in fec_probe()
3627 fep->ptp_clk_on = false; in fec_probe()
3628 mutex_init(&fep->ptp_clk_mutex); in fec_probe()
3631 fep->clk_ref = devm_clk_get(&pdev->dev, "enet_clk_ref"); in fec_probe()
3632 if (IS_ERR(fep->clk_ref)) in fec_probe()
3633 fep->clk_ref = NULL; in fec_probe()
3635 fep->bufdesc_ex = fep->quirks & FEC_QUIRK_HAS_BUFDESC_EX; in fec_probe()
3636 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp"); in fec_probe()
3637 if (IS_ERR(fep->clk_ptp)) { in fec_probe()
3638 fep->clk_ptp = NULL; in fec_probe()
3639 fep->bufdesc_ex = false; in fec_probe()
3646 ret = clk_prepare_enable(fep->clk_ipg); in fec_probe()
3649 ret = clk_prepare_enable(fep->clk_ahb); in fec_probe()
3653 fep->reg_phy = devm_regulator_get_optional(&pdev->dev, "phy"); in fec_probe()
3654 if (!IS_ERR(fep->reg_phy)) { in fec_probe()
3655 ret = regulator_enable(fep->reg_phy); in fec_probe()
3657 dev_err(&pdev->dev, in fec_probe()
3662 if (PTR_ERR(fep->reg_phy) == -EPROBE_DEFER) { in fec_probe()
3663 ret = -EPROBE_DEFER; in fec_probe()
3666 fep->reg_phy = NULL; in fec_probe()
3669 pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT); in fec_probe()
3670 pm_runtime_use_autosuspend(&pdev->dev); in fec_probe()
3671 pm_runtime_get_noresume(&pdev->dev); in fec_probe()
3672 pm_runtime_set_active(&pdev->dev); in fec_probe()
3673 pm_runtime_enable(&pdev->dev); in fec_probe()
3680 if (fep->bufdesc_ex) in fec_probe()
3696 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt, in fec_probe()
3697 0, pdev->name, ndev); in fec_probe()
3701 fep->irq[i] = irq; in fec_probe()
3711 pinctrl_pm_select_sleep_state(&pdev->dev); in fec_probe()
3713 ndev->max_mtu = PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN; in fec_probe()
3719 device_init_wakeup(&ndev->dev, fep->wol_flag & in fec_probe()
3722 if (fep->bufdesc_ex && fep->ptp_clock) in fec_probe()
3723 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id); in fec_probe()
3725 fep->rx_copybreak = COPYBREAK_DEFAULT; in fec_probe()
3726 INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work); in fec_probe()
3728 pm_runtime_mark_last_busy(&pdev->dev); in fec_probe()
3729 pm_runtime_put_autosuspend(&pdev->dev); in fec_probe()
3740 pm_runtime_put_noidle(&pdev->dev); in fec_probe()
3741 pm_runtime_disable(&pdev->dev); in fec_probe()
3742 if (fep->reg_phy) in fec_probe()
3743 regulator_disable(fep->reg_phy); in fec_probe()
3745 clk_disable_unprepare(fep->clk_ahb); in fec_probe()
3747 clk_disable_unprepare(fep->clk_ipg); in fec_probe()
3756 dev_id--; in fec_probe()
3768 struct device_node *np = pdev->dev.of_node; in fec_drv_remove()
3771 ret = pm_runtime_resume_and_get(&pdev->dev); in fec_drv_remove()
3775 cancel_work_sync(&fep->tx_timeout_work); in fec_drv_remove()
3779 if (fep->reg_phy) in fec_drv_remove()
3780 regulator_disable(fep->reg_phy); in fec_drv_remove()
3784 of_node_put(fep->phy_node); in fec_drv_remove()
3787 clk_disable_unprepare(fep->clk_ahb); in fec_drv_remove()
3788 clk_disable_unprepare(fep->clk_ipg); in fec_drv_remove()
3789 pm_runtime_put_noidle(&pdev->dev); in fec_drv_remove()
3790 pm_runtime_disable(&pdev->dev); in fec_drv_remove()
3802 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) in fec_suspend()
3803 fep->wol_flag |= FEC_WOL_FLAG_SLEEP_ON; in fec_suspend()
3804 phy_stop(ndev->phydev); in fec_suspend()
3805 napi_disable(&fep->napi); in fec_suspend()
3811 if (!(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) in fec_suspend()
3812 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_suspend()
3816 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) in fec_suspend()
3817 regulator_disable(fep->reg_phy); in fec_suspend()
3822 if (fep->clk_enet_out || fep->reg_phy) in fec_suspend()
3823 fep->link = 0; in fec_suspend()
3835 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_resume()
3836 ret = regulator_enable(fep->reg_phy); in fec_resume()
3848 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) { in fec_resume()
3851 val = readl(fep->hwp + FEC_ECNTRL); in fec_resume()
3853 writel(val, fep->hwp + FEC_ECNTRL); in fec_resume()
3854 fep->wol_flag &= ~FEC_WOL_FLAG_SLEEP_ON; in fec_resume()
3856 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_resume()
3862 napi_enable(&fep->napi); in fec_resume()
3863 phy_start(ndev->phydev); in fec_resume()
3870 if (fep->reg_phy) in fec_resume()
3871 regulator_disable(fep->reg_phy); in fec_resume()
3880 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_suspend()
3881 clk_disable_unprepare(fep->clk_ipg); in fec_runtime_suspend()
3892 ret = clk_prepare_enable(fep->clk_ahb); in fec_runtime_resume()
3895 ret = clk_prepare_enable(fep->clk_ipg); in fec_runtime_resume()
3902 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_resume()