Lines Matching +full:ether +full:- +full:link +full:- +full:active +full:- +full:low
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
125 #include "xgbe-common.h"
148 /* Rate-change complete wait/retry count */
156 /* RRC frequency during link status check */
276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
304 /* Re-driver related definitions */
373 /* Re-driver support */
393 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer()
399 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write()
424 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
429 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
438 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
443 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
450 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_redrv_write()
452 ret = -EIO; in xgbe_phy_redrv_write()
472 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_write()
494 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
508 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
516 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux()
520 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
526 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
535 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux()
539 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
543 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
545 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
559 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_comm_ownership()
575 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id); in xgbe_phy_get_comm_ownership()
576 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ACTIVE, 1); in xgbe_phy_get_comm_ownership()
596 netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n"); in xgbe_phy_get_comm_ownership()
598 return -ETIMEDOUT; in xgbe_phy_get_comm_ownership()
604 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write()
607 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_write()
608 return -ENOTSUPP; in xgbe_phy_mdio_mii_write()
610 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_write()
611 return -ENOTSUPP; in xgbe_phy_mdio_mii_write()
614 return pdata->hw_if.write_ext_mii_regs(pdata, addr, reg, val); in xgbe_phy_mdio_mii_write()
641 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write()
642 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write()
649 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write()
651 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write()
654 ret = -ENOTSUPP; in xgbe_phy_mii_write()
664 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read()
667 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_read()
668 return -ENOTSUPP; in xgbe_phy_mdio_mii_read()
670 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_read()
671 return -ENOTSUPP; in xgbe_phy_mdio_mii_read()
674 return pdata->hw_if.read_ext_mii_regs(pdata, addr, reg); in xgbe_phy_mdio_mii_read()
701 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read()
702 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read()
709 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read()
711 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read()
714 ret = -ENOTSUPP; in xgbe_phy_mii_read()
723 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_sfp_phy_settings()
724 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_phy_settings()
726 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed) in xgbe_phy_sfp_phy_settings()
731 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_phy_settings()
732 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
733 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
734 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
735 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
748 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
753 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
754 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
755 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
756 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
760 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { in xgbe_phy_sfp_phy_settings()
761 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_sfp_phy_settings()
763 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
766 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
775 pdata->phy.speed = SPEED_10000; in xgbe_phy_sfp_phy_settings()
776 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
777 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
778 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
779 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_sfp_phy_settings()
780 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
802 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
803 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
804 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
805 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
809 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
828 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_bit_rate()
849 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_free_phy_device()
851 if (phy_data->phydev) { in xgbe_phy_free_phy_device()
852 phy_detach(phy_data->phydev); in xgbe_phy_free_phy_device()
853 phy_device_remove(phy_data->phydev); in xgbe_phy_free_phy_device()
854 phy_device_free(phy_data->phydev); in xgbe_phy_free_phy_device()
855 phy_data->phydev = NULL; in xgbe_phy_free_phy_device()
862 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_finisar_phy_quirks()
863 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_finisar_phy_quirks()
865 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_finisar_phy_quirks()
871 /* Enable Base-T AN */ in xgbe_phy_finisar_phy_quirks()
872 phy_write(phy_data->phydev, 0x16, 0x0001); in xgbe_phy_finisar_phy_quirks()
873 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
874 phy_write(phy_data->phydev, 0x16, 0x0000); in xgbe_phy_finisar_phy_quirks()
876 /* Enable SGMII at 100Base-T/1000Base-T Full Duplex */ in xgbe_phy_finisar_phy_quirks()
877 phy_write(phy_data->phydev, 0x1b, 0x9084); in xgbe_phy_finisar_phy_quirks()
878 phy_write(phy_data->phydev, 0x09, 0x0e00); in xgbe_phy_finisar_phy_quirks()
879 phy_write(phy_data->phydev, 0x00, 0x8140); in xgbe_phy_finisar_phy_quirks()
880 phy_write(phy_data->phydev, 0x04, 0x0d01); in xgbe_phy_finisar_phy_quirks()
881 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
890 linkmode_copy(phy_data->phydev->supported, supported); in xgbe_phy_finisar_phy_quirks()
892 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_finisar_phy_quirks()
894 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_finisar_phy_quirks()
903 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_belfuse_phy_quirks()
904 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_belfuse_phy_quirks()
905 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_belfuse_phy_quirks()
908 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_belfuse_phy_quirks()
911 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_belfuse_phy_quirks()
915 /* For Bel-Fuse, use the extra AN flag */ in xgbe_phy_belfuse_phy_quirks()
916 pdata->an_again = 1; in xgbe_phy_belfuse_phy_quirks()
918 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_belfuse_phy_quirks()
926 phy_write(phy_data->phydev, 0x18, 0x7007); in xgbe_phy_belfuse_phy_quirks()
927 reg = phy_read(phy_data->phydev, 0x18); in xgbe_phy_belfuse_phy_quirks()
928 phy_write(phy_data->phydev, 0x18, reg & ~0x0080); in xgbe_phy_belfuse_phy_quirks()
931 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
932 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
935 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001); in xgbe_phy_belfuse_phy_quirks()
938 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
939 phy_write(phy_data->phydev, 0x00, reg | 0x00800); in xgbe_phy_belfuse_phy_quirks()
941 /* Configure SGMII-to-Copper mode */ in xgbe_phy_belfuse_phy_quirks()
942 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
943 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
946 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004); in xgbe_phy_belfuse_phy_quirks()
949 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
950 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
953 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
954 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
957 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg); in xgbe_phy_belfuse_phy_quirks()
960 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
961 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
969 linkmode_copy(phy_data->phydev->supported, supported); in xgbe_phy_belfuse_phy_quirks()
970 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
972 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_belfuse_phy_quirks()
989 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_find_phy_device()
990 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_find_phy_device()
995 if (phy_data->phydev) in xgbe_phy_find_phy_device()
999 pdata->an_again = 0; in xgbe_phy_find_phy_device()
1002 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE) in xgbe_phy_find_phy_device()
1006 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_find_phy_device()
1007 !phy_data->sfp_phy_avail) in xgbe_phy_find_phy_device()
1011 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1012 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1014 netdev_err(pdata->netdev, in xgbe_phy_find_phy_device()
1016 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1021 phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1022 (phy_data->phydev_mode == XGBE_MDIO_MODE_CL45)); in xgbe_phy_find_phy_device()
1024 netdev_err(pdata->netdev, "get_phy_device failed\n"); in xgbe_phy_find_phy_device()
1025 return -ENODEV; in xgbe_phy_find_phy_device()
1027 netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n", in xgbe_phy_find_phy_device()
1028 phydev->phy_id); in xgbe_phy_find_phy_device()
1034 netdev_err(pdata->netdev, "phy_device_register failed\n"); in xgbe_phy_find_phy_device()
1039 ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags, in xgbe_phy_find_phy_device()
1042 netdev_err(pdata->netdev, "phy_attach_direct failed\n"); in xgbe_phy_find_phy_device()
1047 phy_data->phydev = phydev; in xgbe_phy_find_phy_device()
1051 linkmode_and(phydev->advertising, phydev->advertising, in xgbe_phy_find_phy_device()
1052 lks->link_modes.advertising); in xgbe_phy_find_phy_device()
1054 phy_start_aneg(phy_data->phydev); in xgbe_phy_find_phy_device()
1061 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_external_phy()
1064 if (!phy_data->sfp_changed) in xgbe_phy_sfp_external_phy()
1067 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_external_phy()
1069 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_sfp_external_phy()
1078 phy_data->sfp_phy_avail = 1; in xgbe_phy_sfp_external_phy()
1083 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_rx_los()
1088 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) in xgbe_phy_check_sfp_rx_los()
1091 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los)) in xgbe_phy_check_sfp_rx_los()
1099 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_tx_fault()
1104 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) in xgbe_phy_check_sfp_tx_fault()
1107 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault)) in xgbe_phy_check_sfp_tx_fault()
1115 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) in xgbe_phy_check_sfp_mod_absent()
1118 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent)) in xgbe_phy_check_sfp_mod_absent()
1126 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_parse_eeprom()
1127 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_sfp_parse_eeprom()
1130 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_parse_eeprom()
1139 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data); in xgbe_phy_sfp_parse_eeprom()
1140 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data); in xgbe_phy_sfp_parse_eeprom()
1142 /* Assume ACTIVE cable unless told it is PASSIVE */ in xgbe_phy_sfp_parse_eeprom()
1144 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE; in xgbe_phy_sfp_parse_eeprom()
1145 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN]; in xgbe_phy_sfp_parse_eeprom()
1147 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE; in xgbe_phy_sfp_parse_eeprom()
1152 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; in xgbe_phy_sfp_parse_eeprom()
1154 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; in xgbe_phy_sfp_parse_eeprom()
1156 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM; in xgbe_phy_sfp_parse_eeprom()
1158 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER; in xgbe_phy_sfp_parse_eeprom()
1160 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX; in xgbe_phy_sfp_parse_eeprom()
1162 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX; in xgbe_phy_sfp_parse_eeprom()
1164 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; in xgbe_phy_sfp_parse_eeprom()
1166 phy_data->sfp_base = XGBE_SFP_BASE_1000_T; in xgbe_phy_sfp_parse_eeprom()
1167 else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && in xgbe_phy_sfp_parse_eeprom()
1169 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; in xgbe_phy_sfp_parse_eeprom()
1171 switch (phy_data->sfp_base) { in xgbe_phy_sfp_parse_eeprom()
1173 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000; in xgbe_phy_sfp_parse_eeprom()
1178 phy_data->sfp_speed = XGBE_SFP_SPEED_1000; in xgbe_phy_sfp_parse_eeprom()
1185 phy_data->sfp_speed = XGBE_SFP_SPEED_10000; in xgbe_phy_sfp_parse_eeprom()
1198 netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n"); in xgbe_phy_sfp_eeprom_info()
1199 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_sfp_eeprom_info()
1202 netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n", in xgbe_phy_sfp_eeprom_info()
1205 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_sfp_eeprom_info()
1208 netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n", in xgbe_phy_sfp_eeprom_info()
1211 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV], in xgbe_phy_sfp_eeprom_info()
1214 netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n", in xgbe_phy_sfp_eeprom_info()
1217 memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN], in xgbe_phy_sfp_eeprom_info()
1220 netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n", in xgbe_phy_sfp_eeprom_info()
1228 for (cc = 0; len; buf++, len--) in xgbe_phy_sfp_verify_eeprom()
1236 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_read_eeprom()
1243 dev_err_once(pdata->dev, "%s: I2C error setting SFP MUX\n", in xgbe_phy_sfp_read_eeprom()
1244 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1254 dev_err_once(pdata->dev, "%s: I2C error reading SFP EEPROM\n", in xgbe_phy_sfp_read_eeprom()
1255 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1262 sizeof(sfp_eeprom.base) - 1)) { in xgbe_phy_sfp_read_eeprom()
1263 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1269 sizeof(sfp_eeprom.extd) - 1)) { in xgbe_phy_sfp_read_eeprom()
1270 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1275 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) { in xgbe_phy_sfp_read_eeprom()
1276 phy_data->sfp_changed = 1; in xgbe_phy_sfp_read_eeprom()
1281 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); in xgbe_phy_sfp_read_eeprom()
1285 phy_data->sfp_changed = 0; in xgbe_phy_sfp_read_eeprom()
1296 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_signals()
1302 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, in xgbe_phy_sfp_signals()
1306 dev_err_once(pdata->dev, "%s: I2C error reading SFP GPIOs\n", in xgbe_phy_sfp_signals()
1307 netdev_name(pdata->netdev)); in xgbe_phy_sfp_signals()
1311 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_phy_sfp_signals()
1313 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data); in xgbe_phy_sfp_signals()
1318 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_mod_absent()
1322 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_mod_absent()
1323 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_mod_absent()
1324 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom)); in xgbe_phy_sfp_mod_absent()
1329 phy_data->sfp_rx_los = 0; in xgbe_phy_sfp_reset()
1330 phy_data->sfp_tx_fault = 0; in xgbe_phy_sfp_reset()
1331 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_reset()
1332 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN; in xgbe_phy_sfp_reset()
1333 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN; in xgbe_phy_sfp_reset()
1334 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN; in xgbe_phy_sfp_reset()
1339 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_detect()
1351 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_detect()
1377 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_eeprom()
1383 rem = eeprom->len; in xgbe_phy_module_eeprom()
1385 if (!eeprom->len) { in xgbe_phy_module_eeprom()
1386 ret = -EINVAL; in xgbe_phy_module_eeprom()
1390 if ((eeprom->offset + eeprom->len) > XGBE_SFP_EEPROM_MAX) { in xgbe_phy_module_eeprom()
1391 ret = -EINVAL; in xgbe_phy_module_eeprom()
1395 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_module_eeprom()
1396 ret = -ENXIO; in xgbe_phy_module_eeprom()
1400 if (!netif_running(pdata->netdev)) { in xgbe_phy_module_eeprom()
1401 ret = -EIO; in xgbe_phy_module_eeprom()
1405 if (phy_data->sfp_mod_absent) { in xgbe_phy_module_eeprom()
1406 ret = -EIO; in xgbe_phy_module_eeprom()
1412 ret = -EIO; in xgbe_phy_module_eeprom()
1418 netdev_err(pdata->netdev, "I2C error setting SFP MUX\n"); in xgbe_phy_module_eeprom()
1419 ret = -EIO; in xgbe_phy_module_eeprom()
1429 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1431 ret = -EIO; in xgbe_phy_module_eeprom()
1445 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1447 ret = -EIO; in xgbe_phy_module_eeprom()
1452 for (i = 0, j = eeprom->offset; i < eeprom->len; i++, j++) { in xgbe_phy_module_eeprom()
1458 rem--; in xgbe_phy_module_eeprom()
1468 eeprom->len -= rem; in xgbe_phy_module_eeprom()
1476 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_info()
1478 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_module_info()
1479 return -ENXIO; in xgbe_phy_module_info()
1481 if (!netif_running(pdata->netdev)) in xgbe_phy_module_info()
1482 return -EIO; in xgbe_phy_module_info()
1484 if (phy_data->sfp_mod_absent) in xgbe_phy_module_info()
1485 return -EIO; in xgbe_phy_module_info()
1487 if (XGBE_SFP_DIAGS_SUPPORTED(&phy_data->sfp_eeprom)) { in xgbe_phy_module_info()
1488 modinfo->type = ETH_MODULE_SFF_8472; in xgbe_phy_module_info()
1489 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; in xgbe_phy_module_info()
1491 modinfo->type = ETH_MODULE_SFF_8079; in xgbe_phy_module_info()
1492 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; in xgbe_phy_module_info()
1500 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_phydev_flowctrl()
1501 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_phydev_flowctrl()
1505 pdata->phy.tx_pause = 0; in xgbe_phy_phydev_flowctrl()
1506 pdata->phy.rx_pause = 0; in xgbe_phy_phydev_flowctrl()
1508 if (!phy_data->phydev) in xgbe_phy_phydev_flowctrl()
1511 lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising); in xgbe_phy_phydev_flowctrl()
1513 if (phy_data->phydev->pause) { in xgbe_phy_phydev_flowctrl()
1517 if (phy_data->phydev->asym_pause) { in xgbe_phy_phydev_flowctrl()
1524 pdata->phy.tx_pause = 1; in xgbe_phy_phydev_flowctrl()
1526 pdata->phy.rx_pause = 1; in xgbe_phy_phydev_flowctrl()
1531 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_sgmii_outcome()
1538 if (pdata->phy.pause_autoneg) in xgbe_phy_an37_sgmii_outcome()
1541 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { in xgbe_phy_an37_sgmii_outcome()
1543 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1547 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1553 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1557 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1571 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_outcome()
1578 /* Compare Advertisement and Link Partner register */ in xgbe_phy_an37_outcome()
1586 if (pdata->phy.pause_autoneg) { in xgbe_phy_an37_outcome()
1587 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an37_outcome()
1588 pdata->phy.tx_pause = 0; in xgbe_phy_an37_outcome()
1589 pdata->phy.rx_pause = 0; in xgbe_phy_an37_outcome()
1592 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1593 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1596 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1598 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1614 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_redrv_outcome()
1615 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an73_redrv_outcome()
1623 if (pdata->phy.pause_autoneg) in xgbe_phy_an73_redrv_outcome()
1626 /* Compare Advertisement and Link Partner register 2 */ in xgbe_phy_an73_redrv_outcome()
1636 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1646 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1655 switch (phy_data->sfp_base) { in xgbe_phy_an73_redrv_outcome()
1657 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1658 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1672 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1673 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1683 /* Compare Advertisement and Link Partner register 3 */ in xgbe_phy_an73_redrv_outcome()
1694 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_outcome()
1701 /* Compare Advertisement and Link Partner register 1 */ in xgbe_phy_an73_outcome()
1709 if (pdata->phy.pause_autoneg) { in xgbe_phy_an73_outcome()
1710 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an73_outcome()
1711 pdata->phy.tx_pause = 0; in xgbe_phy_an73_outcome()
1712 pdata->phy.rx_pause = 0; in xgbe_phy_an73_outcome()
1715 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1716 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1719 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1721 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1725 /* Compare Advertisement and Link Partner register 2 */ in xgbe_phy_an73_outcome()
1741 /* Compare Advertisement and Link Partner register 3 */ in xgbe_phy_an73_outcome()
1752 switch (pdata->an_mode) { in xgbe_phy_an_outcome()
1769 struct ethtool_link_ksettings *slks = &pdata->phy.lks; in xgbe_phy_an_advertising()
1770 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_advertising()
1774 /* Without a re-driver, just return current advertising */ in xgbe_phy_an_advertising()
1775 if (!phy_data->redrv) in xgbe_phy_an_advertising()
1778 /* With the KR re-driver we need to advertise a single speed */ in xgbe_phy_an_advertising()
1783 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_an_advertising()
1786 switch (phy_data->port_mode) { in xgbe_phy_an_advertising()
1800 if (phy_data->phydev && in xgbe_phy_an_advertising()
1801 (phy_data->phydev->speed == SPEED_10000)) in xgbe_phy_an_advertising()
1810 switch (phy_data->sfp_base) { in xgbe_phy_an_advertising()
1830 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an_config()
1831 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_config()
1838 if (!phy_data->phydev) in xgbe_phy_an_config()
1841 phy_data->phydev->autoneg = pdata->phy.autoneg; in xgbe_phy_an_config()
1842 linkmode_and(phy_data->phydev->advertising, in xgbe_phy_an_config()
1843 phy_data->phydev->supported, in xgbe_phy_an_config()
1844 lks->link_modes.advertising); in xgbe_phy_an_config()
1846 if (pdata->phy.autoneg != AUTONEG_ENABLE) { in xgbe_phy_an_config()
1847 phy_data->phydev->speed = pdata->phy.speed; in xgbe_phy_an_config()
1848 phy_data->phydev->duplex = pdata->phy.duplex; in xgbe_phy_an_config()
1851 ret = phy_start_aneg(phy_data->phydev); in xgbe_phy_an_config()
1858 switch (phy_data->sfp_base) { in xgbe_phy_an_sfp_mode()
1872 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_mode()
1874 /* A KR re-driver will always require CL73 AN */ in xgbe_phy_an_mode()
1875 if (phy_data->redrv) in xgbe_phy_an_mode()
1878 switch (phy_data->port_mode) { in xgbe_phy_an_mode()
1904 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_mdio()
1907 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_mdio()
1910 return pdata->hw_if.write_ext_mii_regs(pdata, phy_data->redrv_addr, in xgbe_phy_set_redrv_mode_mdio()
1917 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_i2c()
1922 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_i2c()
1931 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode()
1935 if (!phy_data->redrv) in xgbe_phy_set_redrv_mode()
1939 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_set_redrv_mode()
1940 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) && in xgbe_phy_set_redrv_mode()
1941 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR)) in xgbe_phy_set_redrv_mode()
1948 if (phy_data->redrv_if) in xgbe_phy_set_redrv_mode()
1964 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
1978 while (wait--) { in xgbe_phy_perform_ratechange()
1985 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
1994 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n"); in xgbe_phy_rrc()
1999 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_power_off()
2004 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_power_off()
2006 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); in xgbe_phy_power_off()
2011 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfi_mode()
2016 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { in xgbe_phy_sfi_mode()
2019 if (phy_data->sfp_cable_len <= 1) in xgbe_phy_sfi_mode()
2021 else if (phy_data->sfp_cable_len <= 3) in xgbe_phy_sfi_mode()
2027 phy_data->cur_mode = XGBE_MODE_SFI; in xgbe_phy_sfi_mode()
2029 netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n"); in xgbe_phy_sfi_mode()
2034 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_x_mode()
2041 phy_data->cur_mode = XGBE_MODE_X; in xgbe_phy_x_mode()
2043 netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n"); in xgbe_phy_x_mode()
2048 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_1000_mode()
2055 phy_data->cur_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_sgmii_1000_mode()
2057 netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n"); in xgbe_phy_sgmii_1000_mode()
2062 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_100_mode()
2069 phy_data->cur_mode = XGBE_MODE_SGMII_100; in xgbe_phy_sgmii_100_mode()
2071 netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n"); in xgbe_phy_sgmii_100_mode()
2076 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode()
2083 phy_data->cur_mode = XGBE_MODE_KR; in xgbe_phy_kr_mode()
2085 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n"); in xgbe_phy_kr_mode()
2090 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode()
2097 phy_data->cur_mode = XGBE_MODE_KX_2500; in xgbe_phy_kx_2500_mode()
2099 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n"); in xgbe_phy_kx_2500_mode()
2104 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_1000_mode()
2111 phy_data->cur_mode = XGBE_MODE_KX_1000; in xgbe_phy_kx_1000_mode()
2113 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n"); in xgbe_phy_kx_1000_mode()
2118 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cur_mode()
2120 return phy_data->cur_mode; in xgbe_phy_cur_mode()
2125 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_baset_mode()
2127 /* No switching if not 10GBase-T */ in xgbe_phy_switch_baset_mode()
2128 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_switch_baset_mode()
2148 /* If we are in KR switch to KX, and vice-versa */ in xgbe_phy_switch_bp_mode()
2160 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_mode()
2162 switch (phy_data->port_mode) { in xgbe_phy_switch_mode()
2219 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_get_sfp_mode()
2256 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_mode()
2258 switch (phy_data->port_mode) { in xgbe_phy_get_mode()
2310 if (pdata->phy.autoneg == AUTONEG_ENABLE) { in xgbe_phy_check_mode()
2315 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed); in xgbe_phy_check_mode()
2326 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_basex_mode()
2343 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_baset_mode()
2366 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_sfp_mode()
2367 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_sfp_mode()
2371 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2376 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2381 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2386 if (phy_data->sfp_mod_absent) in xgbe_phy_use_sfp_mode()
2402 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_2500_mode()
2416 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_mode()
2432 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_mode()
2434 switch (phy_data->port_mode) { in xgbe_phy_use_mode()
2459 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X); in xgbe_phy_valid_speed_basex_mode()
2461 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R); in xgbe_phy_valid_speed_basex_mode()
2475 return (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T); in xgbe_phy_valid_speed_baset_mode()
2477 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); in xgbe_phy_valid_speed_baset_mode()
2488 return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); in xgbe_phy_valid_speed_sfp_mode()
2490 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) || in xgbe_phy_valid_speed_sfp_mode()
2491 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000)); in xgbe_phy_valid_speed_sfp_mode()
2493 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000); in xgbe_phy_valid_speed_sfp_mode()
2522 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed()
2524 switch (phy_data->port_mode) { in xgbe_phy_valid_speed()
2546 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_link_status()
2552 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
2556 if (phy_data->sfp_changed) { in xgbe_phy_link_status()
2561 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) in xgbe_phy_link_status()
2565 if (phy_data->phydev) { in xgbe_phy_link_status()
2567 ret = phy_read_status(phy_data->phydev); in xgbe_phy_link_status()
2571 if ((pdata->phy.autoneg == AUTONEG_ENABLE) && in xgbe_phy_link_status()
2572 !phy_aneg_done(phy_data->phydev)) in xgbe_phy_link_status()
2575 if (!phy_data->phydev->link) in xgbe_phy_link_status()
2579 /* Link status is latched low, so read once to clear in xgbe_phy_link_status()
2587 /* No link, attempt a receiver reset cycle */ in xgbe_phy_link_status()
2588 if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { in xgbe_phy_link_status()
2589 phy_data->rrc_count = 0; in xgbe_phy_link_status()
2598 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_gpio_setup()
2600 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_sfp_gpio_setup()
2601 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2604 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2607 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2609 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2611 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2613 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2617 dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n", in xgbe_phy_sfp_gpio_setup()
2618 phy_data->sfp_gpio_address); in xgbe_phy_sfp_gpio_setup()
2619 dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n", in xgbe_phy_sfp_gpio_setup()
2620 phy_data->sfp_gpio_mask); in xgbe_phy_sfp_gpio_setup()
2621 dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n", in xgbe_phy_sfp_gpio_setup()
2622 phy_data->sfp_gpio_rx_los); in xgbe_phy_sfp_gpio_setup()
2623 dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n", in xgbe_phy_sfp_gpio_setup()
2624 phy_data->sfp_gpio_tx_fault); in xgbe_phy_sfp_gpio_setup()
2625 dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n", in xgbe_phy_sfp_gpio_setup()
2626 phy_data->sfp_gpio_mod_absent); in xgbe_phy_sfp_gpio_setup()
2627 dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n", in xgbe_phy_sfp_gpio_setup()
2628 phy_data->sfp_gpio_rate_select); in xgbe_phy_sfp_gpio_setup()
2634 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_comm_setup()
2637 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); in xgbe_phy_sfp_comm_setup()
2638 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); in xgbe_phy_sfp_comm_setup()
2642 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; in xgbe_phy_sfp_comm_setup()
2643 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; in xgbe_phy_sfp_comm_setup()
2644 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, in xgbe_phy_sfp_comm_setup()
2648 dev_dbg(pdata->dev, "SFP: mux_address=%#x\n", in xgbe_phy_sfp_comm_setup()
2649 phy_data->sfp_mux_address); in xgbe_phy_sfp_comm_setup()
2650 dev_dbg(pdata->dev, "SFP: mux_channel=%u\n", in xgbe_phy_sfp_comm_setup()
2651 phy_data->sfp_mux_channel); in xgbe_phy_sfp_comm_setup()
2663 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_int_mdio_reset()
2666 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
2670 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
2677 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_i2c_mdio_reset()
2683 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2695 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
2696 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2698 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2701 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2707 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
2708 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2710 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2713 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2721 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset()
2724 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset()
2731 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) in xgbe_phy_mdio_reset()
2733 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset()
2743 if (!phy_data->redrv) in xgbe_phy_redrv_error()
2746 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX) in xgbe_phy_redrv_error()
2749 switch (phy_data->redrv_model) { in xgbe_phy_redrv_error()
2751 if (phy_data->redrv_lane > 3) in xgbe_phy_redrv_error()
2755 if (phy_data->redrv_lane > 1) in xgbe_phy_redrv_error()
2767 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset_setup()
2769 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset_setup()
2772 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); in xgbe_phy_mdio_reset_setup()
2773 switch (phy_data->mdio_reset) { in xgbe_phy_mdio_reset_setup()
2779 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n", in xgbe_phy_mdio_reset_setup()
2780 phy_data->mdio_reset); in xgbe_phy_mdio_reset_setup()
2781 return -EINVAL; in xgbe_phy_mdio_reset_setup()
2784 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { in xgbe_phy_mdio_reset_setup()
2785 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_mdio_reset_setup()
2786 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
2788 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
2790 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) { in xgbe_phy_mdio_reset_setup()
2791 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
2800 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_port_mode_mismatch()
2802 switch (phy_data->port_mode) { in xgbe_phy_port_mode_mismatch()
2805 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2806 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
2810 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) in xgbe_phy_port_mode_mismatch()
2814 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2815 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) in xgbe_phy_port_mode_mismatch()
2819 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_port_mode_mismatch()
2823 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2824 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2825 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) in xgbe_phy_port_mode_mismatch()
2829 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2830 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2831 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
2835 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_port_mode_mismatch()
2839 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2840 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2841 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
2853 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_conn_type_mismatch()
2855 switch (phy_data->port_mode) { in xgbe_phy_conn_type_mismatch()
2859 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE) in xgbe_phy_conn_type_mismatch()
2867 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO) in xgbe_phy_conn_type_mismatch()
2871 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_conn_type_mismatch()
2883 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) in xgbe_phy_port_enabled()
2885 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) in xgbe_phy_port_enabled()
2893 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_track()
2895 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_track()
2898 if (!phy_data->phy_cdr_notrack) in xgbe_phy_cdr_track()
2901 usleep_range(phy_data->phy_cdr_delay, in xgbe_phy_cdr_track()
2902 phy_data->phy_cdr_delay + 500); in xgbe_phy_cdr_track()
2908 phy_data->phy_cdr_notrack = 0; in xgbe_phy_cdr_track()
2913 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_notrack()
2915 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_notrack()
2918 if (phy_data->phy_cdr_notrack) in xgbe_phy_cdr_notrack()
2927 phy_data->phy_cdr_notrack = 1; in xgbe_phy_cdr_notrack()
2932 if (!pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_post()
2938 if (pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_pre()
2944 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_post()
2946 switch (pdata->an_mode) { in xgbe_phy_an_post()
2949 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_post()
2954 switch (pdata->an_result) { in xgbe_phy_an_post()
2959 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX) in xgbe_phy_an_post()
2960 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC; in xgbe_phy_an_post()
2962 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_an_post()
2973 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_pre()
2975 switch (pdata->an_mode) { in xgbe_phy_an_pre()
2978 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_pre()
2990 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_stop()
3006 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_stop()
3011 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_start()
3015 ret = pdata->i2c_if.i2c_start(pdata); in xgbe_phy_start()
3019 /* Set the proper MDIO mode for the re-driver */ in xgbe_phy_start()
3020 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_start()
3021 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_start()
3024 netdev_err(pdata->netdev, in xgbe_phy_start()
3026 phy_data->redrv_addr); in xgbe_phy_start()
3032 xgbe_phy_set_mode(pdata, phy_data->start_mode); in xgbe_phy_start()
3038 switch (phy_data->port_mode) { in xgbe_phy_start()
3054 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_start()
3061 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_reset()
3066 cur_mode = phy_data->cur_mode; in xgbe_phy_reset()
3070 if (!phy_data->phydev) in xgbe_phy_reset()
3078 return phy_init_hw(phy_data->phydev); in xgbe_phy_reset()
3083 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_exit()
3086 mdiobus_unregister(phy_data->mii); in xgbe_phy_exit()
3091 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_init()
3098 dev_info(pdata->dev, "device is not enabled\n"); in xgbe_phy_init()
3099 return -ENODEV; in xgbe_phy_init()
3103 ret = pdata->i2c_if.i2c_init(pdata); in xgbe_phy_init()
3107 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL); in xgbe_phy_init()
3109 return -ENOMEM; in xgbe_phy_init()
3110 pdata->phy_data = phy_data; in xgbe_phy_init()
3112 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); in xgbe_phy_init()
3113 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); in xgbe_phy_init()
3114 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); in xgbe_phy_init()
3115 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); in xgbe_phy_init()
3116 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); in xgbe_phy_init()
3118 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); in xgbe_phy_init()
3119 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); in xgbe_phy_init()
3120 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds); in xgbe_phy_init()
3121 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type); in xgbe_phy_init()
3122 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr); in xgbe_phy_init()
3125 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); in xgbe_phy_init()
3126 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); in xgbe_phy_init()
3127 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); in xgbe_phy_init()
3128 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); in xgbe_phy_init()
3129 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); in xgbe_phy_init()
3130 if (phy_data->redrv && netif_msg_probe(pdata)) { in xgbe_phy_init()
3131 dev_dbg(pdata->dev, "redrv present\n"); in xgbe_phy_init()
3132 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if); in xgbe_phy_init()
3133 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr); in xgbe_phy_init()
3134 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane); in xgbe_phy_init()
3135 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model); in xgbe_phy_init()
3140 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n", in xgbe_phy_init()
3141 phy_data->port_mode, phy_data->conn_type); in xgbe_phy_init()
3142 return -EINVAL; in xgbe_phy_init()
3147 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n", in xgbe_phy_init()
3148 phy_data->port_mode, phy_data->port_speeds); in xgbe_phy_init()
3149 return -EINVAL; in xgbe_phy_init()
3157 /* Validate the re-driver information */ in xgbe_phy_init()
3159 dev_err(pdata->dev, "phy re-driver settings error\n"); in xgbe_phy_init()
3160 return -EINVAL; in xgbe_phy_init()
3162 pdata->kr_redrv = phy_data->redrv; in xgbe_phy_init()
3165 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_init()
3170 switch (phy_data->port_mode) { in xgbe_phy_init()
3179 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3181 phy_data->start_mode = XGBE_MODE_KX_1000; in xgbe_phy_init()
3183 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3185 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3187 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3190 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3197 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3199 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3202 /* MDIO 1GBase-T support */ in xgbe_phy_init()
3208 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3210 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3212 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3214 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3217 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3220 /* MDIO Base-X support */ in xgbe_phy_init()
3227 phy_data->start_mode = XGBE_MODE_X; in xgbe_phy_init()
3229 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3232 /* MDIO NBase-T support */ in xgbe_phy_init()
3238 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3240 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3242 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3244 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3246 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3248 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3251 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3254 /* 10GBase-T support */ in xgbe_phy_init()
3260 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3262 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3264 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3266 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3268 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3270 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3273 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3276 /* 10GBase-R support */ in xgbe_phy_init()
3286 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3288 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3290 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3300 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_init()
3301 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3302 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_init()
3303 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3304 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_init()
3305 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3307 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3312 return -EINVAL; in xgbe_phy_init()
3316 dev_dbg(pdata->dev, "phy supported=0x%*pb\n", in xgbe_phy_init()
3318 lks->link_modes.supported); in xgbe_phy_init()
3320 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) && in xgbe_phy_init()
3321 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) { in xgbe_phy_init()
3322 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_init()
3323 phy_data->phydev_mode); in xgbe_phy_init()
3325 dev_err(pdata->dev, in xgbe_phy_init()
3327 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_init()
3328 return -EINVAL; in xgbe_phy_init()
3332 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_init()
3333 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_init()
3336 dev_err(pdata->dev, in xgbe_phy_init()
3338 phy_data->redrv_addr); in xgbe_phy_init()
3339 return -EINVAL; in xgbe_phy_init()
3343 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_init()
3346 mii = devm_mdiobus_alloc(pdata->dev); in xgbe_phy_init()
3348 dev_err(pdata->dev, "mdiobus_alloc failed\n"); in xgbe_phy_init()
3349 return -ENOMEM; in xgbe_phy_init()
3352 mii->priv = pdata; in xgbe_phy_init()
3353 mii->name = "amd-xgbe-mii"; in xgbe_phy_init()
3354 mii->read = xgbe_phy_mii_read; in xgbe_phy_init()
3355 mii->write = xgbe_phy_mii_write; in xgbe_phy_init()
3356 mii->parent = pdata->dev; in xgbe_phy_init()
3357 mii->phy_mask = ~0; in xgbe_phy_init()
3358 snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev)); in xgbe_phy_init()
3361 dev_err(pdata->dev, "mdiobus_register failed\n"); in xgbe_phy_init()
3364 phy_data->mii = mii; in xgbe_phy_init()
3371 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl; in xgbe_init_function_ptrs_phy_v2()
3373 phy_impl->init = xgbe_phy_init; in xgbe_init_function_ptrs_phy_v2()
3374 phy_impl->exit = xgbe_phy_exit; in xgbe_init_function_ptrs_phy_v2()
3376 phy_impl->reset = xgbe_phy_reset; in xgbe_init_function_ptrs_phy_v2()
3377 phy_impl->start = xgbe_phy_start; in xgbe_init_function_ptrs_phy_v2()
3378 phy_impl->stop = xgbe_phy_stop; in xgbe_init_function_ptrs_phy_v2()
3380 phy_impl->link_status = xgbe_phy_link_status; in xgbe_init_function_ptrs_phy_v2()
3382 phy_impl->valid_speed = xgbe_phy_valid_speed; in xgbe_init_function_ptrs_phy_v2()
3384 phy_impl->use_mode = xgbe_phy_use_mode; in xgbe_init_function_ptrs_phy_v2()
3385 phy_impl->set_mode = xgbe_phy_set_mode; in xgbe_init_function_ptrs_phy_v2()
3386 phy_impl->get_mode = xgbe_phy_get_mode; in xgbe_init_function_ptrs_phy_v2()
3387 phy_impl->switch_mode = xgbe_phy_switch_mode; in xgbe_init_function_ptrs_phy_v2()
3388 phy_impl->cur_mode = xgbe_phy_cur_mode; in xgbe_init_function_ptrs_phy_v2()
3390 phy_impl->an_mode = xgbe_phy_an_mode; in xgbe_init_function_ptrs_phy_v2()
3392 phy_impl->an_config = xgbe_phy_an_config; in xgbe_init_function_ptrs_phy_v2()
3394 phy_impl->an_advertising = xgbe_phy_an_advertising; in xgbe_init_function_ptrs_phy_v2()
3396 phy_impl->an_outcome = xgbe_phy_an_outcome; in xgbe_init_function_ptrs_phy_v2()
3398 phy_impl->an_pre = xgbe_phy_an_pre; in xgbe_init_function_ptrs_phy_v2()
3399 phy_impl->an_post = xgbe_phy_an_post; in xgbe_init_function_ptrs_phy_v2()
3401 phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; in xgbe_init_function_ptrs_phy_v2()
3402 phy_impl->kr_training_post = xgbe_phy_kr_training_post; in xgbe_init_function_ptrs_phy_v2()
3404 phy_impl->module_info = xgbe_phy_module_info; in xgbe_init_function_ptrs_phy_v2()
3405 phy_impl->module_eeprom = xgbe_phy_module_eeprom; in xgbe_init_function_ptrs_phy_v2()